The Marvell switches are lacking DT bindings.
I need proper schema checking to add LED support to the
Marvell switch. Just how it is, it can't go on like this.
Some Device Tree fixes are included in the series, these
remove the major and most annoying warnings fallout noise:
some warnings remain, and these are of more serious nature,
such as missing phy-mode. They can be applied individually,
or to the networking tree with the rest of the patches.
Thanks to Andrew Lunn, Vladimir Oltean and Russell King
for excellent review and feedback!
Signed-off-by: Linus Walleij <[email protected]>
---
Changes in v7:
- Fix the elaborate spacing to satisfy yamllint in the
ports/ethernet-ports requirement.
- Link to v6: https://lore.kernel.org/r/[email protected]
Changes in v6:
- Fix ports/ethernet-ports requirement with proper indenting
(hopefully).
- Link to v5: https://lore.kernel.org/r/[email protected]
Changes in v5:
- Consistently rename switch@n to ethernet-switch@n in all cleanup patches
- Consistently rename ports to ethernet-ports in all cleanup patches
- Consistently rename all port@n to ethernet-port@n in all cleanup patches
- Consistently rename all phy@n to ethernet-phy@n in all cleanup patches
- Restore the nodename on the Turris MOX which has a U-Boot binary using the
nodename as ABI, put in a blurb warning about this so no-one else tries
to change it in the future.
- Drop dsa.yaml direct references where we reference dsa.yaml#/$defs/ethernet-ports
- Replace the conjured MV88E6xxx example by a better one based on imx6qdl
plus strictly named nodes and added reset-gpios for a more complete example,
and another example using the interrupt controller based on
armada-381-netgear-gs110emx.dts
- Bump lineage to 2008 as Vladimir says the code was developed starting 2008.
- Link to v4: https://lore.kernel.org/r/[email protected]
Changes in v4:
- Rebase the series on top of Rob's series
"dt-bindings: net: Child node schema cleanups" (or the hex numbered
ports will not work)
- Fix up a whitespacing error corrupting v3...
- Add a new patch making the generic DSA binding require ports or
ethernet-ports in the switch node.
- Drop any corrections of port@a in the patches.
- Drop oneOf in the compatible enum for mv88e6xxx
- Use ethernet-switch, ethernet-ports and ethernet-phy in the examples
- Transclude the dsa.yaml#/$defs/ethernet-ports define for ports
- Move the DTS and binding fixes first, before the actual bindings,
so they apply without (too many) warnings as fallout.
- Drop stray colon in text.
- Drop example port in the mveusb binding.
- Link to v3: https://lore.kernel.org/r/[email protected]
Changes in v3:
- Fix up a related mvusb example in a different binding that
the scripts were complaining about.
- Fix up the wording on internal vs external MDIO buses in the
mv88e6xxx binding document.
- Remove pointless label and put the right rev-mii into the
MV88E6060 schema.
- Link to v2: https://lore.kernel.org/r/[email protected]
Changes in v2:
- Break out a separate Marvell MV88E6060 binding file. I stand corrected.
- Drop the idea to rely on nodename mdio-external for the external
MDIO bus, keep the compatible, drop patch for the driver.
- Fix more Marvell DT mistakes.
- Fix NXP DT mistakes in a separate patch.
- Fix Marvell ARM64 mistakes in a separate patch.
- Link to v1: https://lore.kernel.org/r/[email protected]
---
Linus Walleij (7):
dt-bindings: net: dsa: Require ports or ethernet-ports
dt-bindings: net: mvusb: Fix up DSA example
ARM: dts: marvell: Fix some common switch mistakes
ARM: dts: nxp: Fix some common switch mistakes
ARM64: dts: marvell: Fix some common switch mistakes
dt-bindings: marvell: Rewrite MV88E6xxx in schema
dt-bindings: marvell: Add Marvell MV88E6060 DSA schema
Documentation/devicetree/bindings/net/dsa/dsa.yaml | 6 +
.../bindings/net/dsa/marvell,mv88e6060.yaml | 88 ++++++
.../bindings/net/dsa/marvell,mv88e6xxx.yaml | 330 +++++++++++++++++++++
.../devicetree/bindings/net/dsa/marvell.txt | 109 -------
.../devicetree/bindings/net/marvell,mvusb.yaml | 7 +-
MAINTAINERS | 3 +-
arch/arm/boot/dts/marvell/armada-370-rd.dts | 24 +-
.../dts/marvell/armada-381-netgear-gs110emx.dts | 44 ++-
.../dts/marvell/armada-385-clearfog-gtr-l8.dts | 38 +--
.../dts/marvell/armada-385-clearfog-gtr-s4.dts | 22 +-
arch/arm/boot/dts/marvell/armada-385-linksys.dtsi | 18 +-
.../boot/dts/marvell/armada-385-turris-omnia.dts | 20 +-
arch/arm/boot/dts/marvell/armada-388-clearfog.dts | 20 +-
.../boot/dts/marvell/armada-xp-linksys-mamba.dts | 18 +-
arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts | 14 +-
arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts | 70 ++---
arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts | 18 +-
arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts | 20 +-
arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts | 18 +-
.../dts/marvell/armada-3720-espressobin-ultra.dts | 14 +-
.../boot/dts/marvell/armada-3720-espressobin.dtsi | 20 +-
.../boot/dts/marvell/armada-3720-gl-mv1000.dts | 20 +-
.../boot/dts/marvell/armada-3720-turris-mox.dts | 189 ++++++------
.../boot/dts/marvell/armada-7040-mochabin.dts | 24 +-
.../dts/marvell/armada-8040-clearfog-gt-8k.dts | 22 +-
arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 42 ++-
26 files changed, 761 insertions(+), 457 deletions(-)
---
base-commit: 1c9be5fea84e409542a186893d219bf7cff22f5a
change-id: 20231008-marvell-88e6152-wan-led-88c43b7fd2fd
Best regards,
--
Linus Walleij <[email protected]>
Bindings using dsa.yaml#/$defs/ethernet-ports specify that
a DSA switch node need to have a ports or ethernet-ports
subnode, and that is actually required, so add requirements
using oneOf.
Suggested-by: Rob Herring <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
---
Documentation/devicetree/bindings/net/dsa/dsa.yaml | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/dsa/dsa.yaml b/Documentation/devicetree/bindings/net/dsa/dsa.yaml
index 6107189d276a..2abd036578d1 100644
--- a/Documentation/devicetree/bindings/net/dsa/dsa.yaml
+++ b/Documentation/devicetree/bindings/net/dsa/dsa.yaml
@@ -46,4 +46,10 @@ $defs:
$ref: dsa-port.yaml#
unevaluatedProperties: false
+oneOf:
+ - required:
+ - ports
+ - required:
+ - ethernet-ports
+
...
--
2.34.1
The Marvell MV88E6060 is one of the oldest DSA switches from
Marvell, and it has DT bindings used in the wild. Let's define
them properly.
It is different enough from the rest of the MV88E6xxx switches
that it deserves its own binding.
Reviewed-by: Andrew Lunn <[email protected]>
Reviewed-by: Vladimir Oltean <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
---
.../bindings/net/dsa/marvell,mv88e6060.yaml | 88 ++++++++++++++++++++++
MAINTAINERS | 1 +
2 files changed, 89 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml
new file mode 100644
index 000000000000..4f1adf00431a
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml
@@ -0,0 +1,88 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6060.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Marvell MV88E6060 DSA switch
+
+maintainers:
+ - Andrew Lunn <[email protected]>
+
+description:
+ The Marvell MV88E6060 switch has been produced and sold by Marvell
+ since at least 2008. The switch has one pin ADDR4 that controls the
+ MDIO address of the switch to be 0x10 or 0x00, and on the MDIO bus
+ connected to the switch, the PHYs inside the switch appear as
+ independent devices on address 0x00-0x04 or 0x10-0x14, so in difference
+ from many other DSA switches this switch does not have an internal
+ MDIO bus for the PHY devices.
+
+properties:
+ compatible:
+ const: marvell,mv88e6060
+ description:
+ The MV88E6060 is the oldest Marvell DSA switch product, and
+ as such a bit limited in features compared to later hardware.
+
+ reg:
+ maxItems: 1
+
+ reset-gpios:
+ description:
+ GPIO to be used to reset the whole device
+ maxItems: 1
+
+allOf:
+ - $ref: dsa.yaml#/$defs/ethernet-ports
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet-switch@16 {
+ compatible = "marvell,mv88e6060";
+ reg = <16>;
+
+ ethernet-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet-port@0 {
+ reg = <0>;
+ label = "lan1";
+ };
+ ethernet-port@1 {
+ reg = <1>;
+ label = "lan2";
+ };
+ ethernet-port@2 {
+ reg = <2>;
+ label = "lan3";
+ };
+ ethernet-port@3 {
+ reg = <3>;
+ label = "lan4";
+ };
+ ethernet-port@5 {
+ reg = <5>;
+ phy-mode = "rev-mii";
+ ethernet = <ðc>;
+ fixed-link {
+ speed = <100>;
+ full-duplex;
+ };
+ };
+ };
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 1b4475254d27..4c933a2a56ad 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -12625,6 +12625,7 @@ MARVELL 88E6XXX ETHERNET SWITCH FABRIC DRIVER
M: Andrew Lunn <[email protected]>
L: [email protected]
S: Maintained
+F: Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml
F: Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml
F: Documentation/networking/devlink/mv88e6xxx.rst
F: drivers/net/dsa/mv88e6xxx/
--
2.34.1
When adding a proper schema for the Marvell mx88e6xxx switch,
the scripts start complaining about this embedded example:
dtschema/dtc warnings/errors:
net/marvell,mvusb.example.dtb: switch@0: ports: '#address-cells'
is a required property
from schema $id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml#
net/marvell,mvusb.example.dtb: switch@0: ports: '#size-cells'
is a required property
from schema $id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml#
Fix this up by extending the example with those properties in
the ports node.
While we are at it, rename "ports" to "ethernet-ports" and rename
"switch" to "ethernet-switch" as this is recommended practice.
Reviewed-by: Andrew Lunn <[email protected]>
Reviewed-by: Vladimir Oltean <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
---
Documentation/devicetree/bindings/net/marvell,mvusb.yaml | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/marvell,mvusb.yaml b/Documentation/devicetree/bindings/net/marvell,mvusb.yaml
index 3a3325168048..ab838c1ffeed 100644
--- a/Documentation/devicetree/bindings/net/marvell,mvusb.yaml
+++ b/Documentation/devicetree/bindings/net/marvell,mvusb.yaml
@@ -50,11 +50,14 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
- switch@0 {
+ ethernet-switch@0 {
compatible = "marvell,mv88e6190";
reg = <0x0>;
- ports {
+ ethernet-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
/* Port definitions */
};
--
2.34.1
Fix some errors in the Marvell MV88E6xxx switch descriptions:
- The top node had no address size or cells.
- switch0@0 is not OK, should be ethernet-switch@0.
- The ports node should be named ethernet-ports
- The ethernet-ports node should have port@0 etc children, no
plural "ports" in the children.
- Ports should be named ethernet-port@0 etc
- PHYs should be named ethernet-phy@0 etc
This serves as an example of fixes needed for introducing a
schema for the bindings, but the patch can simply be applied.
Reviewed-by: Andrew Lunn <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
---
arch/arm/boot/dts/marvell/armada-370-rd.dts | 24 ++++++------
.../dts/marvell/armada-381-netgear-gs110emx.dts | 44 +++++++++++-----------
.../dts/marvell/armada-385-clearfog-gtr-l8.dts | 38 +++++++++----------
.../dts/marvell/armada-385-clearfog-gtr-s4.dts | 22 +++++------
arch/arm/boot/dts/marvell/armada-385-linksys.dtsi | 18 ++++-----
.../boot/dts/marvell/armada-385-turris-omnia.dts | 20 +++++-----
arch/arm/boot/dts/marvell/armada-388-clearfog.dts | 20 +++++-----
.../boot/dts/marvell/armada-xp-linksys-mamba.dts | 18 ++++-----
8 files changed, 96 insertions(+), 108 deletions(-)
diff --git a/arch/arm/boot/dts/marvell/armada-370-rd.dts b/arch/arm/boot/dts/marvell/armada-370-rd.dts
index b459a670f615..1b241da11e94 100644
--- a/arch/arm/boot/dts/marvell/armada-370-rd.dts
+++ b/arch/arm/boot/dts/marvell/armada-370-rd.dts
@@ -149,39 +149,37 @@ led@0 {
};
};
- switch: switch@10 {
+ switch: ethernet-switch@10 {
compatible = "marvell,mv88e6085";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <0x10>;
interrupt-controller;
#interrupt-cells = <2>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@0 {
+ ethernet-port@0 {
reg = <0>;
label = "lan0";
};
- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "lan1";
};
- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan2";
};
- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan3";
};
- port@5 {
+ ethernet-port@5 {
reg = <5>;
ethernet = <ð1>;
phy-mode = "rgmii-id";
@@ -196,25 +194,25 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
- switchphy0: switchphy@0 {
+ switchphy0: ethernet-phy@0 {
reg = <0>;
interrupt-parent = <&switch>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
};
- switchphy1: switchphy@1 {
+ switchphy1: ethernet-phy@1 {
reg = <1>;
interrupt-parent = <&switch>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
};
- switchphy2: switchphy@2 {
+ switchphy2: ethernet-phy@2 {
reg = <2>;
interrupt-parent = <&switch>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
};
- switchphy3: switchphy@3 {
+ switchphy3: ethernet-phy@3 {
reg = <3>;
interrupt-parent = <&switch>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts b/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts
index f4c4b213ef4e..5baf83e5253d 100644
--- a/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts
+++ b/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts
@@ -77,51 +77,49 @@ &mdio {
pinctrl-0 = <&mdio_pins>;
status = "okay";
- switch@0 {
+ ethernet-switch@0 {
compatible = "marvell,mv88e6190";
- #address-cells = <1>;
#interrupt-cells = <2>;
interrupt-controller;
interrupt-parent = <&gpio1>;
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&switch_interrupt_pins>;
pinctrl-names = "default";
- #size-cells = <0>;
reg = <0>;
mdio {
#address-cells = <1>;
#size-cells = <0>;
- switch0phy1: switch0phy1@1 {
+ switch0phy1: ethernet-phy@1 {
reg = <0x1>;
};
- switch0phy2: switch0phy2@2 {
+ switch0phy2: ethernet-phy@2 {
reg = <0x2>;
};
- switch0phy3: switch0phy3@3 {
+ switch0phy3: ethernet-phy@3 {
reg = <0x3>;
};
- switch0phy4: switch0phy4@4 {
+ switch0phy4: ethernet-phy@4 {
reg = <0x4>;
};
- switch0phy5: switch0phy5@5 {
+ switch0phy5: ethernet-phy@5 {
reg = <0x5>;
};
- switch0phy6: switch0phy6@6 {
+ switch0phy6: ethernet-phy@6 {
reg = <0x6>;
};
- switch0phy7: switch0phy7@7 {
+ switch0phy7: ethernet-phy@7 {
reg = <0x7>;
};
- switch0phy8: switch0phy8@8 {
+ switch0phy8: ethernet-phy@8 {
reg = <0x8>;
};
};
@@ -142,11 +140,11 @@ phy2: ethernet-phy@c {
};
};
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@0 {
+ ethernet-port@0 {
ethernet = <ð0>;
phy-mode = "rgmii";
reg = <0>;
@@ -158,55 +156,55 @@ fixed-link {
};
};
- port@1 {
+ ethernet-port@1 {
label = "lan1";
phy-handle = <&switch0phy1>;
reg = <1>;
};
- port@2 {
+ ethernet-port@2 {
label = "lan2";
phy-handle = <&switch0phy2>;
reg = <2>;
};
- port@3 {
+ ethernet-port@3 {
label = "lan3";
phy-handle = <&switch0phy3>;
reg = <3>;
};
- port@4 {
+ ethernet-port@4 {
label = "lan4";
phy-handle = <&switch0phy4>;
reg = <4>;
};
- port@5 {
+ ethernet-port@5 {
label = "lan5";
phy-handle = <&switch0phy5>;
reg = <5>;
};
- port@6 {
+ ethernet-port@6 {
label = "lan6";
phy-handle = <&switch0phy6>;
reg = <6>;
};
- port@7 {
+ ethernet-port@7 {
label = "lan7";
phy-handle = <&switch0phy7>;
reg = <7>;
};
- port@8 {
+ ethernet-port@8 {
label = "lan8";
phy-handle = <&switch0phy8>;
reg = <8>;
};
- port@9 {
+ ethernet-port@9 {
/* 88X3310P external phy */
label = "lan9";
phy-handle = <&phy1>;
@@ -214,7 +212,7 @@ port@9 {
reg = <9>;
};
- port@a {
+ ethernet-port@a {
/* 88X3310P external phy */
label = "lan10";
phy-handle = <&phy2>;
diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts
index 1990f7d0cc79..1707d1b01545 100644
--- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts
+++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts
@@ -7,66 +7,66 @@ / {
};
&mdio {
- switch0: switch0@4 {
+ switch0: ethernet-switch@4 {
compatible = "marvell,mv88e6190";
reg = <4>;
pinctrl-names = "default";
pinctrl-0 = <&cf_gtr_switch_reset_pins>;
reset-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "lan8";
phy-handle = <&switch0phy0>;
};
- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan7";
phy-handle = <&switch0phy1>;
};
- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan6";
phy-handle = <&switch0phy2>;
};
- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "lan5";
phy-handle = <&switch0phy3>;
};
- port@5 {
+ ethernet-port@5 {
reg = <5>;
label = "lan4";
phy-handle = <&switch0phy4>;
};
- port@6 {
+ ethernet-port@6 {
reg = <6>;
label = "lan3";
phy-handle = <&switch0phy5>;
};
- port@7 {
+ ethernet-port@7 {
reg = <7>;
label = "lan2";
phy-handle = <&switch0phy6>;
};
- port@8 {
+ ethernet-port@8 {
reg = <8>;
label = "lan1";
phy-handle = <&switch0phy7>;
};
- port@10 {
+ ethernet-port@10 {
reg = <10>;
phy-mode = "2500base-x";
@@ -83,35 +83,35 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
- switch0phy0: switch0phy0@1 {
+ switch0phy0: ethernet-phy@1 {
reg = <0x1>;
};
- switch0phy1: switch0phy1@2 {
+ switch0phy1: ethernet-phy@2 {
reg = <0x2>;
};
- switch0phy2: switch0phy2@3 {
+ switch0phy2: ethernet-phy@3 {
reg = <0x3>;
};
- switch0phy3: switch0phy3@4 {
+ switch0phy3: ethernet-phy@4 {
reg = <0x4>;
};
- switch0phy4: switch0phy4@5 {
+ switch0phy4: ethernet-phy@5 {
reg = <0x5>;
};
- switch0phy5: switch0phy5@6 {
+ switch0phy5: ethernet-phy@6 {
reg = <0x6>;
};
- switch0phy6: switch0phy6@7 {
+ switch0phy6: ethernet-phy@7 {
reg = <0x7>;
};
- switch0phy7: switch0phy7@8 {
+ switch0phy7: ethernet-phy@8 {
reg = <0x8>;
};
};
diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts
index b795ad573891..a7678a784c18 100644
--- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts
+++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts
@@ -11,42 +11,42 @@ &sfp0 {
};
&mdio {
- switch0: switch0@4 {
+ switch0: ethernet-switch@4 {
compatible = "marvell,mv88e6085";
reg = <4>;
pinctrl-names = "default";
pinctrl-0 = <&cf_gtr_switch_reset_pins>;
reset-gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "lan2";
phy-handle = <&switch0phy0>;
};
- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan1";
phy-handle = <&switch0phy1>;
};
- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan4";
phy-handle = <&switch0phy2>;
};
- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "lan3";
phy-handle = <&switch0phy3>;
};
- port@5 {
+ ethernet-port@5 {
reg = <5>;
phy-mode = "2500base-x";
ethernet = <ð1>;
@@ -63,19 +63,19 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
- switch0phy0: switch0phy0@11 {
+ switch0phy0: ethernet-phy@11 {
reg = <0x11>;
};
- switch0phy1: switch0phy1@12 {
+ switch0phy1: ethernet-phy@12 {
reg = <0x12>;
};
- switch0phy2: switch0phy2@13 {
+ switch0phy2: ethernet-phy@13 {
reg = <0x13>;
};
- switch0phy3: switch0phy3@14 {
+ switch0phy3: ethernet-phy@14 {
reg = <0x14>;
};
};
diff --git a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi
index fc8216fd9f60..4116ed60f709 100644
--- a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi
+++ b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi
@@ -158,42 +158,40 @@ nand: nand@0 {
&mdio {
status = "okay";
- switch@0 {
+ ethernet-switch@0 {
compatible = "marvell,mv88e6085";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <0>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@0 {
+ ethernet-port@0 {
reg = <0>;
label = "lan4";
};
- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "lan3";
};
- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan2";
};
- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan1";
};
- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "wan";
};
- port@5 {
+ ethernet-port@5 {
reg = <5>;
phy-mode = "sgmii";
ethernet = <ð2>;
diff --git a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts
index 2d8d319bec83..7b755bb4e4e7 100644
--- a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts
+++ b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts
@@ -435,12 +435,10 @@ phy1: ethernet-phy@1 {
};
/* Switch MV88E6176 at address 0x10 */
- switch@10 {
+ ethernet-switch@10 {
pinctrl-names = "default";
pinctrl-0 = <&swint_pins>;
compatible = "marvell,mv88e6085";
- #address-cells = <1>;
- #size-cells = <0>;
dsa,member = <0 0>;
reg = <0x10>;
@@ -448,36 +446,36 @@ switch@10 {
interrupt-parent = <&gpio1>;
interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- ports@0 {
+ ethernet-port@0 {
reg = <0>;
label = "lan0";
};
- ports@1 {
+ ethernet-port@1 {
reg = <1>;
label = "lan1";
};
- ports@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan2";
};
- ports@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan3";
};
- ports@4 {
+ ethernet-port@4 {
reg = <4>;
label = "lan4";
};
- ports@5 {
+ ethernet-port@5 {
reg = <5>;
ethernet = <ð1>;
phy-mode = "rgmii-id";
@@ -488,7 +486,7 @@ fixed-link {
};
};
- ports@6 {
+ ethernet-port@6 {
reg = <6>;
ethernet = <ð0>;
phy-mode = "rgmii-id";
diff --git a/arch/arm/boot/dts/marvell/armada-388-clearfog.dts b/arch/arm/boot/dts/marvell/armada-388-clearfog.dts
index 32c569df142f..3290ccad2374 100644
--- a/arch/arm/boot/dts/marvell/armada-388-clearfog.dts
+++ b/arch/arm/boot/dts/marvell/armada-388-clearfog.dts
@@ -92,44 +92,42 @@ pcie2-0-w-disable-hog {
&mdio {
status = "okay";
- switch@4 {
+ ethernet-switch@4 {
compatible = "marvell,mv88e6085";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <4>;
pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
pinctrl-names = "default";
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@0 {
+ ethernet-port@0 {
reg = <0>;
label = "lan5";
};
- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "lan4";
};
- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan3";
};
- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan2";
};
- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "lan1";
};
- port@5 {
+ ethernet-port@5 {
reg = <5>;
ethernet = <ð1>;
phy-mode = "1000base-x";
@@ -140,7 +138,7 @@ fixed-link {
};
};
- port@6 {
+ ethernet-port@6 {
/* 88E1512 external phy */
reg = <6>;
label = "lan6";
diff --git a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts
index 7a0614fd0c93..ea859f7ea042 100644
--- a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts
+++ b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts
@@ -265,42 +265,40 @@ flash@0 {
&mdio {
status = "okay";
- switch@0 {
+ ethernet-switch@0 {
compatible = "marvell,mv88e6085";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <0>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@0 {
+ ethernet-port@0 {
reg = <0>;
label = "lan4";
};
- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "lan3";
};
- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan2";
};
- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan1";
};
- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "internet";
};
- port@5 {
+ ethernet-port@5 {
reg = <5>;
phy-mode = "rgmii-id";
ethernet = <ð0>;
--
2.34.1
Fix some errors in the Marvell MV88E6xxx switch descriptions:
- switch0@0 is not OK, should be ethernet-switch@0
- ports should be ethernet-ports
- port should be ethernet-port
- phy should be ethernet-phy
Reviewed-by: Andrew Lunn <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
---
arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts | 14 ++---
arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts | 70 ++++++++++++------------
arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts | 18 +++---
arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts | 20 +++----
arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts | 18 +++---
5 files changed, 70 insertions(+), 70 deletions(-)
diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts
index 1a19aec8957b..7e72f860c3c5 100644
--- a/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts
+++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts
@@ -162,7 +162,7 @@ mdio1: mdio {
suppress-preamble;
status = "okay";
- switch0: switch0@0 {
+ switch0: ethernet-switch@0 {
compatible = "marvell,mv88e6085";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_switch>;
@@ -173,26 +173,26 @@ switch0: switch0@0 {
interrupt-controller;
#interrupt-cells = <2>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@0 {
+ ethernet-port@0 {
reg = <0>;
label = "eth_cu_1000_1";
};
- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "eth_cu_1000_2";
};
- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "eth_cu_1000_3";
};
- port@5 {
+ ethernet-port@5 {
reg = <5>;
label = "eth_fc_1000_1";
phy-mode = "1000base-x";
@@ -200,7 +200,7 @@ port@5 {
sfp = <&sff>;
};
- port@6 {
+ ethernet-port@6 {
reg = <6>;
phy-mode = "rmii";
ethernet = <&fec1>;
diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts
index df1335492a19..77492eeea450 100644
--- a/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts
+++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts
@@ -47,17 +47,17 @@ mdio_mux_1: mdio@1 {
#address-cells = <1>;
#size-cells = <0>;
- switch0: switch0@0 {
+ switch0: ethernet-switch@0 {
compatible = "marvell,mv88e6190";
reg = <0>;
dsa,member = <0 0>;
eeprom-length = <65536>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@0 {
+ ethernet-port@0 {
reg = <0>;
phy-mode = "rmii";
ethernet = <&fec1>;
@@ -68,37 +68,37 @@ fixed-link {
};
};
- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "aib2main_1";
};
- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "aib2main_2";
};
- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "eth_cu_1000_5";
};
- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "eth_cu_1000_6";
};
- port@5 {
+ ethernet-port@5 {
reg = <5>;
label = "eth_cu_1000_4";
};
- port@6 {
+ ethernet-port@6 {
reg = <6>;
label = "eth_cu_1000_7";
};
- port@7 {
+ ethernet-port@7 {
reg = <7>;
label = "modem_pic";
@@ -108,7 +108,7 @@ fixed-link {
};
};
- switch0port10: port@10 {
+ switch0port10: ethernet-port@10 {
reg = <10>;
label = "dsa";
phy-mode = "xgmii";
@@ -130,32 +130,32 @@ mdio_mux_2: mdio@2 {
#address-cells = <1>;
#size-cells = <0>;
- switch1: switch1@0 {
+ switch1: ethernet-switch@0 {
compatible = "marvell,mv88e6190";
reg = <0>;
dsa,member = <0 1>;
eeprom-length = <65536>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "eth_cu_1000_3";
};
- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "eth_cu_100_2";
};
- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "eth_cu_100_3";
};
- switch1port9: port@9 {
+ switch1port9: ethernet-port@9 {
reg = <9>;
label = "dsa";
phy-mode = "xgmii";
@@ -168,7 +168,7 @@ fixed-link {
};
};
- switch1port10: port@10 {
+ switch1port10: ethernet-port@10 {
reg = <10>;
label = "dsa";
phy-mode = "xgmii";
@@ -188,17 +188,17 @@ mdio_mux_4: mdio@4 {
#address-cells = <1>;
#size-cells = <0>;
- switch2: switch2@0 {
+ switch2: ethernet-switch@0 {
compatible = "marvell,mv88e6190";
reg = <0>;
dsa,member = <0 2>;
eeprom-length = <65536>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "eth_fc_1000_2";
phy-mode = "1000base-x";
@@ -206,7 +206,7 @@ port@2 {
sfp = <&sff1>;
};
- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "eth_fc_1000_3";
phy-mode = "1000base-x";
@@ -214,7 +214,7 @@ port@3 {
sfp = <&sff2>;
};
- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "eth_fc_1000_4";
phy-mode = "1000base-x";
@@ -222,7 +222,7 @@ port@4 {
sfp = <&sff3>;
};
- port@5 {
+ ethernet-port@5 {
reg = <5>;
label = "eth_fc_1000_5";
phy-mode = "1000base-x";
@@ -230,7 +230,7 @@ port@5 {
sfp = <&sff4>;
};
- port@6 {
+ ethernet-port@6 {
reg = <6>;
label = "eth_fc_1000_6";
phy-mode = "1000base-x";
@@ -238,7 +238,7 @@ port@6 {
sfp = <&sff5>;
};
- port@7 {
+ ethernet-port@7 {
reg = <7>;
label = "eth_fc_1000_7";
phy-mode = "1000base-x";
@@ -246,7 +246,7 @@ port@7 {
sfp = <&sff6>;
};
- port@9 {
+ ethernet-port@9 {
reg = <9>;
label = "eth_fc_1000_1";
phy-mode = "1000base-x";
@@ -254,7 +254,7 @@ port@9 {
sfp = <&sff0>;
};
- switch2port10: port@10 {
+ switch2port10: ethernet-port@10 {
reg = <10>;
label = "dsa";
phy-mode = "2500base-x";
@@ -276,17 +276,17 @@ mdio_mux_8: mdio@8 {
#address-cells = <1>;
#size-cells = <0>;
- switch3: switch3@0 {
+ switch3: ethernet-switch@0 {
compatible = "marvell,mv88e6190";
reg = <0>;
dsa,member = <0 3>;
eeprom-length = <65536>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "eth_fc_1000_8";
phy-mode = "1000base-x";
@@ -294,7 +294,7 @@ port@2 {
sfp = <&sff7>;
};
- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "eth_fc_1000_9";
phy-mode = "1000base-x";
@@ -302,7 +302,7 @@ port@3 {
sfp = <&sff8>;
};
- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "eth_fc_1000_10";
phy-mode = "1000base-x";
@@ -310,7 +310,7 @@ port@4 {
sfp = <&sff9>;
};
- switch3port9: port@9 {
+ switch3port9: ethernet-port@9 {
reg = <9>;
label = "dsa";
phy-mode = "2500base-x";
@@ -322,7 +322,7 @@ fixed-link {
};
};
- switch3port10: port@10 {
+ switch3port10: ethernet-port@10 {
reg = <10>;
label = "dsa";
phy-mode = "xgmii";
diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts
index 1461804ecaea..2a490464660c 100644
--- a/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts
+++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts
@@ -123,7 +123,7 @@ mdio1: mdio {
suppress-preamble;
status = "okay";
- switch0: switch0@0 {
+ switch0: ethernet-switch@0 {
compatible = "marvell,mv88e6190";
pinctrl-0 = <&pinctrl_gpio_switch0>;
pinctrl-names = "default";
@@ -134,11 +134,11 @@ switch0: switch0@0 {
interrupt-controller;
#interrupt-cells = <2>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@0 {
+ ethernet-port@0 {
reg = <0>;
phy-mode = "rmii";
ethernet = <&fec1>;
@@ -149,32 +149,32 @@ fixed-link {
};
};
- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "eth_cu_1000_1";
};
- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "eth_cu_1000_2";
};
- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "eth_cu_1000_3";
};
- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "eth_cu_1000_4";
};
- port@5 {
+ ethernet-port@5 {
reg = <5>;
label = "eth_cu_1000_5";
};
- port@6 {
+ ethernet-port@6 {
reg = <6>;
label = "eth_cu_1000_6";
};
diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts
index 463c2452b9b7..078d8699e16d 100644
--- a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts
+++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts
@@ -112,7 +112,7 @@ mdio1: mdio {
suppress-preamble;
status = "okay";
- switch0: switch0@0 {
+ switch0: ethernet-switch@0 {
compatible = "marvell,mv88e6190";
pinctrl-0 = <&pinctrl_gpio_switch0>;
pinctrl-names = "default";
@@ -123,11 +123,11 @@ switch0: switch0@0 {
interrupt-controller;
#interrupt-cells = <2>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@0 {
+ ethernet-port@0 {
reg = <0>;
phy-mode = "rmii";
ethernet = <&fec1>;
@@ -138,27 +138,27 @@ fixed-link {
};
};
- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "eth_cu_100_3";
};
- port@5 {
+ ethernet-port@5 {
reg = <5>;
label = "eth_cu_1000_4";
};
- port@6 {
+ ethernet-port@6 {
reg = <6>;
label = "eth_cu_1000_5";
};
- port@8 {
+ ethernet-port@8 {
reg = <8>;
label = "eth_cu_1000_1";
};
- port@9 {
+ ethernet-port@9 {
reg = <9>;
label = "eth_cu_1000_2";
phy-handle = <&phy9>;
@@ -167,12 +167,12 @@ port@9 {
};
};
- mdio1 {
+ mdio-external {
compatible = "marvell,mv88e6xxx-mdio-external";
#address-cells = <1>;
#size-cells = <0>;
- phy9: phy9@0 {
+ phy9: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c45";
pinctrl-0 = <&pinctrl_gpio_phy9>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts
index f5ae0d5de315..22c8f44390a9 100644
--- a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts
+++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts
@@ -137,7 +137,7 @@ mdio1: mdio {
suppress-preamble;
status = "okay";
- switch0: switch0@0 {
+ switch0: ethernet-switch@0 {
compatible = "marvell,mv88e6190";
pinctrl-0 = <&pinctrl_gpio_switch0>;
pinctrl-names = "default";
@@ -148,11 +148,11 @@ switch0: switch0@0 {
interrupt-controller;
#interrupt-cells = <2>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@0 {
+ ethernet-port@0 {
reg = <0>;
phy-mode = "rmii";
ethernet = <&fec1>;
@@ -163,32 +163,32 @@ fixed-link {
};
};
- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "eth_cu_1000_1";
};
- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "eth_cu_1000_2";
};
- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "eth_cu_1000_3";
};
- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "eth_cu_1000_4";
};
- port@5 {
+ ethernet-port@5 {
reg = <5>;
label = "eth_cu_1000_5";
};
- port@6 {
+ ethernet-port@6 {
reg = <6>;
label = "eth_cu_1000_6";
};
--
2.34.1
Fix some errors in the Marvell MV88E6xxx switch descriptions:
- The top node had no address size or cells.
- switch0@0 is not OK, should be ethernet-switch@0.
- ports should be ethernet-ports
- port@0 should be ethernet-port@0
- PHYs should be named ethernet-phy@
Reviewed-by: Andrew Lunn <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
---
.../dts/marvell/armada-3720-espressobin-ultra.dts | 14 +-
.../boot/dts/marvell/armada-3720-espressobin.dtsi | 20 +--
.../boot/dts/marvell/armada-3720-gl-mv1000.dts | 20 +--
.../boot/dts/marvell/armada-3720-turris-mox.dts | 189 +++++++++++----------
.../boot/dts/marvell/armada-7040-mochabin.dts | 24 ++-
.../dts/marvell/armada-8040-clearfog-gt-8k.dts | 22 +--
arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 42 +++--
7 files changed, 164 insertions(+), 167 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
index f9abef8dcc94..870bb380a40a 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
@@ -126,32 +126,32 @@ &switch0 {
reset-gpios = <&gpiosb 23 GPIO_ACTIVE_LOW>;
- ports {
- switch0port1: port@1 {
+ ethernet-ports {
+ switch0port1: ethernet-port@1 {
reg = <1>;
label = "lan0";
phy-handle = <&switch0phy0>;
};
- switch0port2: port@2 {
+ switch0port2: ethernet-port@2 {
reg = <2>;
label = "lan1";
phy-handle = <&switch0phy1>;
};
- switch0port3: port@3 {
+ switch0port3: ethernet-port@3 {
reg = <3>;
label = "lan2";
phy-handle = <&switch0phy2>;
};
- switch0port4: port@4 {
+ switch0port4: ethernet-port@4 {
reg = <4>;
label = "lan3";
phy-handle = <&switch0phy3>;
};
- switch0port5: port@5 {
+ switch0port5: ethernet-port@5 {
reg = <5>;
label = "wan";
phy-handle = <&extphy>;
@@ -160,7 +160,7 @@ switch0port5: port@5 {
};
mdio {
- switch0phy3: switch0phy3@14 {
+ switch0phy3: ethernet-phy@14 {
reg = <0x14>;
};
};
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
index 5fc613d24151..86ec0df1c676 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
@@ -145,19 +145,17 @@ &usb2 {
};
&mdio {
- switch0: switch0@1 {
+ switch0: ethernet-switch@1 {
compatible = "marvell,mv88e6085";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <1>;
dsa,member = <0 0>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- switch0port0: port@0 {
+ switch0port0: ethernet-port@0 {
reg = <0>;
label = "cpu";
ethernet = <ð0>;
@@ -168,19 +166,19 @@ fixed-link {
};
};
- switch0port1: port@1 {
+ switch0port1: ethernet-port@1 {
reg = <1>;
label = "wan";
phy-handle = <&switch0phy0>;
};
- switch0port2: port@2 {
+ switch0port2: ethernet-port@2 {
reg = <2>;
label = "lan0";
phy-handle = <&switch0phy1>;
};
- switch0port3: port@3 {
+ switch0port3: ethernet-port@3 {
reg = <3>;
label = "lan1";
phy-handle = <&switch0phy2>;
@@ -192,13 +190,13 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
- switch0phy0: switch0phy0@11 {
+ switch0phy0: ethernet-phy@11 {
reg = <0x11>;
};
- switch0phy1: switch0phy1@12 {
+ switch0phy1: ethernet-phy@12 {
reg = <0x12>;
};
- switch0phy2: switch0phy2@13 {
+ switch0phy2: ethernet-phy@13 {
reg = <0x13>;
};
};
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
index b1b45b4fa9d4..63fbc8352161 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
@@ -152,31 +152,29 @@ &uart0 {
};
&mdio {
- switch0: switch0@1 {
+ switch0: ethernet-switch@1 {
compatible = "marvell,mv88e6085";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <1>;
dsa,member = <0 0>;
- ports: ports {
+ ports: ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@0 {
+ ethernet-port@0 {
reg = <0>;
label = "cpu";
ethernet = <ð0>;
};
- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "wan";
phy-handle = <&switch0phy0>;
};
- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan0";
phy-handle = <&switch0phy1>;
@@ -185,7 +183,7 @@ port@2 {
nvmem-cell-names = "mac-address";
};
- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan1";
phy-handle = <&switch0phy2>;
@@ -199,13 +197,13 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
- switch0phy0: switch0phy0@11 {
+ switch0phy0: ethernet-phy@11 {
reg = <0x11>;
};
- switch0phy1: switch0phy1@12 {
+ switch0phy1: ethernet-phy@12 {
reg = <0x12>;
};
- switch0phy2: switch0phy2@13 {
+ switch0phy2: ethernet-phy@13 {
reg = <0x13>;
};
};
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
index 9eab2bb22134..cdf1b8bdb230 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
@@ -304,7 +304,12 @@ phy1: ethernet-phy@1 {
reg = <1>;
};
- /* switch nodes are enabled by U-Boot if modules are present */
+ /*
+ * NOTE: switch nodes are enabled by U-Boot if modules are present
+ * DO NOT change this node name (switch0@10) even if it is not following
+ * conventions! Deployed U-Boot binaries are explicitly looking for
+ * this node in order to augment the device tree!
+ */
switch0@10 {
compatible = "marvell,mv88e6190";
reg = <0x10>;
@@ -317,92 +322,92 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
- switch0phy1: switch0phy1@1 {
+ switch0phy1: ethernet-phy@1 {
reg = <0x1>;
};
- switch0phy2: switch0phy2@2 {
+ switch0phy2: ethernet-phy@2 {
reg = <0x2>;
};
- switch0phy3: switch0phy3@3 {
+ switch0phy3: ethernet-phy@3 {
reg = <0x3>;
};
- switch0phy4: switch0phy4@4 {
+ switch0phy4: ethernet-phy@4 {
reg = <0x4>;
};
- switch0phy5: switch0phy5@5 {
+ switch0phy5: ethernet-phy@5 {
reg = <0x5>;
};
- switch0phy6: switch0phy6@6 {
+ switch0phy6: ethernet-phy@6 {
reg = <0x6>;
};
- switch0phy7: switch0phy7@7 {
+ switch0phy7: ethernet-phy@7 {
reg = <0x7>;
};
- switch0phy8: switch0phy8@8 {
+ switch0phy8: ethernet-phy@8 {
reg = <0x8>;
};
};
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@1 {
+ ethernet-port@1 {
reg = <0x1>;
label = "lan1";
phy-handle = <&switch0phy1>;
};
- port@2 {
+ ethernet-port@2 {
reg = <0x2>;
label = "lan2";
phy-handle = <&switch0phy2>;
};
- port@3 {
+ ethernet-port@3 {
reg = <0x3>;
label = "lan3";
phy-handle = <&switch0phy3>;
};
- port@4 {
+ ethernet-port@4 {
reg = <0x4>;
label = "lan4";
phy-handle = <&switch0phy4>;
};
- port@5 {
+ ethernet-port@5 {
reg = <0x5>;
label = "lan5";
phy-handle = <&switch0phy5>;
};
- port@6 {
+ ethernet-port@6 {
reg = <0x6>;
label = "lan6";
phy-handle = <&switch0phy6>;
};
- port@7 {
+ ethernet-port@7 {
reg = <0x7>;
label = "lan7";
phy-handle = <&switch0phy7>;
};
- port@8 {
+ ethernet-port@8 {
reg = <0x8>;
label = "lan8";
phy-handle = <&switch0phy8>;
};
- port@9 {
+ ethernet-port@9 {
reg = <0x9>;
label = "cpu";
ethernet = <ð1>;
@@ -410,7 +415,7 @@ port@9 {
managed = "in-band-status";
};
- switch0port10: port@a {
+ switch0port10: ethernet-port@a {
reg = <0xa>;
label = "dsa";
phy-mode = "2500base-x";
@@ -430,7 +435,7 @@ port-sfp@a {
};
};
- switch0@2 {
+ ethernet-switch@2 {
compatible = "marvell,mv88e6085";
reg = <0x2>;
dsa,member = <0 0>;
@@ -442,52 +447,52 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
- switch0phy1_topaz: switch0phy1@11 {
+ switch0phy1_topaz: ethernet-phy@11 {
reg = <0x11>;
};
- switch0phy2_topaz: switch0phy2@12 {
+ switch0phy2_topaz: ethernet-phy@12 {
reg = <0x12>;
};
- switch0phy3_topaz: switch0phy3@13 {
+ switch0phy3_topaz: ethernet-phy@13 {
reg = <0x13>;
};
- switch0phy4_topaz: switch0phy4@14 {
+ switch0phy4_topaz: ethernet-phy@14 {
reg = <0x14>;
};
};
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@1 {
+ ethernet-port@1 {
reg = <0x1>;
label = "lan1";
phy-handle = <&switch0phy1_topaz>;
};
- port@2 {
+ ethernet-port@2 {
reg = <0x2>;
label = "lan2";
phy-handle = <&switch0phy2_topaz>;
};
- port@3 {
+ ethernet-port@3 {
reg = <0x3>;
label = "lan3";
phy-handle = <&switch0phy3_topaz>;
};
- port@4 {
+ ethernet-port@4 {
reg = <0x4>;
label = "lan4";
phy-handle = <&switch0phy4_topaz>;
};
- port@5 {
+ ethernet-port@5 {
reg = <0x5>;
label = "cpu";
phy-mode = "2500base-x";
@@ -497,7 +502,7 @@ port@5 {
};
};
- switch1@11 {
+ ethernet-switch@11 {
compatible = "marvell,mv88e6190";
reg = <0x11>;
dsa,member = <0 1>;
@@ -509,92 +514,92 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
- switch1phy1: switch1phy1@1 {
+ switch1phy1: ethernet-phy@1 {
reg = <0x1>;
};
- switch1phy2: switch1phy2@2 {
+ switch1phy2: ethernet-phy@2 {
reg = <0x2>;
};
- switch1phy3: switch1phy3@3 {
+ switch1phy3: ethernet-phy@3 {
reg = <0x3>;
};
- switch1phy4: switch1phy4@4 {
+ switch1phy4: ethernet-phy@4 {
reg = <0x4>;
};
- switch1phy5: switch1phy5@5 {
+ switch1phy5: ethernet-phy@5 {
reg = <0x5>;
};
- switch1phy6: switch1phy6@6 {
+ switch1phy6: ethernet-phy@6 {
reg = <0x6>;
};
- switch1phy7: switch1phy7@7 {
+ switch1phy7: ethernet-phy@7 {
reg = <0x7>;
};
- switch1phy8: switch1phy8@8 {
+ switch1phy8: ethernet-phy@8 {
reg = <0x8>;
};
};
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@1 {
+ ethernet-port@1 {
reg = <0x1>;
label = "lan9";
phy-handle = <&switch1phy1>;
};
- port@2 {
+ ethernet-port@2 {
reg = <0x2>;
label = "lan10";
phy-handle = <&switch1phy2>;
};
- port@3 {
+ ethernet-port@3 {
reg = <0x3>;
label = "lan11";
phy-handle = <&switch1phy3>;
};
- port@4 {
+ ethernet-port@4 {
reg = <0x4>;
label = "lan12";
phy-handle = <&switch1phy4>;
};
- port@5 {
+ ethernet-port@5 {
reg = <0x5>;
label = "lan13";
phy-handle = <&switch1phy5>;
};
- port@6 {
+ ethernet-port@6 {
reg = <0x6>;
label = "lan14";
phy-handle = <&switch1phy6>;
};
- port@7 {
+ ethernet-port@7 {
reg = <0x7>;
label = "lan15";
phy-handle = <&switch1phy7>;
};
- port@8 {
+ ethernet-port@8 {
reg = <0x8>;
label = "lan16";
phy-handle = <&switch1phy8>;
};
- switch1port9: port@9 {
+ switch1port9: ethernet-port@9 {
reg = <0x9>;
label = "dsa";
phy-mode = "2500base-x";
@@ -602,7 +607,7 @@ switch1port9: port@9 {
link = <&switch0port10>;
};
- switch1port10: port@a {
+ switch1port10: ethernet-port@a {
reg = <0xa>;
label = "dsa";
phy-mode = "2500base-x";
@@ -622,7 +627,7 @@ port-sfp@a {
};
};
- switch1@2 {
+ ethernet-switch@2 {
compatible = "marvell,mv88e6085";
reg = <0x2>;
dsa,member = <0 1>;
@@ -634,52 +639,52 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
- switch1phy1_topaz: switch1phy1@11 {
+ switch1phy1_topaz: ethernet-phy@11 {
reg = <0x11>;
};
- switch1phy2_topaz: switch1phy2@12 {
+ switch1phy2_topaz: ethernet-phy@12 {
reg = <0x12>;
};
- switch1phy3_topaz: switch1phy3@13 {
+ switch1phy3_topaz: ethernet-phy@13 {
reg = <0x13>;
};
- switch1phy4_topaz: switch1phy4@14 {
+ switch1phy4_topaz: ethernet-phy@14 {
reg = <0x14>;
};
};
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@1 {
+ ethernet-port@1 {
reg = <0x1>;
label = "lan9";
phy-handle = <&switch1phy1_topaz>;
};
- port@2 {
+ ethernet-port@2 {
reg = <0x2>;
label = "lan10";
phy-handle = <&switch1phy2_topaz>;
};
- port@3 {
+ ethernet-port@3 {
reg = <0x3>;
label = "lan11";
phy-handle = <&switch1phy3_topaz>;
};
- port@4 {
+ ethernet-port@4 {
reg = <0x4>;
label = "lan12";
phy-handle = <&switch1phy4_topaz>;
};
- port@5 {
+ ethernet-port@5 {
reg = <0x5>;
label = "dsa";
phy-mode = "2500base-x";
@@ -689,7 +694,7 @@ port@5 {
};
};
- switch2@12 {
+ ethernet-switch@12 {
compatible = "marvell,mv88e6190";
reg = <0x12>;
dsa,member = <0 2>;
@@ -701,92 +706,92 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
- switch2phy1: switch2phy1@1 {
+ switch2phy1: ethernet-phy@1 {
reg = <0x1>;
};
- switch2phy2: switch2phy2@2 {
+ switch2phy2: ethernet-phy@2 {
reg = <0x2>;
};
- switch2phy3: switch2phy3@3 {
+ switch2phy3: ethernet-phy@3 {
reg = <0x3>;
};
- switch2phy4: switch2phy4@4 {
+ switch2phy4: ethernet-phy@4 {
reg = <0x4>;
};
- switch2phy5: switch2phy5@5 {
+ switch2phy5: ethernet-phy@5 {
reg = <0x5>;
};
- switch2phy6: switch2phy6@6 {
+ switch2phy6: ethernet-phy@6 {
reg = <0x6>;
};
- switch2phy7: switch2phy7@7 {
+ switch2phy7: ethernet-phy@7 {
reg = <0x7>;
};
- switch2phy8: switch2phy8@8 {
+ switch2phy8: ethernet-phy@8 {
reg = <0x8>;
};
};
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@1 {
+ ethernet-port@1 {
reg = <0x1>;
label = "lan17";
phy-handle = <&switch2phy1>;
};
- port@2 {
+ ethernet-port@2 {
reg = <0x2>;
label = "lan18";
phy-handle = <&switch2phy2>;
};
- port@3 {
+ ethernet-port@3 {
reg = <0x3>;
label = "lan19";
phy-handle = <&switch2phy3>;
};
- port@4 {
+ ethernet-port@4 {
reg = <0x4>;
label = "lan20";
phy-handle = <&switch2phy4>;
};
- port@5 {
+ ethernet-port@5 {
reg = <0x5>;
label = "lan21";
phy-handle = <&switch2phy5>;
};
- port@6 {
+ ethernet-port@6 {
reg = <0x6>;
label = "lan22";
phy-handle = <&switch2phy6>;
};
- port@7 {
+ ethernet-port@7 {
reg = <0x7>;
label = "lan23";
phy-handle = <&switch2phy7>;
};
- port@8 {
+ ethernet-port@8 {
reg = <0x8>;
label = "lan24";
phy-handle = <&switch2phy8>;
};
- switch2port9: port@9 {
+ switch2port9: ethernet-port@9 {
reg = <0x9>;
label = "dsa";
phy-mode = "2500base-x";
@@ -805,7 +810,7 @@ port-sfp@a {
};
};
- switch2@2 {
+ ethernet-switch@2 {
compatible = "marvell,mv88e6085";
reg = <0x2>;
dsa,member = <0 2>;
@@ -817,52 +822,52 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
- switch2phy1_topaz: switch2phy1@11 {
+ switch2phy1_topaz: ethernet-phy@11 {
reg = <0x11>;
};
- switch2phy2_topaz: switch2phy2@12 {
+ switch2phy2_topaz: ethernet-phy@12 {
reg = <0x12>;
};
- switch2phy3_topaz: switch2phy3@13 {
+ switch2phy3_topaz: ethernet-phy@13 {
reg = <0x13>;
};
- switch2phy4_topaz: switch2phy4@14 {
+ switch2phy4_topaz: ethernet-phy@14 {
reg = <0x14>;
};
};
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@1 {
+ ethernet-port@1 {
reg = <0x1>;
label = "lan17";
phy-handle = <&switch2phy1_topaz>;
};
- port@2 {
+ ethernet-port@2 {
reg = <0x2>;
label = "lan18";
phy-handle = <&switch2phy2_topaz>;
};
- port@3 {
+ ethernet-port@3 {
reg = <0x3>;
label = "lan19";
phy-handle = <&switch2phy3_topaz>;
};
- port@4 {
+ ethernet-port@4 {
reg = <0x4>;
label = "lan20";
phy-handle = <&switch2phy4_topaz>;
};
- port@5 {
+ ethernet-port@5 {
reg = <0x5>;
label = "dsa";
phy-mode = "2500base-x";
diff --git a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
index 48202810bf78..40b7ee7ead72 100644
--- a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
+++ b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
@@ -301,10 +301,8 @@ eth2phy: ethernet-phy@1 {
};
/* 88E6141 Topaz switch */
- switch: switch@3 {
+ switch: ethernet-switch@3 {
compatible = "marvell,mv88e6085";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <3>;
pinctrl-names = "default";
@@ -314,35 +312,35 @@ switch: switch@3 {
interrupt-parent = <&cp0_gpio1>;
interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- swport1: port@1 {
+ swport1: ethernet-port@1 {
reg = <1>;
label = "lan0";
phy-handle = <&swphy1>;
};
- swport2: port@2 {
+ swport2: ethernet-port@2 {
reg = <2>;
label = "lan1";
phy-handle = <&swphy2>;
};
- swport3: port@3 {
+ swport3: ethernet-port@3 {
reg = <3>;
label = "lan2";
phy-handle = <&swphy3>;
};
- swport4: port@4 {
+ swport4: ethernet-port@4 {
reg = <4>;
label = "lan3";
phy-handle = <&swphy4>;
};
- port@5 {
+ ethernet-port@5 {
reg = <5>;
label = "cpu";
ethernet = <&cp0_eth1>;
@@ -355,19 +353,19 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
- swphy1: swphy1@17 {
+ swphy1: ethernet-phy@17 {
reg = <17>;
};
- swphy2: swphy2@18 {
+ swphy2: ethernet-phy@18 {
reg = <18>;
};
- swphy3: swphy3@19 {
+ swphy3: ethernet-phy@19 {
reg = <19>;
};
- swphy4: swphy4@20 {
+ swphy4: ethernet-phy@20 {
reg = <20>;
};
};
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
index 4125202028c8..67892f0d2863 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
@@ -497,42 +497,42 @@ ge_phy: ethernet-phy@0 {
reset-deassert-us = <10000>;
};
- switch0: switch0@4 {
+ switch0: ethernet-switch@4 {
compatible = "marvell,mv88e6085";
reg = <4>;
pinctrl-names = "default";
pinctrl-0 = <&cp1_switch_reset_pins>;
reset-gpios = <&cp1_gpio1 24 GPIO_ACTIVE_LOW>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "lan2";
phy-handle = <&switch0phy0>;
};
- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "lan1";
phy-handle = <&switch0phy1>;
};
- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "lan4";
phy-handle = <&switch0phy2>;
};
- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "lan3";
phy-handle = <&switch0phy3>;
};
- port@5 {
+ ethernet-port@5 {
reg = <5>;
label = "cpu";
ethernet = <&cp1_eth2>;
@@ -545,19 +545,19 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
- switch0phy0: switch0phy0@11 {
+ switch0phy0: ethernet-phy@11 {
reg = <0x11>;
};
- switch0phy1: switch0phy1@12 {
+ switch0phy1: ethernet-phy@12 {
reg = <0x12>;
};
- switch0phy2: switch0phy2@13 {
+ switch0phy2: ethernet-phy@13 {
reg = <0x13>;
};
- switch0phy3: switch0phy3@14 {
+ switch0phy3: ethernet-phy@14 {
reg = <0x14>;
};
};
diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
index 32cfb3e2efc3..7538ed56053b 100644
--- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
@@ -207,11 +207,9 @@ phy0: ethernet-phy@0 {
reg = <0>;
};
- switch6: switch0@6 {
+ switch6: ethernet-switch@6 {
/* Actual device is MV88E6393X */
compatible = "marvell,mv88e6190";
- #address-cells = <1>;
- #size-cells = <0>;
reg = <6>;
interrupt-parent = <&cp0_gpio1>;
interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
@@ -220,59 +218,59 @@ switch6: switch0@6 {
dsa,member = <0 0>;
- ports {
+ ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
- port@1 {
+ ethernet-port@1 {
reg = <1>;
label = "p1";
phy-handle = <&switch0phy1>;
};
- port@2 {
+ ethernet-port@2 {
reg = <2>;
label = "p2";
phy-handle = <&switch0phy2>;
};
- port@3 {
+ ethernet-port@3 {
reg = <3>;
label = "p3";
phy-handle = <&switch0phy3>;
};
- port@4 {
+ ethernet-port@4 {
reg = <4>;
label = "p4";
phy-handle = <&switch0phy4>;
};
- port@5 {
+ ethernet-port@5 {
reg = <5>;
label = "p5";
phy-handle = <&switch0phy5>;
};
- port@6 {
+ ethernet-port@6 {
reg = <6>;
label = "p6";
phy-handle = <&switch0phy6>;
};
- port@7 {
+ ethernet-port@7 {
reg = <7>;
label = "p7";
phy-handle = <&switch0phy7>;
};
- port@8 {
+ ethernet-port@8 {
reg = <8>;
label = "p8";
phy-handle = <&switch0phy8>;
};
- port@9 {
+ ethernet-port@9 {
reg = <9>;
label = "p9";
phy-mode = "10gbase-r";
@@ -280,7 +278,7 @@ port@9 {
managed = "in-band-status";
};
- port@a {
+ ethernet-port@a {
reg = <10>;
ethernet = <&cp0_eth0>;
phy-mode = "10gbase-r";
@@ -293,35 +291,35 @@ mdio {
#address-cells = <1>;
#size-cells = <0>;
- switch0phy1: switch0phy1@1 {
+ switch0phy1: ethernet-phy@1 {
reg = <0x1>;
};
- switch0phy2: switch0phy2@2 {
+ switch0phy2: ethernet-phy@2 {
reg = <0x2>;
};
- switch0phy3: switch0phy3@3 {
+ switch0phy3: ethernet-phy@3 {
reg = <0x3>;
};
- switch0phy4: switch0phy4@4 {
+ switch0phy4: ethernet-phy@4 {
reg = <0x4>;
};
- switch0phy5: switch0phy5@5 {
+ switch0phy5: ethernet-phy@5 {
reg = <0x5>;
};
- switch0phy6: switch0phy6@6 {
+ switch0phy6: ethernet-phy@6 {
reg = <0x6>;
};
- switch0phy7: switch0phy7@7 {
+ switch0phy7: ethernet-phy@7 {
reg = <0x7>;
};
- switch0phy8: switch0phy8@8 {
+ switch0phy8: ethernet-phy@8 {
reg = <0x8>;
};
};
--
2.34.1
This is an attempt to rewrite the Marvell MV88E6xxx switch bindings
in YAML schema.
The current text binding says:
WARNING: This binding is currently unstable. Do not program it into a
FLASH never to be changed again. Once this binding is stable, this
warning will be removed.
Well that never happened before we switched to YAML markup,
we can't have it like this, what about fixing the mess?
Reviewed-by: Andrew Lunn <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
---
.../bindings/net/dsa/marvell,mv88e6xxx.yaml | 330 +++++++++++++++++++++
.../devicetree/bindings/net/dsa/marvell.txt | 109 -------
MAINTAINERS | 2 +-
3 files changed, 331 insertions(+), 110 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml
new file mode 100644
index 000000000000..34d8561a2187
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml
@@ -0,0 +1,330 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Marvell MV88E6xxx DSA switch family
+
+maintainers:
+ - Andrew Lunn <[email protected]>
+
+description:
+ The Marvell MV88E6xxx switch series has been produced and sold
+ by Marvell since at least 2008. The switch has a few compatibles which
+ just indicate the base address of the switch, then operating systems
+ can investigate switch ID registers to find out which actual version
+ of the switch it is dealing with.
+
+properties:
+ compatible:
+ enum:
+ - marvell,mv88e6085
+ - marvell,mv88e6190
+ - marvell,mv88e6250
+ description: |
+ marvell,mv88e6085: This switch uses base address 0x10.
+ This switch and its siblings will be autodetected from
+ ID registers found in the switch, so only "marvell,mv88e6085" should be
+ specified. This includes the following list of MV88Exxxx switches:
+ 6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165, 6171, 6172, 6175, 6176,
+ 6185, 6240, 6320, 6321, 6341, 6350, 6351, 6352
+ marvell,mv88e6190: This switch uses base address 0x00.
+ This switch and its siblings will be autodetected from
+ ID registers found in the switch, so only "marvell,mv88e6190" should be
+ specified. This includes the following list of MV88Exxxx switches:
+ 6190, 6190X, 6191, 6290, 6361, 6390, 6390X
+ marvell,mv88e6250: This switch uses base address 0x08 or 0x18.
+ This switch and its siblings will be autodetected from
+ ID registers found in the switch, so only "marvell,mv88e6250" should be
+ specified. This includes the following list of MV88Exxxx switches:
+ 6220, 6250
+
+ reg:
+ maxItems: 1
+
+ eeprom-length:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: Set to the length of an EEPROM connected to the switch. Must be
+ set if the switch can not detect the presence and/or size of a connected
+ EEPROM, otherwise optional.
+
+ reset-gpios:
+ description:
+ GPIO to be used to reset the whole device
+ maxItems: 1
+
+ interrupts:
+ description: The switch provides an external interrupt line, but it is
+ not always used by target systems.
+ maxItems: 1
+
+ interrupt-controller:
+ description: The switch has an internal interrupt controller used by
+ the different sub-blocks.
+
+ '#interrupt-cells':
+ description: The internal interrupt controller only supports triggering
+ on active high level interrupts so the second cell must alway be set to
+ IRQ_TYPE_LEVEL_HIGH.
+ const: 2
+
+ mdio:
+ $ref: /schemas/net/mdio.yaml#
+ unevaluatedProperties: false
+ description: Marvell MV88E6xxx switches have an varying combination of
+ internal and external MDIO buses, in some cases a combined bus that
+ can be used both internally and externally. This node is for the
+ primary bus, used internally and sometimes also externally.
+
+ mdio-external:
+ $ref: /schemas/net/mdio.yaml#
+ unevaluatedProperties: false
+ description: Marvell MV88E6xxx switches that have a separate external
+ MDIO bus use this port to access external components on the MDIO bus.
+
+ properties:
+ compatible:
+ const: marvell,mv88e6xxx-mdio-external
+
+ required:
+ - compatible
+
+allOf:
+ - $ref: dsa.yaml#/$defs/ethernet-ports
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet-switch@0 {
+ compatible = "marvell,mv88e6085";
+ reg = <0>;
+ reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sw_phy0: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+
+ sw_phy1: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+
+ sw_phy2: ethernet-phy@2 {
+ reg = <0x2>;
+ };
+
+ sw_phy3: ethernet-phy@3 {
+ reg = <0x3>;
+ };
+ };
+
+ ethernet-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet-port@0 {
+ reg = <0>;
+ label = "lan4";
+ phy-handle = <&sw_phy0>;
+ phy-mode = "internal";
+ };
+
+ ethernet-port@1 {
+ reg = <1>;
+ label = "lan3";
+ phy-handle = <&sw_phy1>;
+ phy-mode = "internal";
+ };
+
+ ethernet-port@2 {
+ reg = <2>;
+ label = "lan2";
+ phy-handle = <&sw_phy2>;
+ phy-mode = "internal";
+ };
+
+ ethernet-port@3 {
+ reg = <3>;
+ label = "lan1";
+ phy-handle = <&sw_phy3>;
+ phy-mode = "internal";
+ };
+
+ ethernet-port@5 {
+ reg = <5>;
+ ethernet = <&fec>;
+ phy-mode = "rgmii-id";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
+ };
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet-switch@0 {
+ compatible = "marvell,mv88e6190";
+ #interrupt-cells = <2>;
+ interrupt-controller;
+ interrupt-parent = <&gpio1>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-0 = <&switch_interrupt_pins>;
+ pinctrl-names = "default";
+ reg = <0>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ switch0phy1: ethernet-phy@1 {
+ reg = <0x1>;
+ };
+
+ switch0phy2: ethernet-phy@2 {
+ reg = <0x2>;
+ };
+
+ switch0phy3: ethernet-phy@3 {
+ reg = <0x3>;
+ };
+
+ switch0phy4: ethernet-phy@4 {
+ reg = <0x4>;
+ };
+
+ switch0phy5: ethernet-phy@5 {
+ reg = <0x5>;
+ };
+
+ switch0phy6: ethernet-phy@6 {
+ reg = <0x6>;
+ };
+
+ switch0phy7: ethernet-phy@7 {
+ reg = <0x7>;
+ };
+
+ switch0phy8: ethernet-phy@8 {
+ reg = <0x8>;
+ };
+ };
+
+ mdio-external {
+ compatible = "marvell,mv88e6xxx-mdio-external";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy1: ethernet-phy@b {
+ reg = <0xb>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ };
+
+ phy2: ethernet-phy@c {
+ reg = <0xc>;
+ compatible = "ethernet-phy-ieee802.3-c45";
+ };
+ };
+
+ ethernet-ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ ethernet-port@0 {
+ ethernet = <ð0>;
+ phy-mode = "rgmii";
+ reg = <0>;
+
+ fixed-link {
+ full-duplex;
+ pause;
+ speed = <1000>;
+ };
+ };
+
+ ethernet-port@1 {
+ label = "lan1";
+ phy-handle = <&switch0phy1>;
+ reg = <1>;
+ };
+
+ ethernet-port@2 {
+ label = "lan2";
+ phy-handle = <&switch0phy2>;
+ reg = <2>;
+ };
+
+ ethernet-port@3 {
+ label = "lan3";
+ phy-handle = <&switch0phy3>;
+ reg = <3>;
+ };
+
+ ethernet-port@4 {
+ label = "lan4";
+ phy-handle = <&switch0phy4>;
+ reg = <4>;
+ };
+
+ ethernet-port@5 {
+ label = "lan5";
+ phy-handle = <&switch0phy5>;
+ reg = <5>;
+ };
+
+ ethernet-port@6 {
+ label = "lan6";
+ phy-handle = <&switch0phy6>;
+ reg = <6>;
+ };
+
+ ethernet-port@7 {
+ label = "lan7";
+ phy-handle = <&switch0phy7>;
+ reg = <7>;
+ };
+
+ ethernet-port@8 {
+ label = "lan8";
+ phy-handle = <&switch0phy8>;
+ reg = <8>;
+ };
+
+ ethernet-port@9 {
+ /* 88X3310P external phy */
+ label = "lan9";
+ phy-handle = <&phy1>;
+ phy-mode = "xaui";
+ reg = <9>;
+ };
+
+ ethernet-port@a {
+ /* 88X3310P external phy */
+ label = "lan10";
+ phy-handle = <&phy2>;
+ phy-mode = "xaui";
+ reg = <0xa>;
+ };
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/net/dsa/marvell.txt b/Documentation/devicetree/bindings/net/dsa/marvell.txt
deleted file mode 100644
index 6ec0c181b6db..000000000000
--- a/Documentation/devicetree/bindings/net/dsa/marvell.txt
+++ /dev/null
@@ -1,109 +0,0 @@
-Marvell DSA Switch Device Tree Bindings
----------------------------------------
-
-WARNING: This binding is currently unstable. Do not program it into a
-FLASH never to be changed again. Once this binding is stable, this
-warning will be removed.
-
-If you need a stable binding, use the old dsa.txt binding.
-
-Marvell Switches are MDIO devices. The following properties should be
-placed as a child node of an mdio device.
-
-The properties described here are those specific to Marvell devices.
-Additional required and optional properties can be found in dsa.txt.
-
-The compatibility string is used only to find an identification register,
-which is at a different MDIO base address in different switch families.
-- "marvell,mv88e6085" : Switch has base address 0x10. Use with models:
- 6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165,
- 6171, 6172, 6175, 6176, 6185, 6240, 6320, 6321,
- 6341, 6350, 6351, 6352
-- "marvell,mv88e6190" : Switch has base address 0x00. Use with models:
- 6190, 6190X, 6191, 6290, 6361, 6390, 6390X
-- "marvell,mv88e6250" : Switch has base address 0x08 or 0x18. Use with model:
- 6220, 6250
-
-Required properties:
-- compatible : Should be one of "marvell,mv88e6085",
- "marvell,mv88e6190" or "marvell,mv88e6250" as
- indicated above
-- reg : Address on the MII bus for the switch.
-
-Optional properties:
-
-- reset-gpios : Should be a gpio specifier for a reset line
-- interrupts : Interrupt from the switch
-- interrupt-controller : Indicates the switch is itself an interrupt
- controller. This is used for the PHY interrupts.
-#interrupt-cells = <2> : Controller uses two cells, number and flag
-- eeprom-length : Set to the length of an EEPROM connected to the
- switch. Must be set if the switch can not detect
- the presence and/or size of a connected EEPROM,
- otherwise optional.
-- mdio : Container of PHY and devices on the switches MDIO
- bus.
-- mdio? : Container of PHYs and devices on the external MDIO
- bus. The node must contains a compatible string of
- "marvell,mv88e6xxx-mdio-external"
-
-Example:
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- interrupt-parent = <&gpio0>;
- interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
- switch0: switch@0 {
- compatible = "marvell,mv88e6085";
- reg = <0>;
- reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- switch1phy0: switch1phy0@0 {
- reg = <0>;
- interrupt-parent = <&switch0>;
- interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
- };
- };
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- interrupt-parent = <&gpio0>;
- interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
- interrupt-controller;
- #interrupt-cells = <2>;
-
- switch0: switch@0 {
- compatible = "marvell,mv88e6190";
- reg = <0>;
- reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
-
- mdio {
- #address-cells = <1>;
- #size-cells = <0>;
- switch1phy0: switch1phy0@0 {
- reg = <0>;
- interrupt-parent = <&switch0>;
- interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
- };
- };
-
- mdio1 {
- compatible = "marvell,mv88e6xxx-mdio-external";
- #address-cells = <1>;
- #size-cells = <0>;
- switch1phy9: switch1phy0@9 {
- reg = <9>;
- };
- };
- };
- };
diff --git a/MAINTAINERS b/MAINTAINERS
index 90f13281d297..1b4475254d27 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -12625,7 +12625,7 @@ MARVELL 88E6XXX ETHERNET SWITCH FABRIC DRIVER
M: Andrew Lunn <[email protected]>
L: [email protected]
S: Maintained
-F: Documentation/devicetree/bindings/net/dsa/marvell.txt
+F: Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml
F: Documentation/networking/devlink/mv88e6xxx.rst
F: drivers/net/dsa/mv88e6xxx/
F: include/linux/dsa/mv88e6xxx.h
--
2.34.1
On 10/24/23 06:20, Linus Walleij wrote:
> Bindings using dsa.yaml#/$defs/ethernet-ports specify that
> a DSA switch node need to have a ports or ethernet-ports
> subnode, and that is actually required, so add requirements
> using oneOf.
>
> Suggested-by: Rob Herring <[email protected]>
> Signed-off-by: Linus Walleij <[email protected]>
Acked-by: Florian Fainelli <[email protected]>
--
Florian
On 10/24/23 06:20, Linus Walleij wrote:
> When adding a proper schema for the Marvell mx88e6xxx switch,
> the scripts start complaining about this embedded example:
>
> dtschema/dtc warnings/errors:
> net/marvell,mvusb.example.dtb: switch@0: ports: '#address-cells'
> is a required property
> from schema $id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml#
> net/marvell,mvusb.example.dtb: switch@0: ports: '#size-cells'
> is a required property
> from schema $id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml#
>
> Fix this up by extending the example with those properties in
> the ports node.
>
> While we are at it, rename "ports" to "ethernet-ports" and rename
> "switch" to "ethernet-switch" as this is recommended practice.
>
> Reviewed-by: Andrew Lunn <[email protected]>
> Reviewed-by: Vladimir Oltean <[email protected]>
> Reviewed-by: Rob Herring <[email protected]>
> Signed-off-by: Linus Walleij <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
--
Florian
On 10/24/23 06:20, Linus Walleij wrote:
> Fix some errors in the Marvell MV88E6xxx switch descriptions:
> - The top node had no address size or cells.
> - switch0@0 is not OK, should be ethernet-switch@0.
> - The ports node should be named ethernet-ports
> - The ethernet-ports node should have port@0 etc children, no
> plural "ports" in the children.
> - Ports should be named ethernet-port@0 etc
> - PHYs should be named ethernet-phy@0 etc
>
> This serves as an example of fixes needed for introducing a
> schema for the bindings, but the patch can simply be applied.
>
> Reviewed-by: Andrew Lunn <[email protected]>
> Signed-off-by: Linus Walleij <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
--
Florian
On 10/24/23 06:20, Linus Walleij wrote:
> Fix some errors in the Marvell MV88E6xxx switch descriptions:
> - switch0@0 is not OK, should be ethernet-switch@0
> - ports should be ethernet-ports
> - port should be ethernet-port
> - phy should be ethernet-phy
>
> Reviewed-by: Andrew Lunn <[email protected]>
> Signed-off-by: Linus Walleij <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
--
Florian
On 10/24/23 06:20, Linus Walleij wrote:
> Fix some errors in the Marvell MV88E6xxx switch descriptions:
> - The top node had no address size or cells.
> - switch0@0 is not OK, should be ethernet-switch@0.
> - ports should be ethernet-ports
> - port@0 should be ethernet-port@0
> - PHYs should be named ethernet-phy@
>
> Reviewed-by: Andrew Lunn <[email protected]>
> Signed-off-by: Linus Walleij <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
--
Florian
On 10/24/23 06:20, Linus Walleij wrote:
> This is an attempt to rewrite the Marvell MV88E6xxx switch bindings
> in YAML schema.
>
> The current text binding says:
> WARNING: This binding is currently unstable. Do not program it into a
> FLASH never to be changed again. Once this binding is stable, this
> warning will be removed.
>
> Well that never happened before we switched to YAML markup,
> we can't have it like this, what about fixing the mess?
>
> Reviewed-by: Andrew Lunn <[email protected]>
> Reviewed-by: Rob Herring <[email protected]>
> Signed-off-by: Linus Walleij <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
--
Florian
On 10/24/23 06:20, Linus Walleij wrote:
> The Marvell MV88E6060 is one of the oldest DSA switches from
> Marvell, and it has DT bindings used in the wild. Let's define
> them properly.
>
> It is different enough from the rest of the MV88E6xxx switches
> that it deserves its own binding.
>
> Reviewed-by: Andrew Lunn <[email protected]>
> Reviewed-by: Vladimir Oltean <[email protected]>
> Reviewed-by: Rob Herring <[email protected]>
> Signed-off-by: Linus Walleij <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
--
Florian
Linus,
On Tue, Oct 24, 2023 at 03:20:31PM +0200, Linus Walleij wrote:
> Fix some errors in the Marvell MV88E6xxx switch descriptions:
> - The top node had no address size or cells.
> - switch0@0 is not OK, should be ethernet-switch@0.
> - ports should be ethernet-ports
> - port@0 should be ethernet-port@0
> - PHYs should be named ethernet-phy@
>
> Reviewed-by: Andrew Lunn <[email protected]>
> Signed-off-by: Linus Walleij <[email protected]>
> ---
> .../dts/marvell/armada-3720-espressobin-ultra.dts | 14 +-
> .../boot/dts/marvell/armada-3720-espressobin.dtsi | 20 +--
> .../boot/dts/marvell/armada-3720-gl-mv1000.dts | 20 +--
> .../boot/dts/marvell/armada-3720-turris-mox.dts | 189 +++++++++++----------
> .../boot/dts/marvell/armada-7040-mochabin.dts | 24 ++-
> .../dts/marvell/armada-8040-clearfog-gt-8k.dts | 22 +--
> arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 42 +++--
> 7 files changed, 164 insertions(+), 167 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
> index f9abef8dcc94..870bb380a40a 100644
> --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts
> @@ -126,32 +126,32 @@ &switch0 {
>
> reset-gpios = <&gpiosb 23 GPIO_ACTIVE_LOW>;
>
> - ports {
> - switch0port1: port@1 {
> + ethernet-ports {
> + switch0port1: ethernet-port@1 {
> reg = <1>;
> label = "lan0";
> phy-handle = <&switch0phy0>;
> };
>
> - switch0port2: port@2 {
> + switch0port2: ethernet-port@2 {
> reg = <2>;
> label = "lan1";
> phy-handle = <&switch0phy1>;
> };
>
> - switch0port3: port@3 {
> + switch0port3: ethernet-port@3 {
> reg = <3>;
> label = "lan2";
> phy-handle = <&switch0phy2>;
> };
>
> - switch0port4: port@4 {
> + switch0port4: ethernet-port@4 {
> reg = <4>;
> label = "lan3";
> phy-handle = <&switch0phy3>;
> };
>
> - switch0port5: port@5 {
> + switch0port5: ethernet-port@5 {
> reg = <5>;
> label = "wan";
> phy-handle = <&extphy>;
> @@ -160,7 +160,7 @@ switch0port5: port@5 {
> };
>
> mdio {
> - switch0phy3: switch0phy3@14 {
> + switch0phy3: ethernet-phy@14 {
> reg = <0x14>;
> };
> };
> diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
> index 5fc613d24151..86ec0df1c676 100644
> --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
> @@ -145,19 +145,17 @@ &usb2 {
> };
>
> &mdio {
> - switch0: switch0@1 {
> + switch0: ethernet-switch@1 {
> compatible = "marvell,mv88e6085";
> - #address-cells = <1>;
> - #size-cells = <0>;
> reg = <1>;
>
> dsa,member = <0 0>;
>
> - ports {
> + ethernet-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - switch0port0: port@0 {
> + switch0port0: ethernet-port@0 {
> reg = <0>;
> label = "cpu";
> ethernet = <ð0>;
> @@ -168,19 +166,19 @@ fixed-link {
> };
> };
>
> - switch0port1: port@1 {
> + switch0port1: ethernet-port@1 {
> reg = <1>;
> label = "wan";
> phy-handle = <&switch0phy0>;
> };
>
> - switch0port2: port@2 {
> + switch0port2: ethernet-port@2 {
> reg = <2>;
> label = "lan0";
> phy-handle = <&switch0phy1>;
> };
>
> - switch0port3: port@3 {
> + switch0port3: ethernet-port@3 {
> reg = <3>;
> label = "lan1";
> phy-handle = <&switch0phy2>;
> @@ -192,13 +190,13 @@ mdio {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - switch0phy0: switch0phy0@11 {
> + switch0phy0: ethernet-phy@11 {
> reg = <0x11>;
> };
> - switch0phy1: switch0phy1@12 {
> + switch0phy1: ethernet-phy@12 {
> reg = <0x12>;
> };
> - switch0phy2: switch0phy2@13 {
> + switch0phy2: ethernet-phy@13 {
> reg = <0x13>;
> };
> };
I looked at U-Boot's ft_board_setup() from board/Marvell/mvebu_armada-37xx/board.c
and it doesn't appear to do anything with the switch. But after the MOX precedent
(which is _still_ problematic, more below), I still think we are way too
trigger-happy with this, and it would be good to ask someone who has the
Espressobin to test.
Pali, you are the last committer on the Linux DTS, could you please boot-test
this change, or at least confirm that as far as you know, there are no bootloader
dependencies on the precise node name for the switch and its child nodes?
> diff --git a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
> index b1b45b4fa9d4..63fbc8352161 100644
> --- a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
> @@ -152,31 +152,29 @@ &uart0 {
> };
>
> &mdio {
> - switch0: switch0@1 {
> + switch0: ethernet-switch@1 {
> compatible = "marvell,mv88e6085";
> - #address-cells = <1>;
> - #size-cells = <0>;
> reg = <1>;
>
> dsa,member = <0 0>;
>
> - ports: ports {
> + ports: ethernet-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - port@0 {
> + ethernet-port@0 {
> reg = <0>;
> label = "cpu";
> ethernet = <ð0>;
> };
>
> - port@1 {
> + ethernet-port@1 {
> reg = <1>;
> label = "wan";
> phy-handle = <&switch0phy0>;
> };
>
> - port@2 {
> + ethernet-port@2 {
> reg = <2>;
> label = "lan0";
> phy-handle = <&switch0phy1>;
> @@ -185,7 +183,7 @@ port@2 {
> nvmem-cell-names = "mac-address";
> };
>
> - port@3 {
> + ethernet-port@3 {
> reg = <3>;
> label = "lan1";
> phy-handle = <&switch0phy2>;
> @@ -199,13 +197,13 @@ mdio {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - switch0phy0: switch0phy0@11 {
> + switch0phy0: ethernet-phy@11 {
> reg = <0x11>;
> };
> - switch0phy1: switch0phy1@12 {
> + switch0phy1: ethernet-phy@12 {
> reg = <0x12>;
> };
> - switch0phy2: switch0phy2@13 {
> + switch0phy2: ethernet-phy@13 {
> reg = <0x13>;
> };
> };
Enrico, I see the GL-MV1000 device tree submission is relatively new.
Could you please ACK this change as well?
> diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
> index 9eab2bb22134..cdf1b8bdb230 100644
> --- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
> @@ -304,7 +304,12 @@ phy1: ethernet-phy@1 {
> reg = <1>;
> };
>
> - /* switch nodes are enabled by U-Boot if modules are present */
> + /*
> + * NOTE: switch nodes are enabled by U-Boot if modules are present
> + * DO NOT change this node name (switch0@10) even if it is not following
> + * conventions! Deployed U-Boot binaries are explicitly looking for
> + * this node in order to augment the device tree!
> + */
Not "this node", but all switch nodes!
> switch0@10 {
> compatible = "marvell,mv88e6190";
> reg = <0x10>;
> @@ -317,92 +322,92 @@ mdio {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - switch0phy1: switch0phy1@1 {
> + switch0phy1: ethernet-phy@1 {
> reg = <0x1>;
> };
>
> - switch0phy2: switch0phy2@2 {
> + switch0phy2: ethernet-phy@2 {
> reg = <0x2>;
> };
>
> - switch0phy3: switch0phy3@3 {
> + switch0phy3: ethernet-phy@3 {
> reg = <0x3>;
> };
>
> - switch0phy4: switch0phy4@4 {
> + switch0phy4: ethernet-phy@4 {
> reg = <0x4>;
> };
>
> - switch0phy5: switch0phy5@5 {
> + switch0phy5: ethernet-phy@5 {
> reg = <0x5>;
> };
>
> - switch0phy6: switch0phy6@6 {
> + switch0phy6: ethernet-phy@6 {
> reg = <0x6>;
> };
>
> - switch0phy7: switch0phy7@7 {
> + switch0phy7: ethernet-phy@7 {
> reg = <0x7>;
> };
>
> - switch0phy8: switch0phy8@8 {
> + switch0phy8: ethernet-phy@8 {
> reg = <0x8>;
> };
> };
>
> - ports {
> + ethernet-ports {
U-Boot code does this, so you can't rename "ports":
/*
* now if there are more switches or a SFP module coming after,
* enable corresponding ports
*/
if (id < peridot + topaz - 1) {
res = fdt_status_okay_by_pathf(blob,
"%s/switch%i@%x/ports/port@a",
mdio_path, id, addr);
} else if (id == peridot - 1 && !topaz && sfp) {
res = fdt_status_okay_by_pathf(blob,
"%s/switch%i@%x/ports/port-sfp@a",
mdio_path, id, addr);
} else {
res = 0;
}
> #address-cells = <1>;
> #size-cells = <0>;
>
> - port@1 {
> + ethernet-port@1 {
or "port@.*", or "port-sfp@a", for the same reason. Here and everywhere
in this device tree. Basically only the ethernet-phy rename seems safe.
> reg = <0x1>;
> label = "lan1";
> phy-handle = <&switch0phy1>;
> };
>
> - port@2 {
> + ethernet-port@2 {
> reg = <0x2>;
> label = "lan2";
> phy-handle = <&switch0phy2>;
> };
>
> - port@3 {
> + ethernet-port@3 {
> reg = <0x3>;
> label = "lan3";
> phy-handle = <&switch0phy3>;
> };
>
> - port@4 {
> + ethernet-port@4 {
> reg = <0x4>;
> label = "lan4";
> phy-handle = <&switch0phy4>;
> };
>
> - port@5 {
> + ethernet-port@5 {
> reg = <0x5>;
> label = "lan5";
> phy-handle = <&switch0phy5>;
> };
>
> - port@6 {
> + ethernet-port@6 {
> reg = <0x6>;
> label = "lan6";
> phy-handle = <&switch0phy6>;
> };
>
> - port@7 {
> + ethernet-port@7 {
> reg = <0x7>;
> label = "lan7";
> phy-handle = <&switch0phy7>;
> };
>
> - port@8 {
> + ethernet-port@8 {
> reg = <0x8>;
> label = "lan8";
> phy-handle = <&switch0phy8>;
> };
>
> - port@9 {
> + ethernet-port@9 {
> reg = <0x9>;
> label = "cpu";
> ethernet = <ð1>;
> @@ -410,7 +415,7 @@ port@9 {
> managed = "in-band-status";
> };
>
> - switch0port10: port@a {
> + switch0port10: ethernet-port@a {
> reg = <0xa>;
> label = "dsa";
> phy-mode = "2500base-x";
> @@ -430,7 +435,7 @@ port-sfp@a {
> };
> };
>
> - switch0@2 {
> + ethernet-switch@2 {
It's funny that you add a comment TO NOT rename switch nodes, then you
proceed to do just that.
Having that said, we need to suppress these warnings for the Marvell
schema only:
arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dtb: switch0@10: $nodename:0: 'switch0@10' does not match '^(ethernet-)?switch(@.*)?$'
from schema $id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml#
arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dtb: ethernet-switch@12: ethernet-ports: 'port-sfp@a' does not match any of the regexes: '^(ethernet-)?port@[0-9]+$', 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml#
because someone _will_ fix them and break the boot in the process.
Rob, Krzysztof, Conor, do you have any suggestion on how to achieve that?
> compatible = "marvell,mv88e6085";
> reg = <0x2>;
> dsa,member = <0 0>;
> diff --git a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
> index 48202810bf78..40b7ee7ead72 100644
> --- a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
> @@ -301,10 +301,8 @@ eth2phy: ethernet-phy@1 {
> };
>
> /* 88E6141 Topaz switch */
> - switch: switch@3 {
> + switch: ethernet-switch@3 {
> compatible = "marvell,mv88e6085";
> - #address-cells = <1>;
> - #size-cells = <0>;
> reg = <3>;
>
> pinctrl-names = "default";
> @@ -314,35 +312,35 @@ switch: switch@3 {
> interrupt-parent = <&cp0_gpio1>;
> interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
>
> - ports {
> + ethernet-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - swport1: port@1 {
> + swport1: ethernet-port@1 {
> reg = <1>;
> label = "lan0";
> phy-handle = <&swphy1>;
> };
>
> - swport2: port@2 {
> + swport2: ethernet-port@2 {
> reg = <2>;
> label = "lan1";
> phy-handle = <&swphy2>;
> };
>
> - swport3: port@3 {
> + swport3: ethernet-port@3 {
> reg = <3>;
> label = "lan2";
> phy-handle = <&swphy3>;
> };
>
> - swport4: port@4 {
> + swport4: ethernet-port@4 {
> reg = <4>;
> label = "lan3";
> phy-handle = <&swphy4>;
> };
>
> - port@5 {
> + ethernet-port@5 {
> reg = <5>;
> label = "cpu";
> ethernet = <&cp0_eth1>;
> @@ -355,19 +353,19 @@ mdio {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - swphy1: swphy1@17 {
> + swphy1: ethernet-phy@17 {
> reg = <17>;
> };
>
> - swphy2: swphy2@18 {
> + swphy2: ethernet-phy@18 {
> reg = <18>;
> };
>
> - swphy3: swphy3@19 {
> + swphy3: ethernet-phy@19 {
> reg = <19>;
> };
>
> - swphy4: swphy4@20 {
> + swphy4: ethernet-phy@20 {
> reg = <20>;
> };
> };
Robert, would you mind ACKing the MOCHAbin change?
> diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> index 4125202028c8..67892f0d2863 100644
> --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> @@ -497,42 +497,42 @@ ge_phy: ethernet-phy@0 {
> reset-deassert-us = <10000>;
> };
>
> - switch0: switch0@4 {
> + switch0: ethernet-switch@4 {
> compatible = "marvell,mv88e6085";
> reg = <4>;
> pinctrl-names = "default";
> pinctrl-0 = <&cp1_switch_reset_pins>;
> reset-gpios = <&cp1_gpio1 24 GPIO_ACTIVE_LOW>;
>
> - ports {
> + ethernet-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - port@1 {
> + ethernet-port@1 {
> reg = <1>;
> label = "lan2";
> phy-handle = <&switch0phy0>;
> };
>
> - port@2 {
> + ethernet-port@2 {
> reg = <2>;
> label = "lan1";
> phy-handle = <&switch0phy1>;
> };
>
> - port@3 {
> + ethernet-port@3 {
> reg = <3>;
> label = "lan4";
> phy-handle = <&switch0phy2>;
> };
>
> - port@4 {
> + ethernet-port@4 {
> reg = <4>;
> label = "lan3";
> phy-handle = <&switch0phy3>;
> };
>
> - port@5 {
> + ethernet-port@5 {
> reg = <5>;
> label = "cpu";
> ethernet = <&cp1_eth2>;
> @@ -545,19 +545,19 @@ mdio {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - switch0phy0: switch0phy0@11 {
> + switch0phy0: ethernet-phy@11 {
> reg = <0x11>;
> };
>
> - switch0phy1: switch0phy1@12 {
> + switch0phy1: ethernet-phy@12 {
> reg = <0x12>;
> };
>
> - switch0phy2: switch0phy2@13 {
> + switch0phy2: ethernet-phy@13 {
> reg = <0x13>;
> };
>
> - switch0phy3: switch0phy3@14 {
> + switch0phy3: ethernet-phy@14 {
> reg = <0x14>;
> };
> };
Russell, could you please do the same for this device tree?
> diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
> index 32cfb3e2efc3..7538ed56053b 100644
> --- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
> +++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
> @@ -207,11 +207,9 @@ phy0: ethernet-phy@0 {
> reg = <0>;
> };
>
> - switch6: switch0@6 {
> + switch6: ethernet-switch@6 {
> /* Actual device is MV88E6393X */
> compatible = "marvell,mv88e6190";
> - #address-cells = <1>;
> - #size-cells = <0>;
> reg = <6>;
> interrupt-parent = <&cp0_gpio1>;
> interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
> @@ -220,59 +218,59 @@ switch6: switch0@6 {
>
> dsa,member = <0 0>;
>
> - ports {
> + ethernet-ports {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - port@1 {
> + ethernet-port@1 {
> reg = <1>;
> label = "p1";
> phy-handle = <&switch0phy1>;
> };
>
> - port@2 {
> + ethernet-port@2 {
> reg = <2>;
> label = "p2";
> phy-handle = <&switch0phy2>;
> };
>
> - port@3 {
> + ethernet-port@3 {
> reg = <3>;
> label = "p3";
> phy-handle = <&switch0phy3>;
> };
>
> - port@4 {
> + ethernet-port@4 {
> reg = <4>;
> label = "p4";
> phy-handle = <&switch0phy4>;
> };
>
> - port@5 {
> + ethernet-port@5 {
> reg = <5>;
> label = "p5";
> phy-handle = <&switch0phy5>;
> };
>
> - port@6 {
> + ethernet-port@6 {
> reg = <6>;
> label = "p6";
> phy-handle = <&switch0phy6>;
> };
>
> - port@7 {
> + ethernet-port@7 {
> reg = <7>;
> label = "p7";
> phy-handle = <&switch0phy7>;
> };
>
> - port@8 {
> + ethernet-port@8 {
> reg = <8>;
> label = "p8";
> phy-handle = <&switch0phy8>;
> };
>
> - port@9 {
> + ethernet-port@9 {
> reg = <9>;
> label = "p9";
> phy-mode = "10gbase-r";
> @@ -280,7 +278,7 @@ port@9 {
> managed = "in-band-status";
> };
>
> - port@a {
> + ethernet-port@a {
> reg = <10>;
> ethernet = <&cp0_eth0>;
> phy-mode = "10gbase-r";
> @@ -293,35 +291,35 @@ mdio {
> #address-cells = <1>;
> #size-cells = <0>;
>
> - switch0phy1: switch0phy1@1 {
> + switch0phy1: ethernet-phy@1 {
> reg = <0x1>;
> };
>
> - switch0phy2: switch0phy2@2 {
> + switch0phy2: ethernet-phy@2 {
> reg = <0x2>;
> };
>
> - switch0phy3: switch0phy3@3 {
> + switch0phy3: ethernet-phy@3 {
> reg = <0x3>;
> };
>
> - switch0phy4: switch0phy4@4 {
> + switch0phy4: ethernet-phy@4 {
> reg = <0x4>;
> };
>
> - switch0phy5: switch0phy5@5 {
> + switch0phy5: ethernet-phy@5 {
> reg = <0x5>;
> };
>
> - switch0phy6: switch0phy6@6 {
> + switch0phy6: ethernet-phy@6 {
> reg = <0x6>;
> };
>
> - switch0phy7: switch0phy7@7 {
> + switch0phy7: ethernet-phy@7 {
> reg = <0x7>;
> };
>
> - switch0phy8: switch0phy8@8 {
> + switch0phy8: ethernet-phy@8 {
> reg = <0x8>;
> };
> };
Chris, does this look okay?
On Tue, Oct 24, 2023 at 09:28:42PM +0300, Vladimir Oltean wrote:
> U-Boot code does this, so you can't rename "ports":
>
> /*
> * now if there are more switches or a SFP module coming after,
> * enable corresponding ports
> */
> if (id < peridot + topaz - 1) {
> res = fdt_status_okay_by_pathf(blob,
> "%s/switch%i@%x/ports/port@a",
> mdio_path, id, addr);
> } else if (id == peridot - 1 && !topaz && sfp) {
> res = fdt_status_okay_by_pathf(blob,
> "%s/switch%i@%x/ports/port-sfp@a",
> mdio_path, id, addr);
> } else {
> res = 0;
> }
So that's now two platforms that do this. I think at this stage, we
have to regard these node paths as an ABI that we just can't change
without causing some breakage.
If we can't fix up all platforms, doesn't that make the YAML
conversion harder?
You've asked me to test the Clearfog GT-8k change - which is something
that won't happen for a while as I don't have the hardware to hand at
my current location, nor remotely.
What I can do is poke about in the u-boot sources I have for that
board and see# whether it's doing anything with those node paths. Off
the top of my# head, given what the board is, I think it's highly
unlikely though,# but I will check - possibly tomorrow.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
On Tue, Oct 24, 2023 at 08:03:47PM +0100, Russell King (Oracle) wrote:
> On Tue, Oct 24, 2023 at 09:28:42PM +0300, Vladimir Oltean wrote:
> > U-Boot code does this, so you can't rename "ports":
> >
> > /*
> > * now if there are more switches or a SFP module coming after,
> > * enable corresponding ports
> > */
> > if (id < peridot + topaz - 1) {
> > res = fdt_status_okay_by_pathf(blob,
> > "%s/switch%i@%x/ports/port@a",
> > mdio_path, id, addr);
> > } else if (id == peridot - 1 && !topaz && sfp) {
> > res = fdt_status_okay_by_pathf(blob,
> > "%s/switch%i@%x/ports/port-sfp@a",
> > mdio_path, id, addr);
> > } else {
> > res = 0;
> > }
>
> So that's now two platforms that do this. I think at this stage, we
> have to regard these node paths as an ABI that we just can't change
> without causing some breakage.
No, it's still the same as the one I pointed out on v4:
https://patchwork.kernel.org/project/netdevbpf/patch/[email protected]/
aka the Turris MOX. But it looks like my previous comment wasn't quite
clear, thus Linus' conversion still cleans up too much in this device
tree.
> If we can't fix up all platforms, doesn't that make the YAML
> conversion harder?
Well, I do see this as a valid concern that could potentially bite back,
yes. I did express that the schema should not emit warnings for
$nodename, but TBH I don't know how that constraint could be eliminated:
https://patchwork.kernel.org/project/netdevbpf/patch/[email protected]/
> You've asked me to test the Clearfog GT-8k change - which is something
> that won't happen for a while as I don't have the hardware to hand at
> my current location, nor remotely.
>
> What I can do is poke about in the u-boot sources I have for that
> board and see# whether it's doing anything with those node paths. Off
> the top of my# head, given what the board is, I think it's highly
> unlikely though,# but I will check - possibly tomorrow.
Ok, if U-Boot is the only bootloader, I also looked through the upstream
board source files and only noticed any fixups for MOX. I don't know
what these boards ship with, and how far that is from mainline U-Boot.
Hi All,
On 25/10/23 07:28, Vladimir Oltean wrote:
> Linus,
>
> On Tue, Oct 24, 2023 at 03:20:31PM +0200, Linus Walleij wrote:
>> Fix some errors in the Marvell MV88E6xxx switch descriptions:
>> - The top node had no address size or cells.
>> - switch0@0 is not OK, should be ethernet-switch@0.
>> - ports should be ethernet-ports
>> - port@0 should be ethernet-port@0
>> - PHYs should be named ethernet-phy@
>>
>> Reviewed-by: Andrew Lunn <[email protected]>
>> Signed-off-by: Linus Walleij <[email protected]>
<snip>
>> ---
>> diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
>> index 32cfb3e2efc3..7538ed56053b 100644
>> --- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
>> +++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
>> @@ -207,11 +207,9 @@ phy0: ethernet-phy@0 {
>> reg = <0>;
>> };
>>
>> - switch6: switch0@6 {
>> + switch6: ethernet-switch@6 {
>> /* Actual device is MV88E6393X */
>> compatible = "marvell,mv88e6190";
>> - #address-cells = <1>;
>> - #size-cells = <0>;
>> reg = <6>;
>> interrupt-parent = <&cp0_gpio1>;
>> interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
>> @@ -220,59 +218,59 @@ switch6: switch0@6 {
>>
>> dsa,member = <0 0>;
>>
>> - ports {
>> + ethernet-ports {
>> #address-cells = <1>;
>> #size-cells = <0>;
>>
>> - port@1 {
>> + ethernet-port@1 {
>> reg = <1>;
>> label = "p1";
>> phy-handle = <&switch0phy1>;
>> };
>>
>> - port@2 {
>> + ethernet-port@2 {
>> reg = <2>;
>> label = "p2";
>> phy-handle = <&switch0phy2>;
>> };
>>
>> - port@3 {
>> + ethernet-port@3 {
>> reg = <3>;
>> label = "p3";
>> phy-handle = <&switch0phy3>;
>> };
>>
>> - port@4 {
>> + ethernet-port@4 {
>> reg = <4>;
>> label = "p4";
>> phy-handle = <&switch0phy4>;
>> };
>>
>> - port@5 {
>> + ethernet-port@5 {
>> reg = <5>;
>> label = "p5";
>> phy-handle = <&switch0phy5>;
>> };
>>
>> - port@6 {
>> + ethernet-port@6 {
>> reg = <6>;
>> label = "p6";
>> phy-handle = <&switch0phy6>;
>> };
>>
>> - port@7 {
>> + ethernet-port@7 {
>> reg = <7>;
>> label = "p7";
>> phy-handle = <&switch0phy7>;
>> };
>>
>> - port@8 {
>> + ethernet-port@8 {
>> reg = <8>;
>> label = "p8";
>> phy-handle = <&switch0phy8>;
>> };
>>
>> - port@9 {
>> + ethernet-port@9 {
>> reg = <9>;
>> label = "p9";
>> phy-mode = "10gbase-r";
>> @@ -280,7 +278,7 @@ port@9 {
>> managed = "in-band-status";
>> };
>>
>> - port@a {
>> + ethernet-port@a {
>> reg = <10>;
>> ethernet = <&cp0_eth0>;
>> phy-mode = "10gbase-r";
>> @@ -293,35 +291,35 @@ mdio {
>> #address-cells = <1>;
>> #size-cells = <0>;
>>
>> - switch0phy1: switch0phy1@1 {
>> + switch0phy1: ethernet-phy@1 {
>> reg = <0x1>;
>> };
>>
>> - switch0phy2: switch0phy2@2 {
>> + switch0phy2: ethernet-phy@2 {
>> reg = <0x2>;
>> };
>>
>> - switch0phy3: switch0phy3@3 {
>> + switch0phy3: ethernet-phy@3 {
>> reg = <0x3>;
>> };
>>
>> - switch0phy4: switch0phy4@4 {
>> + switch0phy4: ethernet-phy@4 {
>> reg = <0x4>;
>> };
>>
>> - switch0phy5: switch0phy5@5 {
>> + switch0phy5: ethernet-phy@5 {
>> reg = <0x5>;
>> };
>>
>> - switch0phy6: switch0phy6@6 {
>> + switch0phy6: ethernet-phy@6 {
>> reg = <0x6>;
>> };
>>
>> - switch0phy7: switch0phy7@7 {
>> + switch0phy7: ethernet-phy@7 {
>> reg = <0x7>;
>> };
>>
>> - switch0phy8: switch0phy8@8 {
>> + switch0phy8: ethernet-phy@8 {
>> reg = <0x8>;
>> };
>> };
> Chris, does this look okay?
There's nothing in the u-boot code for the CN9130-CRB that cares about
the switch so I don't think there's any issue ABI wise. We are working
on our own CN9130 based router with a L2 switch but it's at a point we
can follow whatever upstream decide is the final schema.
In terms of my personal preference the schema quoted up thread has the
pattern '^(ethernet-)?switch(@.*)?$' (i.e. the 'ethernet-' part is
optional) so I'd personally prefer switch0@6 -> switch@6 but that's only
a slight preference because I deal with Ethernet switches day in day out.
Hello Chris,
On Tue, Oct 24, 2023 at 08:10:14PM +0000, Chris Packham wrote:
> > Chris, does this look okay?
>
> There's nothing in the u-boot code for the CN9130-CRB that cares about
> the switch so I don't think there's any issue ABI wise. We are working
> on our own CN9130 based router with a L2 switch but it's at a point we
> can follow whatever upstream decide is the final schema.
Thank you for taking the time to confirm.
> In terms of my personal preference the schema quoted up thread has the
> pattern? '^(ethernet-)?switch(@.*)?$' (i.e. the 'ethernet-' part is
> optional) so I'd personally prefer switch0@6 -> switch@6 but that's only
> a slight preference because I deal with Ethernet switches day in day out.
The movement originally came from "ports" to "ethernet-ports" at Rob's
suggestion, because of the name clash with the ports from graph.yaml.
Then we also did "switch" -> "ethernet-switch" because you'll also find
"pcie-switch" in mainline device trees.
Hello:
This series was applied to netdev/net-next.git (main)
by David S. Miller <[email protected]>:
On Tue, 24 Oct 2023 15:20:26 +0200 you wrote:
> The Marvell switches are lacking DT bindings.
>
> I need proper schema checking to add LED support to the
> Marvell switch. Just how it is, it can't go on like this.
>
> Some Device Tree fixes are included in the series, these
> remove the major and most annoying warnings fallout noise:
> some warnings remain, and these are of more serious nature,
> such as missing phy-mode. They can be applied individually,
> or to the networking tree with the rest of the patches.
>
> [...]
Here is the summary with links:
- [net-next,v7,1/7] dt-bindings: net: dsa: Require ports or ethernet-ports
https://git.kernel.org/netdev/net-next/c/b5ef61718ad7
- [net-next,v7,2/7] dt-bindings: net: mvusb: Fix up DSA example
https://git.kernel.org/netdev/net-next/c/ddae07ce9bb3
- [net-next,v7,3/7] ARM: dts: marvell: Fix some common switch mistakes
https://git.kernel.org/netdev/net-next/c/2b83557a588f
- [net-next,v7,4/7] ARM: dts: nxp: Fix some common switch mistakes
https://git.kernel.org/netdev/net-next/c/bfedd8423643
- [net-next,v7,5/7] ARM64: dts: marvell: Fix some common switch mistakes
https://git.kernel.org/netdev/net-next/c/605a5f5d406d
- [net-next,v7,6/7] dt-bindings: marvell: Rewrite MV88E6xxx in schema
https://git.kernel.org/netdev/net-next/c/0f35369b4efe
- [net-next,v7,7/7] dt-bindings: marvell: Add Marvell MV88E6060 DSA schema
https://git.kernel.org/netdev/net-next/c/53313ed25ba8
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
Hi Dave,
On Wed, Oct 25, 2023 at 09:30:27AM +0000, [email protected] wrote:
> Hello:
>
> This series was applied to netdev/net-next.git (main)
> by David S. Miller <[email protected]>:
>
> On Tue, 24 Oct 2023 15:20:26 +0200 you wrote:
> > The Marvell switches are lacking DT bindings.
> >
> > I need proper schema checking to add LED support to the
> > Marvell switch. Just how it is, it can't go on like this.
> >
> > Some Device Tree fixes are included in the series, these
> > remove the major and most annoying warnings fallout noise:
> > some warnings remain, and these are of more serious nature,
> > such as missing phy-mode. They can be applied individually,
> > or to the networking tree with the rest of the patches.
> >
> > [...]
Can you please revert this series? It breaks the boot on the Turris MOX
board.
On 24/10/2023 15:20, Linus Walleij wrote:
> Bindings using dsa.yaml#/$defs/ethernet-ports specify that
> a DSA switch node need to have a ports or ethernet-ports
> subnode, and that is actually required, so add requirements
> using oneOf.
>
> Suggested-by: Rob Herring <[email protected]>
> Signed-off-by: Linus Walleij <[email protected]>
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Best regards,
Krzysztof
On Wed, 25 Oct 2023 12:36:32 +0300 Vladimir Oltean wrote:
> Can you please revert this series? It breaks the boot on the Turris MOX
> board.
Done!
Hi Vladimir,
thanks for paging in the right maintainers to look at the respective boards,
much appreciated!
On Tue, Oct 24, 2023 at 8:28 PM Vladimir Oltean <[email protected]> wrote:
> I looked at U-Boot's ft_board_setup() from board/Marvell/mvebu_armada-37xx/board.c
> and it doesn't appear to do anything with the switch. But after the MOX precedent
> (which is _still_ problematic, more below), I still think we are way too
> trigger-happy with this, and it would be good to ask someone who has the
> Espressobin to test.
Yeah that would be great.
> > - /* switch nodes are enabled by U-Boot if modules are present */
> > + /*
> > + * NOTE: switch nodes are enabled by U-Boot if modules are present
> > + * DO NOT change this node name (switch0@10) even if it is not following
> > + * conventions! Deployed U-Boot binaries are explicitly looking for
> > + * this node in order to augment the device tree!
> > + */
>
> Not "this node", but all switch nodes!
(...)
> It's funny that you add a comment TO NOT rename switch nodes, then you
> proceed to do just that.
Yeah it's a stupid mistake on my behalf. :( too sleepy or something.
I fixed it up, and put a small comment above each of them not
to change the node name.
> > - ports {
> > + ethernet-ports {
>
> U-Boot code does this, so you can't rename "ports":
>
> /*
> * now if there are more switches or a SFP module coming after,
> * enable corresponding ports
> */
> if (id < peridot + topaz - 1) {
> res = fdt_status_okay_by_pathf(blob,
> "%s/switch%i@%x/ports/port@a",
> mdio_path, id, addr);
> } else if (id == peridot - 1 && !topaz && sfp) {
> res = fdt_status_okay_by_pathf(blob,
> "%s/switch%i@%x/ports/port-sfp@a",
> mdio_path, id, addr);
> } else {
> res = 0;
> }
>
> > #address-cells = <1>;
> > #size-cells = <0>;
> >
> > - port@1 {
> > + ethernet-port@1 {
>
> or "port@.*", or "port-sfp@a", for the same reason. Here and everywhere
> in this device tree. Basically only the ethernet-phy rename seems safe.
Fair, reverted it all.
> Having that said, we need to suppress these warnings for the Marvell
> schema only:
>
> arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dtb: switch0@10: $nodename:0: 'switch0@10' does not match '^(ethernet-)?switch(@.*)?$'
> from schema $id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml#
> arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dtb: ethernet-switch@12: ethernet-ports: 'port-sfp@a' does not match any of the regexes: '^(ethernet-)?port@[0-9]+$', 'pinctrl-[0-9]+'
> from schema $id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml#
>
> because someone _will_ fix them and break the boot in the process.
Really? I think you will stop them from doing that every single time ;)
Jokes aside, we certainly need a way to suppress this warning.
> Rob, Krzysztof, Conor, do you have any suggestion on how to achieve that?
What we can do easily is to override the $nodename requirement for
a certain compatible with one of those - if: constructions, but that would
unfortunately make us be lax on every other board as well.
What we want to achieve is:
1. Match on the top level compatible (under '/') with contains: const:
cznic,turris-mox
2. Then relax requirements on the switch nodes if that is true.
I assume I would have to go into
Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
and put hard requirement on node names from there. I'm not sure
this would work or that it's even possible, or desireable.
But...
We *COULD* add a second over-specified compatible to the switch
node. Such as:
switch0@10 {
compatible = "marvell,turris-mox-mv88e6190-switch",
"marvell,mv88e6190";
(and the same for the 6085 version)
And use that to relax the requirement for that variant with an - if:
statemement.
This should work fine since U-Boot is only looking for nodenames, not
compatible strings. I think I will try this approach.
Yours,
Linus Walleij
On Tue, Oct 24, 2023 at 9:03 PM Russell King (Oracle)
<[email protected]> wrote:
> If we can't fix up all platforms, doesn't that make the YAML
> conversion harder?
It does. I'm scouting some possible routes. I'm leaning toward
introducing extra compatibles to use as markers for special node
name rules.
> You've asked me to test the Clearfog GT-8k change - which is something
> that won't happen for a while as I don't have the hardware to hand at
> my current location, nor remotely.
No hurry. These bindings have been sitting unconverted for some time
and all driving it now is my need for formalization and that can wait.
> What I can do is poke about in the u-boot sources I have for that
> board and see# whether it's doing anything with those node paths. Off
> the top of my# head, given what the board is, I think it's highly
> unlikely though,# but I will check - possibly tomorrow.
Thanks Russell, much appreciated!
Yours,
Linus Walleij
On Wed, Oct 25, 2023 at 9:48 PM Linus Walleij <[email protected]> wrote:
> We *COULD* add a second over-specified compatible to the switch
> node. Such as:
>
> switch0@10 {
> compatible = "marvell,turris-mox-mv88e6190-switch",
> "marvell,mv88e6190";
>
> (and the same for the 6085 version)
>
> And use that to relax the requirement for that variant with an - if:
> statemement.
>
> This should work fine since U-Boot is only looking for nodenames, not
> compatible strings. I think I will try this approach.
This works. Compatibles added like such to the turris-mox nodes:
switch0@10 {
- compatible = "marvell,mv88e6190";
+ compatible = "marvell,turris-mox-mv88e6190",
"marvell,mv88e6190";
The mv88e6xxx schema will look like so:
properties:
compatible:
+ oneOf:
+ - enum:
+ - marvell,mv88e6085
+ - marvell,mv88e6190
+ - marvell,mv88e6250
(...)
+ - items:
+ - const: marvell,turris-mox-mv88e6085
+ - const: marvell,mv88e6085
+ - items:
+ - const: marvell,turris-mox-mv88e6190
+ - const: marvell,mv88e6190
Then ethernet-switch.yaml gets this:
-properties:
- $nodename:
- pattern: "^(ethernet-)?switch(@.*)?$"
+allOf:
+ # This condition is here to satisfy the case where certain device
+ # nodes have to preserve non-standard names because of
+ # backward-compatibility with boot loaders inspecting certain
+ # node names.
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - marvell,turris-mox-mv88e6085
+ - marvell,turris-mox-mv88e6190
+ then:
+ properties:
+ $nodename:
+ pattern: "switch[0-3]@[0-3]+$"
+ else:
+ properties:
+ $nodename:
+ pattern: "^(ethernet-)?switch(@.*)?$"
This latter thing is maybe not so nice for everyone to process.
The alternative is however to copy all of dsa.yaml, dsa-port.yaml and
ethernet-port.yaml (maybe more) into the Marvell binding. Which I can do,
of course. (qca8k is already deviant).
Unless there is a better way.
Yours,
Linus Walleij
> The mv88e6xxx schema will look like so:
>
> properties:
> compatible:
> + oneOf:
> + - enum:
> + - marvell,mv88e6085
> + - marvell,mv88e6190
> + - marvell,mv88e6250
> (...)
> + - items:
> + - const: marvell,turris-mox-mv88e6085
> + - const: marvell,mv88e6085
> + - items:
> + - const: marvell,turris-mox-mv88e6190
> + - const: marvell,mv88e6190
Lets see what the DT Maintainers think of this. But if we do go this
way, i would like to see a comment here with an explanation. What we
don't want is developers thinking they should add new compatibles for
whatever board they are adding.
Andrew