2023-11-18 03:39:57

by Anup Patel

[permalink] [raw]
Subject: [PATCH v4 0/5] RISC-V SBI debug console extension support

The SBI v2.0 specification is now frozen. The SBI v2.0 specification defines
SBI debug console (DBCN) extension which replaces the legacy SBI v0.1
functions sbi_console_putchar() and sbi_console_getchar().
(Refer v2.0-rc5 at https://github.com/riscv-non-isa/riscv-sbi-doc/releases)

This series adds support for SBI debug console (DBCN) extension in KVM RISC-V
and Linux RISC-V.

To try these patches with KVM RISC-V, use KVMTOOL from riscv_sbi_dbcn_v1
branch at: https://github.com/avpatel/kvmtool.git

These patches can also be found in the riscv_sbi_dbcn_v4 branch at:
https://github.com/avpatel/linux.git

Changes since v3:
- Rebased on Linux-6.7-rc1
- Dropped PATCH1 to PATCH5 of v3 series since these were merged through
KVM RISC-V tree for Linux-6.7
- Used proper error code in PATCH1
- Added new PATCH2 which add common SBI debug console helper functions
- Updated PATCH3 and PATCH4 to use SBI debug console helper functions

Changes since v2:
- Rebased on Linux-6.6-rc5
- Handled page-crossing in PATCH7 of v2 series
- Addressed Drew's comment in PATCH3 of v2 series
- Added new PATCH5 to make get-reg-list test aware of SBI DBCN extension

Changes since v1:
- Remove use of #ifdef from PATCH4 and PATCH5 of the v1 series
- Improved commit description of PATCH3 in v1 series
- Introduced new PATCH3 in this series to allow some SBI extensions
(such as SBI DBCN) do to disabled by default so that older KVM user space
work fine and newer KVM user space have to explicitly opt-in for emulating
SBI DBCN.
- Introduced new PATCH5 in this series which adds inline version of
sbi_console_getchar() and sbi_console_putchar() for the case where
CONFIG_RISCV_SBI_V01 is disabled.

Anup Patel (4):
RISC-V: Add stubs for sbi_console_putchar/getchar()
RISC-V: Add SBI debug console helper routines
tty/serial: Add RISC-V SBI debug console based earlycon
RISC-V: Enable SBI based earlycon support

Atish Patra (1):
tty: Add SBI debug console support to HVC SBI driver

arch/riscv/configs/defconfig | 1 +
arch/riscv/configs/rv32_defconfig | 1 +
arch/riscv/include/asm/sbi.h | 10 +++++
arch/riscv/kernel/sbi.c | 43 ++++++++++++++++++
drivers/tty/hvc/Kconfig | 2 +-
drivers/tty/hvc/hvc_riscv_sbi.c | 59 ++++++++++++++++++++++---
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/earlycon-riscv-sbi.c | 24 ++++++++--
8 files changed, 129 insertions(+), 13 deletions(-)

--
2.34.1


2023-11-18 03:39:58

by Anup Patel

[permalink] [raw]
Subject: [PATCH v4 3/5] tty/serial: Add RISC-V SBI debug console based earlycon

We extend the existing RISC-V SBI earlycon support to use the new
RISC-V SBI debug console extension.

Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
---
drivers/tty/serial/Kconfig | 2 +-
drivers/tty/serial/earlycon-riscv-sbi.c | 24 ++++++++++++++++++++----
2 files changed, 21 insertions(+), 5 deletions(-)

diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index 732c893c8d16..1f2594b8ab9d 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST

config SERIAL_EARLYCON_RISCV_SBI
bool "Early console using RISC-V SBI"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select SERIAL_CORE
select SERIAL_CORE_CONSOLE
select SERIAL_EARLYCON
diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c b/drivers/tty/serial/earlycon-riscv-sbi.c
index 27afb0b74ea7..5351e1e31f45 100644
--- a/drivers/tty/serial/earlycon-riscv-sbi.c
+++ b/drivers/tty/serial/earlycon-riscv-sbi.c
@@ -15,17 +15,33 @@ static void sbi_putc(struct uart_port *port, unsigned char c)
sbi_console_putchar(c);
}

-static void sbi_console_write(struct console *con,
- const char *s, unsigned n)
+static void sbi_0_1_console_write(struct console *con,
+ const char *s, unsigned int n)
{
struct earlycon_device *dev = con->data;
uart_console_write(&dev->port, s, n, sbi_putc);
}

+static void sbi_dbcn_console_write(struct console *con,
+ const char *s, unsigned int n)
+{
+ sbi_debug_console_write(n, __pa(s));
+}
+
static int __init early_sbi_setup(struct earlycon_device *device,
const char *opt)
{
- device->con->write = sbi_console_write;
- return 0;
+ int ret = 0;
+
+ if (sbi_debug_console_available) {
+ device->con->write = sbi_dbcn_console_write;
+ } else {
+ if (IS_ENABLED(CONFIG_RISCV_SBI_V01))
+ device->con->write = sbi_0_1_console_write;
+ else
+ ret = -ENODEV;
+ }
+
+ return ret;
}
EARLYCON_DECLARE(sbi, early_sbi_setup);
--
2.34.1

2023-11-18 03:40:05

by Anup Patel

[permalink] [raw]
Subject: [PATCH v4 4/5] tty: Add SBI debug console support to HVC SBI driver

From: Atish Patra <[email protected]>

RISC-V SBI specification supports advanced debug console
support via SBI DBCN extension.

Extend the HVC SBI driver to support it.

Signed-off-by: Atish Patra <[email protected]>
Signed-off-by: Anup Patel <[email protected]>
---
drivers/tty/hvc/Kconfig | 2 +-
drivers/tty/hvc/hvc_riscv_sbi.c | 59 +++++++++++++++++++++++++++++----
2 files changed, 53 insertions(+), 8 deletions(-)

diff --git a/drivers/tty/hvc/Kconfig b/drivers/tty/hvc/Kconfig
index 4f9264d005c0..6e05c5c7bca1 100644
--- a/drivers/tty/hvc/Kconfig
+++ b/drivers/tty/hvc/Kconfig
@@ -108,7 +108,7 @@ config HVC_DCC_SERIALIZE_SMP

config HVC_RISCV_SBI
bool "RISC-V SBI console support"
- depends on RISCV_SBI_V01
+ depends on RISCV_SBI
select HVC_DRIVER
help
This enables support for console output via RISC-V SBI calls, which
diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c b/drivers/tty/hvc/hvc_riscv_sbi.c
index 31f53fa77e4a..697c981221b5 100644
--- a/drivers/tty/hvc/hvc_riscv_sbi.c
+++ b/drivers/tty/hvc/hvc_riscv_sbi.c
@@ -39,21 +39,66 @@ static int hvc_sbi_tty_get(uint32_t vtermno, char *buf, int count)
return i;
}

-static const struct hv_ops hvc_sbi_ops = {
+static const struct hv_ops hvc_sbi_v01_ops = {
.get_chars = hvc_sbi_tty_get,
.put_chars = hvc_sbi_tty_put,
};

-static int __init hvc_sbi_init(void)
+static int hvc_sbi_dbcn_tty_put(uint32_t vtermno, const char *buf, int count)
{
- return PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_ops, 16));
+ phys_addr_t pa;
+
+ if (is_vmalloc_addr(buf)) {
+ pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
+ if (PAGE_SIZE < (offset_in_page(buf) + count))
+ count = PAGE_SIZE - offset_in_page(buf);
+ } else {
+ pa = __pa(buf);
+ }
+
+ return sbi_debug_console_write(count, pa);
}
-device_initcall(hvc_sbi_init);

-static int __init hvc_sbi_console_init(void)
+static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count)
{
- hvc_instantiate(0, 0, &hvc_sbi_ops);
+ phys_addr_t pa;
+
+ if (is_vmalloc_addr(buf)) {
+ pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
+ if (PAGE_SIZE < (offset_in_page(buf) + count))
+ count = PAGE_SIZE - offset_in_page(buf);
+ } else {
+ pa = __pa(buf);
+ }
+
+ return sbi_debug_console_read(count, pa);
+}
+
+static const struct hv_ops hvc_sbi_dbcn_ops = {
+ .put_chars = hvc_sbi_dbcn_tty_put,
+ .get_chars = hvc_sbi_dbcn_tty_get,
+};
+
+static int __init hvc_sbi_init(void)
+{
+ int err;
+
+ if (sbi_debug_console_available) {
+ err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_dbcn_ops, 256));
+ if (err)
+ return err;
+ hvc_instantiate(0, 0, &hvc_sbi_dbcn_ops);
+ } else {
+ if (IS_ENABLED(CONFIG_RISCV_SBI_V01)) {
+ err = PTR_ERR_OR_ZERO(hvc_alloc(0, 0, &hvc_sbi_v01_ops, 256));
+ if (err)
+ return err;
+ hvc_instantiate(0, 0, &hvc_sbi_v01_ops);
+ } else {
+ return -ENODEV;
+ }
+ }

return 0;
}
-console_initcall(hvc_sbi_console_init);
+device_initcall(hvc_sbi_init);
--
2.34.1

2023-11-18 03:40:25

by Anup Patel

[permalink] [raw]
Subject: [PATCH v4 5/5] RISC-V: Enable SBI based earlycon support

Let us enable SBI based earlycon support in defconfigs for both RV32
and RV64 so that "earlycon=sbi" can be used again.

Signed-off-by: Anup Patel <[email protected]>
Reviewed-by: Andrew Jones <[email protected]>
---
arch/riscv/configs/defconfig | 1 +
arch/riscv/configs/rv32_defconfig | 1 +
2 files changed, 2 insertions(+)

diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
index 905881282a7c..eaf34e871e30 100644
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -149,6 +149,7 @@ CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
index 89b601e253a6..5721af39afd1 100644
--- a/arch/riscv/configs/rv32_defconfig
+++ b/arch/riscv/configs/rv32_defconfig
@@ -66,6 +66,7 @@ CONFIG_INPUT_MOUSEDEV=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
--
2.34.1

2023-11-20 07:17:10

by Jiri Slaby

[permalink] [raw]
Subject: Re: [PATCH v4 4/5] tty: Add SBI debug console support to HVC SBI driver

On 18. 11. 23, 4:38, Anup Patel wrote:
> diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c b/drivers/tty/hvc/hvc_riscv_sbi.c
> index 31f53fa77e4a..697c981221b5 100644
> --- a/drivers/tty/hvc/hvc_riscv_sbi.c
> +++ b/drivers/tty/hvc/hvc_riscv_sbi.c
...
> -static int __init hvc_sbi_console_init(void)
> +static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count)
> {
> - hvc_instantiate(0, 0, &hvc_sbi_ops);
> + phys_addr_t pa;
> +
> + if (is_vmalloc_addr(buf)) {

I wonder, where does this buf come from, so that you have to check for
vmalloc?

> + pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
> + if (PAGE_SIZE < (offset_in_page(buf) + count))

Am I the only one who would prefer:
if (count + offset_in_page(buf) > PAGE_SIZE)
?

> + count = PAGE_SIZE - offset_in_page(buf);
> + } else {
> + pa = __pa(buf);
> + }
> +
> + return sbi_debug_console_read(count, pa);
> +}


thanks,
--
js
suse labs

2023-11-21 08:21:32

by Atish Patra

[permalink] [raw]
Subject: Re: [PATCH v4 4/5] tty: Add SBI debug console support to HVC SBI driver

On Sun, Nov 19, 2023 at 11:16 PM Jiri Slaby <[email protected]> wrote:
>
> On 18. 11. 23, 4:38, Anup Patel wrote:
> > diff --git a/drivers/tty/hvc/hvc_riscv_sbi.c b/drivers/tty/hvc/hvc_riscv_sbi.c
> > index 31f53fa77e4a..697c981221b5 100644
> > --- a/drivers/tty/hvc/hvc_riscv_sbi.c
> > +++ b/drivers/tty/hvc/hvc_riscv_sbi.c
> ...
> > -static int __init hvc_sbi_console_init(void)
> > +static int hvc_sbi_dbcn_tty_get(uint32_t vtermno, char *buf, int count)
> > {
> > - hvc_instantiate(0, 0, &hvc_sbi_ops);
> > + phys_addr_t pa;
> > +
> > + if (is_vmalloc_addr(buf)) {
>
> I wonder, where does this buf come from, so that you have to check for
> vmalloc?
>

When VMAP_STCK is enabled, stack allocation depends on the vmalloc.
That's why we have to if the buf is allocated using vmalloc.

> > + pa = page_to_phys(vmalloc_to_page(buf)) + offset_in_page(buf);
> > + if (PAGE_SIZE < (offset_in_page(buf) + count))
>
> Am I the only one who would prefer:
> if (count + offset_in_page(buf) > PAGE_SIZE)
> ?
>
> > + count = PAGE_SIZE - offset_in_page(buf);
> > + } else {
> > + pa = __pa(buf);
> > + }
> > +
> > + return sbi_debug_console_read(count, pa);
> > +}
>
>
> thanks,
> --
> js
> suse labs
>

2023-11-21 22:41:38

by Samuel Holland

[permalink] [raw]
Subject: Re: [PATCH v4 3/5] tty/serial: Add RISC-V SBI debug console based earlycon

Hi Anup,

On 2023-11-17 9:38 PM, Anup Patel wrote:
> We extend the existing RISC-V SBI earlycon support to use the new
> RISC-V SBI debug console extension.
>
> Signed-off-by: Anup Patel <[email protected]>
> Reviewed-by: Andrew Jones <[email protected]>
> ---
> drivers/tty/serial/Kconfig | 2 +-
> drivers/tty/serial/earlycon-riscv-sbi.c | 24 ++++++++++++++++++++----
> 2 files changed, 21 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
> index 732c893c8d16..1f2594b8ab9d 100644
> --- a/drivers/tty/serial/Kconfig
> +++ b/drivers/tty/serial/Kconfig
> @@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
>
> config SERIAL_EARLYCON_RISCV_SBI
> bool "Early console using RISC-V SBI"
> - depends on RISCV_SBI_V01
> + depends on RISCV_SBI
> select SERIAL_CORE
> select SERIAL_CORE_CONSOLE
> select SERIAL_EARLYCON
> diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c b/drivers/tty/serial/earlycon-riscv-sbi.c
> index 27afb0b74ea7..5351e1e31f45 100644
> --- a/drivers/tty/serial/earlycon-riscv-sbi.c
> +++ b/drivers/tty/serial/earlycon-riscv-sbi.c
> @@ -15,17 +15,33 @@ static void sbi_putc(struct uart_port *port, unsigned char c)
> sbi_console_putchar(c);
> }
>
> -static void sbi_console_write(struct console *con,
> - const char *s, unsigned n)
> +static void sbi_0_1_console_write(struct console *con,
> + const char *s, unsigned int n)
> {
> struct earlycon_device *dev = con->data;
> uart_console_write(&dev->port, s, n, sbi_putc);
> }
>
> +static void sbi_dbcn_console_write(struct console *con,
> + const char *s, unsigned int n)
> +{
> + sbi_debug_console_write(n, __pa(s));

This only works for strings in the linear mapping or the kernel mapping (not
vmalloc, which includes the stack). So I don't think we can use __pa() here.

> +}
> +
> static int __init early_sbi_setup(struct earlycon_device *device,
> const char *opt)
> {
> - device->con->write = sbi_console_write;
> - return 0;
> + int ret = 0;
> +
> + if (sbi_debug_console_available) {
> + device->con->write = sbi_dbcn_console_write;
> + } else {
> + if (IS_ENABLED(CONFIG_RISCV_SBI_V01))

"else if", no need for the extra block/indentation.

Regards,
Samuel

> + device->con->write = sbi_0_1_console_write;
> + else
> + ret = -ENODEV;
> + }
> +
> + return ret;
> }
> EARLYCON_DECLARE(sbi, early_sbi_setup);

2023-11-21 22:48:18

by Samuel Holland

[permalink] [raw]
Subject: Re: [PATCH v4 5/5] RISC-V: Enable SBI based earlycon support

Hi Anup,

On 2023-11-17 9:38 PM, Anup Patel wrote:
> Let us enable SBI based earlycon support in defconfigs for both RV32
> and RV64 so that "earlycon=sbi" can be used again.
>
> Signed-off-by: Anup Patel <[email protected]>
> Reviewed-by: Andrew Jones <[email protected]>
> ---
> arch/riscv/configs/defconfig | 1 +
> arch/riscv/configs/rv32_defconfig | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> index 905881282a7c..eaf34e871e30 100644
> --- a/arch/riscv/configs/defconfig
> +++ b/arch/riscv/configs/defconfig
> @@ -149,6 +149,7 @@ CONFIG_SERIAL_8250_CONSOLE=y
> CONFIG_SERIAL_8250_DW=y
> CONFIG_SERIAL_OF_PLATFORM=y
> CONFIG_SERIAL_SH_SCI=y
> +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
> CONFIG_VIRTIO_CONSOLE=y
> CONFIG_HW_RANDOM=y
> CONFIG_HW_RANDOM_VIRTIO=y
> diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
> index 89b601e253a6..5721af39afd1 100644
> --- a/arch/riscv/configs/rv32_defconfig
> +++ b/arch/riscv/configs/rv32_defconfig

This file isn't used anymore since 72f045d19f25 ("riscv: Fixup difference with
defconfig"), so there's no need to update it. I'll send a patch deleting it.

Regards,
Samuel

> @@ -66,6 +66,7 @@ CONFIG_INPUT_MOUSEDEV=y
> CONFIG_SERIAL_8250=y
> CONFIG_SERIAL_8250_CONSOLE=y
> CONFIG_SERIAL_OF_PLATFORM=y
> +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
> CONFIG_VIRTIO_CONSOLE=y
> CONFIG_HW_RANDOM=y
> CONFIG_HW_RANDOM_VIRTIO=y

2023-11-23 10:39:56

by Anup Patel

[permalink] [raw]
Subject: Re: [PATCH v4 5/5] RISC-V: Enable SBI based earlycon support

On Wed, Nov 22, 2023 at 4:18 AM Samuel Holland
<[email protected]> wrote:
>
> Hi Anup,
>
> On 2023-11-17 9:38 PM, Anup Patel wrote:
> > Let us enable SBI based earlycon support in defconfigs for both RV32
> > and RV64 so that "earlycon=sbi" can be used again.
> >
> > Signed-off-by: Anup Patel <[email protected]>
> > Reviewed-by: Andrew Jones <[email protected]>
> > ---
> > arch/riscv/configs/defconfig | 1 +
> > arch/riscv/configs/rv32_defconfig | 1 +
> > 2 files changed, 2 insertions(+)
> >
> > diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig
> > index 905881282a7c..eaf34e871e30 100644
> > --- a/arch/riscv/configs/defconfig
> > +++ b/arch/riscv/configs/defconfig
> > @@ -149,6 +149,7 @@ CONFIG_SERIAL_8250_CONSOLE=y
> > CONFIG_SERIAL_8250_DW=y
> > CONFIG_SERIAL_OF_PLATFORM=y
> > CONFIG_SERIAL_SH_SCI=y
> > +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
> > CONFIG_VIRTIO_CONSOLE=y
> > CONFIG_HW_RANDOM=y
> > CONFIG_HW_RANDOM_VIRTIO=y
> > diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig
> > index 89b601e253a6..5721af39afd1 100644
> > --- a/arch/riscv/configs/rv32_defconfig
> > +++ b/arch/riscv/configs/rv32_defconfig
>
> This file isn't used anymore since 72f045d19f25 ("riscv: Fixup difference with
> defconfig"), so there's no need to update it. I'll send a patch deleting it.

Okay, I will drop the changes in rv32_defconfig.

>
> Regards,
> Samuel
>
> > @@ -66,6 +66,7 @@ CONFIG_INPUT_MOUSEDEV=y
> > CONFIG_SERIAL_8250=y
> > CONFIG_SERIAL_8250_CONSOLE=y
> > CONFIG_SERIAL_OF_PLATFORM=y
> > +CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
> > CONFIG_VIRTIO_CONSOLE=y
> > CONFIG_HW_RANDOM=y
> > CONFIG_HW_RANDOM_VIRTIO=y
>

Regards,
Anup

2023-11-23 10:44:00

by Anup Patel

[permalink] [raw]
Subject: Re: [PATCH v4 3/5] tty/serial: Add RISC-V SBI debug console based earlycon

On Wed, Nov 22, 2023 at 4:11 AM Samuel Holland
<[email protected]> wrote:
>
> Hi Anup,
>
> On 2023-11-17 9:38 PM, Anup Patel wrote:
> > We extend the existing RISC-V SBI earlycon support to use the new
> > RISC-V SBI debug console extension.
> >
> > Signed-off-by: Anup Patel <[email protected]>
> > Reviewed-by: Andrew Jones <[email protected]>
> > ---
> > drivers/tty/serial/Kconfig | 2 +-
> > drivers/tty/serial/earlycon-riscv-sbi.c | 24 ++++++++++++++++++++----
> > 2 files changed, 21 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
> > index 732c893c8d16..1f2594b8ab9d 100644
> > --- a/drivers/tty/serial/Kconfig
> > +++ b/drivers/tty/serial/Kconfig
> > @@ -87,7 +87,7 @@ config SERIAL_EARLYCON_SEMIHOST
> >
> > config SERIAL_EARLYCON_RISCV_SBI
> > bool "Early console using RISC-V SBI"
> > - depends on RISCV_SBI_V01
> > + depends on RISCV_SBI
> > select SERIAL_CORE
> > select SERIAL_CORE_CONSOLE
> > select SERIAL_EARLYCON
> > diff --git a/drivers/tty/serial/earlycon-riscv-sbi.c b/drivers/tty/serial/earlycon-riscv-sbi.c
> > index 27afb0b74ea7..5351e1e31f45 100644
> > --- a/drivers/tty/serial/earlycon-riscv-sbi.c
> > +++ b/drivers/tty/serial/earlycon-riscv-sbi.c
> > @@ -15,17 +15,33 @@ static void sbi_putc(struct uart_port *port, unsigned char c)
> > sbi_console_putchar(c);
> > }
> >
> > -static void sbi_console_write(struct console *con,
> > - const char *s, unsigned n)
> > +static void sbi_0_1_console_write(struct console *con,
> > + const char *s, unsigned int n)
> > {
> > struct earlycon_device *dev = con->data;
> > uart_console_write(&dev->port, s, n, sbi_putc);
> > }
> >
> > +static void sbi_dbcn_console_write(struct console *con,
> > + const char *s, unsigned int n)
> > +{
> > + sbi_debug_console_write(n, __pa(s));
>
> This only works for strings in the linear mapping or the kernel mapping (not
> vmalloc, which includes the stack). So I don't think we can use __pa() here.

In which case, we need extend sbi_debug_console_write() to
do the va-to-pa conversion for both earlycon-riscv-sbi.c and
hvc_riscv_sbi.c

>
> > +}
> > +
> > static int __init early_sbi_setup(struct earlycon_device *device,
> > const char *opt)
> > {
> > - device->con->write = sbi_console_write;
> > - return 0;
> > + int ret = 0;
> > +
> > + if (sbi_debug_console_available) {
> > + device->con->write = sbi_dbcn_console_write;
> > + } else {
> > + if (IS_ENABLED(CONFIG_RISCV_SBI_V01))
>
> "else if", no need for the extra block/indentation.

Okay, I will update.

>
> Regards,
> Samuel
>
> > + device->con->write = sbi_0_1_console_write;
> > + else
> > + ret = -ENODEV;
> > + }
> > +
> > + return ret;
> > }
> > EARLYCON_DECLARE(sbi, early_sbi_setup);
>

Regards,
Anup