2023-12-03 22:39:01

by Luca Weiss

[permalink] [raw]
Subject: [PATCH 2/2] ARM: dts: qcom: msm8226: Add CPU and SAW/ACC nodes

From: Ivaylo Ivanov <[email protected]>

Add CPU and SAW/ACC nodes to enable SMP on MSM8226.

Signed-off-by: Ivaylo Ivanov <[email protected]>
[luca: update some nodes to fix dtbs_check errors, reorder, cleanup]
Signed-off-by: Luca Weiss <[email protected]>
---
arch/arm/boot/dts/qcom/qcom-msm8226.dtsi | 91 ++++++++++++++++++++++++++++++++
1 file changed, 91 insertions(+)

diff --git a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
index 8757bc0c8a0f..28abaed4dd08 100644
--- a/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
+++ b/arch/arm/boot/dts/qcom/qcom-msm8226.dtsi
@@ -34,6 +34,57 @@ sleep_clk: sleep_clk {
};
};

+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ CPU0: cpu@0 {
+ compatible = "arm,cortex-a7";
+ enable-method = "qcom,msm8226-smp";
+ device_type = "cpu";
+ reg = <0>;
+ next-level-cache = <&L2>;
+ qcom,acc = <&acc0>;
+ qcom,saw = <&saw0>;
+ };
+
+ CPU1: cpu@1 {
+ compatible = "arm,cortex-a7";
+ enable-method = "qcom,msm8226-smp";
+ device_type = "cpu";
+ reg = <1>;
+ next-level-cache = <&L2>;
+ qcom,acc = <&acc1>;
+ qcom,saw = <&saw1>;
+ };
+
+ CPU2: cpu@2 {
+ compatible = "arm,cortex-a7";
+ enable-method = "qcom,msm8226-smp";
+ device_type = "cpu";
+ reg = <2>;
+ next-level-cache = <&L2>;
+ qcom,acc = <&acc2>;
+ qcom,saw = <&saw2>;
+ };
+
+ CPU3: cpu@3 {
+ compatible = "arm,cortex-a7";
+ enable-method = "qcom,msm8226-smp";
+ device_type = "cpu";
+ reg = <3>;
+ next-level-cache = <&L2>;
+ qcom,acc = <&acc3>;
+ qcom,saw = <&saw3>;
+ };
+
+ L2: l2-cache {
+ compatible = "cache";
+ cache-level = <2>;
+ cache-unified;
+ };
+ };
+
firmware {
scm {
compatible = "qcom,scm-msm8226", "qcom,scm";
@@ -243,6 +294,46 @@ frame@f9028000 {
};
};

+ acc0: power-manager@f9088000 {
+ compatible = "qcom,kpss-acc-v2";
+ reg = <0xf9088000 0x1000>, <0xf9008000 0x1000>;
+ };
+
+ saw0: power-manager@f9089000 {
+ compatible = "qcom,msm8226-saw2-v2.1-cpu", "qcom,saw2";
+ reg = <0xf9089000 0x1000>;
+ };
+
+ acc1: power-manager@f9098000 {
+ compatible = "qcom,kpss-acc-v2";
+ reg = <0xf9098000 0x1000>, <0xf9008000 0x1000>;
+ };
+
+ saw1: power-manager@f9099000 {
+ compatible = "qcom,msm8226-saw2-v2.1-cpu", "qcom,saw2";
+ reg = <0xf9099000 0x1000>;
+ };
+
+ acc2: power-manager@f90a8000 {
+ compatible = "qcom,kpss-acc-v2";
+ reg = <0xf90a8000 0x1000>, <0xf9008000 0x1000>;
+ };
+
+ saw2: power-manager@f90a9000 {
+ compatible = "qcom,msm8226-saw2-v2.1-cpu", "qcom,saw2";
+ reg = <0xf90a9000 0x1000>;
+ };
+
+ acc3: power-manager@f90b8000 {
+ compatible = "qcom,kpss-acc-v2";
+ reg = <0xf90b8000 0x1000>, <0xf9008000 0x1000>;
+ };
+
+ saw3: power-manager@f90b9000 {
+ compatible = "qcom,msm8226-saw2-v2.1-cpu", "qcom,saw2";
+ reg = <0xf90b9000 0x1000>;
+ };
+
sdhc_1: mmc@f9824900 {
compatible = "qcom,msm8226-sdhci", "qcom,sdhci-msm-v4";
reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;

--
2.43.0


2023-12-04 10:42:03

by Konrad Dybcio

[permalink] [raw]
Subject: Re: [PATCH 2/2] ARM: dts: qcom: msm8226: Add CPU and SAW/ACC nodes

On 3.12.2023 23:38, Luca Weiss wrote:
> From: Ivaylo Ivanov <[email protected]>
>
> Add CPU and SAW/ACC nodes to enable SMP on MSM8226.
>
> Signed-off-by: Ivaylo Ivanov <[email protected]>
> [luca: update some nodes to fix dtbs_check errors, reorder, cleanup]
> Signed-off-by: Luca Weiss <[email protected]>
> ---
Looks like L2 SAW (@ 0xf9012000) is missing.. but then it's present
on 8974.. but it's not bound by any driver :)

The nodes you added here look correct FWIW

Konrad

2023-12-04 18:39:22

by Luca Weiss

[permalink] [raw]
Subject: Re: [PATCH 2/2] ARM: dts: qcom: msm8226: Add CPU and SAW/ACC nodes

On Montag, 4. Dezember 2023 11:41:36 CET Konrad Dybcio wrote:
> On 3.12.2023 23:38, Luca Weiss wrote:
> > From: Ivaylo Ivanov <[email protected]>
> >
> > Add CPU and SAW/ACC nodes to enable SMP on MSM8226.
> >
> > Signed-off-by: Ivaylo Ivanov <[email protected]>
> > [luca: update some nodes to fix dtbs_check errors, reorder, cleanup]
> > Signed-off-by: Luca Weiss <[email protected]>
> > ---
>
> Looks like L2 SAW (@ 0xf9012000) is missing.. but then it's present
> on 8974.. but it's not bound by any driver :)

Right, I had this node before:

saw_l2: power-controller@f9012000 {
compatible = "qcom,saw2";
reg = <0xf9012000 0x1000>;
regulator;
};

And then used like this:

L2: l2-cache {
compatible = "cache";
cache-level = <2>;
qcom,saw = <&saw_l2>;
};

I decided to remove it because first there's no "qcom,saw2" (without a second
compatible) in the yaml. And qcom,saw property in the l2-cache node also
wasn't accepted. Since I'm not aware of any driver code currently using this
(and the bindings not being particularly maintained, there's still this bit in
.txt form?) I decided to remove it to not knowingly introduce binding errors.

Regards
Luca

>
> The nodes you added here look correct FWIW
>
> Konrad