Two fixes for the broken build withh GCC currently in linux-next
(next-20231214)
James Clark (2):
arm: perf: Fix ARCH=arm build with GCC in armv8pmu_write_evtype()
arm: perf: Fix ARCH=arm build with GCC in armv8pmu_set_event_filter()
drivers/perf/arm_pmuv3.c | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
--
2.34.1
LLVM ignores everything inside the if statement and doesn't generate
errors, but GCC doesn't ignore it, resulting in the following error:
drivers/perf/arm_pmuv3.c: In function ‘armv8pmu_write_evtype’:
include/linux/bits.h:34:29: error: left shift count >= width of type [-Werror=shift-count-overflow]
34 | (((~UL(0)) - (UL(1) << (l)) + 1) & \
Fix it by changing the if to #if.
Fixes: 3115ee021bfb ("arm64: perf: Include threshold control fields in PMEVTYPER mask")
Reported-by: Uwe Kleine-König <[email protected]>
Closes: https://lore.kernel.org/linux-arm-kernel/[email protected]/
Signed-off-by: James Clark <[email protected]>
---
drivers/perf/arm_pmuv3.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c
index 23fa6c5da82c..3ed2086cefc3 100644
--- a/drivers/perf/arm_pmuv3.c
+++ b/drivers/perf/arm_pmuv3.c
@@ -631,8 +631,9 @@ static void armv8pmu_write_evtype(int idx, unsigned long val)
ARMV8_PMU_EXCLUDE_EL0 |
ARMV8_PMU_EXCLUDE_EL1;
- if (IS_ENABLED(CONFIG_ARM64))
- mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH;
+#if IS_ENABLED(CONFIG_ARM64)
+ mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH;
+#endif
val &= mask;
write_pmevtypern(counter, val);
--
2.34.1
LLVM ignores everything inside the if statement and doesn't generate
errors, but GCC does, resulting in the following:
drivers/perf/arm_pmuv3.c: In function armv8pmu_set_event_filter:
include/linux/bits.h:34:29: error: left shift count >= width of type [-Werror=shift-count-overflow]
34 | (((~UL(0)) - (UL(1) << (l)) + 1) & \
Fix it by changing the if to #if. This results in an unused function
warning for armv8pmu_event_threshold_control(), so suppress that too.
Fixes: 816c26754447 ("arm64: perf: Add support for event counting threshold")
Signed-off-by: James Clark <[email protected]>
---
drivers/perf/arm_pmuv3.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c
index 3ed2086cefc3..8aa23878019a 100644
--- a/drivers/perf/arm_pmuv3.c
+++ b/drivers/perf/arm_pmuv3.c
@@ -338,7 +338,7 @@ static bool armv8pmu_event_want_user_access(struct perf_event *event)
return ATTR_CFG_GET_FLD(&event->attr, rdpmc);
}
-static u8 armv8pmu_event_threshold_control(struct perf_event_attr *attr)
+static __maybe_unused u8 armv8pmu_event_threshold_control(struct perf_event_attr *attr)
{
u8 th_compare = ATTR_CFG_GET_FLD(attr, threshold_compare);
u8 th_count = ATTR_CFG_GET_FLD(attr, threshold_count);
@@ -1040,11 +1040,13 @@ static int armv8pmu_set_event_filter(struct hw_perf_event *event,
return -EINVAL;
}
- if (IS_ENABLED(CONFIG_ARM64) && th) {
+#if IS_ENABLED(CONFIG_ARM64)
+ if (th) {
config_base |= FIELD_PREP(ARMV8_PMU_EVTYPE_TH, th);
config_base |= FIELD_PREP(ARMV8_PMU_EVTYPE_TC,
armv8pmu_event_threshold_control(attr));
}
+#endif
/*
* Install the filter into config_base as this is used to
--
2.34.1
Hello,
On Fri, Dec 15, 2023 at 03:00:38PM +0000, James Clark wrote:
> diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c
> index 23fa6c5da82c..3ed2086cefc3 100644
> --- a/drivers/perf/arm_pmuv3.c
> +++ b/drivers/perf/arm_pmuv3.c
> @@ -631,8 +631,9 @@ static void armv8pmu_write_evtype(int idx, unsigned long val)
> ARMV8_PMU_EXCLUDE_EL0 |
> ARMV8_PMU_EXCLUDE_EL1;
>
> - if (IS_ENABLED(CONFIG_ARM64))
> - mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH;
> +#if IS_ENABLED(CONFIG_ARM64)
> + mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH;
> +#endif
maybe add a comment about why you used an #if here, to prevent the
people sending patches that revert your change?
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | https://www.pengutronix.de/ |
On Fri, Dec 15, 2023 at 03:00:38PM +0000, James Clark wrote:
> LLVM ignores everything inside the if statement and doesn't generate
> errors, but GCC doesn't ignore it, resulting in the following error:
>
> drivers/perf/arm_pmuv3.c: In function 'armv8pmu_write_evtype':
> include/linux/bits.h:34:29: error: left shift count >= width of type [-Werror=shift-count-overflow]
> 34 | (((~UL(0)) - (UL(1) << (l)) + 1) & \
>
> Fix it by changing the if to #if.
I reckon it'd be cleaner to use GENMASK_ULL for the TH and TC fields, in
include/linux/perf/arm_pmu.h have:
| /*
| * PMXEVTYPER: Event selection reg
| */
| #define ARMV8_PMU_EVTYPE_EVENT GENMASK(15, 0) /* Mask for EVENT bits */
| #define ARMV8_PMU_EVTYPE_TH GENMASK_ULL(43, 32) /* arm64 only */
| #define ARMV8_PMU_EVTYPE_TC GENMASK_ULL(63, 61) /* arm64 only */
IIUC that should silence this warning, and it'd remove the need for the
ifdeffery and other changes in patch 2.
Does that work, or am I missing something?
Thanks,
Mark.
>
> Fixes: 3115ee021bfb ("arm64: perf: Include threshold control fields in PMEVTYPER mask")
> Reported-by: Uwe Kleine-K"onig <[email protected]>
> Closes: https://lore.kernel.org/linux-arm-kernel/[email protected]/
> Signed-off-by: James Clark <[email protected]>
> ---
> drivers/perf/arm_pmuv3.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c
> index 23fa6c5da82c..3ed2086cefc3 100644
> --- a/drivers/perf/arm_pmuv3.c
> +++ b/drivers/perf/arm_pmuv3.c
> @@ -631,8 +631,9 @@ static void armv8pmu_write_evtype(int idx, unsigned long val)
> ARMV8_PMU_EXCLUDE_EL0 |
> ARMV8_PMU_EXCLUDE_EL1;
>
> - if (IS_ENABLED(CONFIG_ARM64))
> - mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH;
> +#if IS_ENABLED(CONFIG_ARM64)
> + mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH;
> +#endif
>
> val &= mask;
> write_pmevtypern(counter, val);
> --
> 2.34.1
>
On 15/12/2023 16:21, Mark Rutland wrote:
> On Fri, Dec 15, 2023 at 03:00:38PM +0000, James Clark wrote:
>> LLVM ignores everything inside the if statement and doesn't generate
>> errors, but GCC doesn't ignore it, resulting in the following error:
>>
>> drivers/perf/arm_pmuv3.c: In function 'armv8pmu_write_evtype':
>> include/linux/bits.h:34:29: error: left shift count >= width of type [-Werror=shift-count-overflow]
>> 34 | (((~UL(0)) - (UL(1) << (l)) + 1) & \
>>
>> Fix it by changing the if to #if.
>
> I reckon it'd be cleaner to use GENMASK_ULL for the TH and TC fields, in
> include/linux/perf/arm_pmu.h have:
>
> | /*
> | * PMXEVTYPER: Event selection reg
> | */
> | #define ARMV8_PMU_EVTYPE_EVENT GENMASK(15, 0) /* Mask for EVENT bits */
> | #define ARMV8_PMU_EVTYPE_TH GENMASK_ULL(43, 32) /* arm64 only */
> | #define ARMV8_PMU_EVTYPE_TC GENMASK_ULL(63, 61) /* arm64 only */
>
> IIUC that should silence this warning, and it'd remove the need for the
> ifdeffery and other changes in patch 2.
>
> Does that work, or am I missing something?
>
> Thanks,
> Mark.
>
You're right that does work. For some reason I thought there was some
component of writing it to the mask that was the issue as well.
I'll send another version with that fix instead.
Thanks
James
>>
>> Fixes: 3115ee021bfb ("arm64: perf: Include threshold control fields in PMEVTYPER mask")
>> Reported-by: Uwe Kleine-K"onig <[email protected]>
>> Closes: https://lore.kernel.org/linux-arm-kernel/[email protected]/
>> Signed-off-by: James Clark <[email protected]>
>> ---
>> drivers/perf/arm_pmuv3.c | 5 +++--
>> 1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c
>> index 23fa6c5da82c..3ed2086cefc3 100644
>> --- a/drivers/perf/arm_pmuv3.c
>> +++ b/drivers/perf/arm_pmuv3.c
>> @@ -631,8 +631,9 @@ static void armv8pmu_write_evtype(int idx, unsigned long val)
>> ARMV8_PMU_EXCLUDE_EL0 |
>> ARMV8_PMU_EXCLUDE_EL1;
>>
>> - if (IS_ENABLED(CONFIG_ARM64))
>> - mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH;
>> +#if IS_ENABLED(CONFIG_ARM64)
>> + mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH;
>> +#endif
>>
>> val &= mask;
>> write_pmevtypern(counter, val);
>> --
>> 2.34.1
>>