This patchset introduces support for VDEC video hardware decoder
and VENC video hardware encoder of STMicroelectronics STM32MP25
SoC series.
This initial support implements H264 decoding, VP8 decoding and
JPEG encoding.
This has been tested on STM32MP257F-EV1 evaluation board.
===========
= history =
===========
version 3:
- Fix remarks from Krzysztof Kozlowski:
- drop "items", we keep simple enum in such case
- drop second example - it is the same as the first
- Drop unused node labels as suggested by Conor Dooley
- Revisit min/max resolutions as suggested by Nicolas Dufresne
version 2:
- Fix remarks from Krzysztof Kozlowski on v1:
- single video-codec binding for both VDEC/VENC
- get rid of "-names"
- use of generic node name "video-codec"
version 1:
- Initial submission
Hugues Fruchet (5):
dt-bindings: media: Document STM32MP25 VDEC & VENC video codecs
media: hantro: add support for STM32MP25 VDEC
media: hantro: add support for STM32MP25 VENC
arm64: dts: st: add video decoder support to stm32mp255
arm64: dts: st: add video encoder support to stm32mp255
arch/arm64/boot/dts/st/stm32mp251.dtsi | 12 ++
arch/arm64/boot/dts/st/stm32mp255.dtsi | 17 ++
drivers/media/platform/verisilicon/Kconfig | 14 +-
drivers/media/platform/verisilicon/Makefile | 4 +
.../media/platform/verisilicon/hantro_drv.c | 4 +
.../media/platform/verisilicon/hantro_hw.h | 2 +
.../platform/verisilicon/stm32mp25_vdec_hw.c | 92 +++++++++++
.../platform/verisilicon/stm32mp25_venc_hw.c | 147 ++++++++++++++++++
8 files changed, 289 insertions(+), 3 deletions(-)
create mode 100644 drivers/media/platform/verisilicon/stm32mp25_vdec_hw.c
create mode 100644 drivers/media/platform/verisilicon/stm32mp25_venc_hw.c
--
2.25.1
Add VDEC hardware video decoder support to STM32MP255.
Signed-off-by: Hugues Fruchet <[email protected]>
---
arch/arm64/boot/dts/st/stm32mp251.dtsi | 6 ++++++
arch/arm64/boot/dts/st/stm32mp255.dtsi | 10 ++++++++++
2 files changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index 96859d098ef8..8fc7e9199499 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -52,6 +52,12 @@ ck_icn_ls_mcu: ck-icn-ls-mcu {
compatible = "fixed-clock";
clock-frequency = <200000000>;
};
+
+ ck_icn_p_vdec: ck-icn-p-vdec {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <200000000>;
+ };
};
firmware {
diff --git a/arch/arm64/boot/dts/st/stm32mp255.dtsi b/arch/arm64/boot/dts/st/stm32mp255.dtsi
index e6fa596211f5..aea5096dac3c 100644
--- a/arch/arm64/boot/dts/st/stm32mp255.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp255.dtsi
@@ -6,4 +6,14 @@
#include "stm32mp253.dtsi"
/ {
+ soc@0 {
+ rifsc: rifsc-bus@42080000 {
+ vdec: vdec@480d0000 {
+ compatible = "st,stm32mp25-vdec";
+ reg = <0x480d0000 0x3c8>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ck_icn_p_vdec>;
+ };
+ };
+ };
};
--
2.25.1
Add support for STM32MP25 VENC video hardware encoder.
JPEG encoding up to 8176x8176.
VENC has its own reset/clock/irq.
Signed-off-by: Hugues Fruchet <[email protected]>
---
drivers/media/platform/verisilicon/Makefile | 3 +-
.../media/platform/verisilicon/hantro_drv.c | 1 +
.../media/platform/verisilicon/hantro_hw.h | 1 +
.../platform/verisilicon/stm32mp25_venc_hw.c | 147 ++++++++++++++++++
4 files changed, 151 insertions(+), 1 deletion(-)
create mode 100644 drivers/media/platform/verisilicon/stm32mp25_venc_hw.c
diff --git a/drivers/media/platform/verisilicon/Makefile b/drivers/media/platform/verisilicon/Makefile
index 5854e0f0dd32..3bf43fdbedc1 100644
--- a/drivers/media/platform/verisilicon/Makefile
+++ b/drivers/media/platform/verisilicon/Makefile
@@ -41,4 +41,5 @@ hantro-vpu-$(CONFIG_VIDEO_HANTRO_SUNXI) += \
sunxi_vpu_hw.o
hantro-vpu-$(CONFIG_VIDEO_HANTRO_STM32MP25) += \
- stm32mp25_vdec_hw.o
+ stm32mp25_vdec_hw.o \
+ stm32mp25_venc_hw.o
diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c
index 2db27c333924..4d97a8ac03de 100644
--- a/drivers/media/platform/verisilicon/hantro_drv.c
+++ b/drivers/media/platform/verisilicon/hantro_drv.c
@@ -736,6 +736,7 @@ static const struct of_device_id of_hantro_match[] = {
#endif
#ifdef CONFIG_VIDEO_HANTRO_STM32MP25
{ .compatible = "st,stm32mp25-vdec", .data = &stm32mp25_vdec_variant, },
+ { .compatible = "st,stm32mp25-venc", .data = &stm32mp25_venc_variant, },
#endif
{ /* sentinel */ }
};
diff --git a/drivers/media/platform/verisilicon/hantro_hw.h b/drivers/media/platform/verisilicon/hantro_hw.h
index b7eccc1a96fc..70c72e9d11d5 100644
--- a/drivers/media/platform/verisilicon/hantro_hw.h
+++ b/drivers/media/platform/verisilicon/hantro_hw.h
@@ -407,6 +407,7 @@ extern const struct hantro_variant rk3588_vpu981_variant;
extern const struct hantro_variant sama5d4_vdec_variant;
extern const struct hantro_variant sunxi_vpu_variant;
extern const struct hantro_variant stm32mp25_vdec_variant;
+extern const struct hantro_variant stm32mp25_venc_variant;
extern const struct hantro_postproc_ops hantro_g1_postproc_ops;
extern const struct hantro_postproc_ops hantro_g2_postproc_ops;
diff --git a/drivers/media/platform/verisilicon/stm32mp25_venc_hw.c b/drivers/media/platform/verisilicon/stm32mp25_venc_hw.c
new file mode 100644
index 000000000000..9d220ff5f1a9
--- /dev/null
+++ b/drivers/media/platform/verisilicon/stm32mp25_venc_hw.c
@@ -0,0 +1,147 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * STM32MP25 VENC video encoder driver
+ *
+ * Copyright (C) STMicroelectronics SA 2022
+ * Authors: Hugues Fruchet <[email protected]>
+ * for STMicroelectronics.
+ *
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/reset.h>
+
+#include "hantro.h"
+#include "hantro_jpeg.h"
+#include "hantro_h1_regs.h"
+
+/*
+ * Supported formats.
+ */
+
+static const struct hantro_fmt stm32mp25_venc_fmts[] = {
+ {
+ .fourcc = V4L2_PIX_FMT_YUV420M,
+ .codec_mode = HANTRO_MODE_NONE,
+ .enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUV420P,
+ .frmsize = {
+ .min_width = 96,
+ .max_width = FMT_4K_WIDTH,
+ .step_width = MB_DIM,
+ .min_height = 96,
+ .max_height = FMT_4K_HEIGHT,
+ .step_height = MB_DIM,
+ },
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_NV12M,
+ .codec_mode = HANTRO_MODE_NONE,
+ .enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUV420SP,
+ .frmsize = {
+ .min_width = 96,
+ .max_width = FMT_4K_WIDTH,
+ .step_width = MB_DIM,
+ .min_height = 96,
+ .max_height = FMT_4K_HEIGHT,
+ .step_height = MB_DIM,
+ },
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_YUYV,
+ .codec_mode = HANTRO_MODE_NONE,
+ .enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUYV422,
+ .frmsize = {
+ .min_width = 96,
+ .max_width = FMT_4K_WIDTH,
+ .step_width = MB_DIM,
+ .min_height = 96,
+ .max_height = FMT_4K_HEIGHT,
+ .step_height = MB_DIM,
+ },
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_UYVY,
+ .codec_mode = HANTRO_MODE_NONE,
+ .enc_fmt = ROCKCHIP_VPU_ENC_FMT_UYVY422,
+ .frmsize = {
+ .min_width = 96,
+ .max_width = FMT_4K_WIDTH,
+ .step_width = MB_DIM,
+ .min_height = 96,
+ .max_height = FMT_4K_HEIGHT,
+ .step_height = MB_DIM,
+ },
+ },
+ {
+ .fourcc = V4L2_PIX_FMT_JPEG,
+ .codec_mode = HANTRO_MODE_JPEG_ENC,
+ .max_depth = 2,
+ .header_size = JPEG_HEADER_SIZE,
+ .frmsize = {
+ .min_width = 96,
+ .max_width = FMT_4K_WIDTH,
+ .step_width = MB_DIM,
+ .min_height = 96,
+ .max_height = FMT_4K_HEIGHT,
+ .step_height = MB_DIM,
+ },
+ },
+};
+
+static irqreturn_t stm32mp25_venc_irq(int irq, void *dev_id)
+{
+ struct hantro_dev *vpu = dev_id;
+ enum vb2_buffer_state state;
+ u32 status;
+
+ status = vepu_read(vpu, H1_REG_INTERRUPT);
+ state = (status & H1_REG_INTERRUPT_FRAME_RDY) ?
+ VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
+
+ vepu_write(vpu, H1_REG_INTERRUPT_BIT, H1_REG_INTERRUPT);
+
+ hantro_irq_done(vpu, state);
+
+ return IRQ_HANDLED;
+}
+
+static void stm32mp25_venc_reset(struct hantro_ctx *ctx)
+{
+}
+
+/*
+ * Supported codec ops.
+ */
+
+static const struct hantro_codec_ops stm32mp25_venc_codec_ops[] = {
+ [HANTRO_MODE_JPEG_ENC] = {
+ .run = hantro_h1_jpeg_enc_run,
+ .reset = stm32mp25_venc_reset,
+ .done = hantro_h1_jpeg_enc_done,
+ },
+};
+
+/*
+ * Variants.
+ */
+
+static const struct hantro_irq stm32mp25_venc_irqs[] = {
+ { "venc", stm32mp25_venc_irq },
+};
+
+static const char * const stm32mp25_venc_clk_names[] = {
+ "venc-clk"
+};
+
+const struct hantro_variant stm32mp25_venc_variant = {
+ .enc_fmts = stm32mp25_venc_fmts,
+ .num_enc_fmts = ARRAY_SIZE(stm32mp25_venc_fmts),
+ .codec = HANTRO_JPEG_ENCODER,
+ .codec_ops = stm32mp25_venc_codec_ops,
+ .irqs = stm32mp25_venc_irqs,
+ .num_irqs = ARRAY_SIZE(stm32mp25_venc_irqs),
+ .clk_names = stm32mp25_venc_clk_names,
+ .num_clocks = ARRAY_SIZE(stm32mp25_venc_clk_names)
+};
+
--
2.25.1
Add STM32MP25 VDEC video decoder & VENC video encoder bindings.
Signed-off-by: Hugues Fruchet <[email protected]>
---
.../media/st,stm32mp25-video-codec.yaml | 50 +++++++++++++++++++
1 file changed, 50 insertions(+)
create mode 100644 Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml
diff --git a/Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml b/Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml
new file mode 100644
index 000000000000..e167e3b1bec3
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/st,stm32mp25-video-codec.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics STM32MP25 VDEC video decoder & VENC video encoder
+
+maintainers:
+ - Hugues Fruchet <[email protected]>
+
+description:
+ The STMicroelectronics STM32MP25 SOCs embeds a VDEC video hardware
+ decoder peripheral based on Verisilicon VC8000NanoD IP (former Hantro G1)
+ and a VENC video hardware encoder peripheral based on Verisilicon
+ VC8000NanoE IP (former Hantro H1).
+
+properties:
+ compatible:
+ enum:
+ - st,stm32mp25-vdec
+ - st,stm32mp25-venc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ video-codec@580d0000 {
+ compatible = "st,stm32mp25-vdec";
+ reg = <0x580d0000 0x3c8>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ck_icn_p_vdec>;
+ };
--
2.25.1
Add VENC hardware video encoder support to STM32MP255.
Signed-off-by: Hugues Fruchet <[email protected]>
---
arch/arm64/boot/dts/st/stm32mp251.dtsi | 6 ++++++
arch/arm64/boot/dts/st/stm32mp255.dtsi | 7 +++++++
2 files changed, 13 insertions(+)
diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
index 8fc7e9199499..5dd4f3580a60 100644
--- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
@@ -58,6 +58,12 @@ ck_icn_p_vdec: ck-icn-p-vdec {
compatible = "fixed-clock";
clock-frequency = <200000000>;
};
+
+ ck_icn_p_venc: ck-icn-p-venc {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <200000000>;
+ };
};
firmware {
diff --git a/arch/arm64/boot/dts/st/stm32mp255.dtsi b/arch/arm64/boot/dts/st/stm32mp255.dtsi
index aea5096dac3c..17f197c5b22b 100644
--- a/arch/arm64/boot/dts/st/stm32mp255.dtsi
+++ b/arch/arm64/boot/dts/st/stm32mp255.dtsi
@@ -14,6 +14,13 @@ vdec: vdec@480d0000 {
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ck_icn_p_vdec>;
};
+
+ venc: venc@480e0000 {
+ compatible = "st,stm32mp25-venc";
+ reg = <0x480e0000 0x800>;
+ interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ck_icn_ls_mcu>;
+ };
};
};
};
--
2.25.1
Hi,
Le mercredi 20 décembre 2023 à 09:46 +0100, Hugues Fruchet a écrit :
> Add support for STM32MP25 VENC video hardware encoder.
> JPEG encoding up to 8176x8176.
> VENC has its own reset/clock/irq.
>
> Signed-off-by: Hugues Fruchet <[email protected]>
> ---
> drivers/media/platform/verisilicon/Makefile | 3 +-
> .../media/platform/verisilicon/hantro_drv.c | 1 +
> .../media/platform/verisilicon/hantro_hw.h | 1 +
> .../platform/verisilicon/stm32mp25_venc_hw.c | 147 ++++++++++++++++++
> 4 files changed, 151 insertions(+), 1 deletion(-)
> create mode 100644 drivers/media/platform/verisilicon/stm32mp25_venc_hw.c
>
> diff --git a/drivers/media/platform/verisilicon/Makefile b/drivers/media/platform/verisilicon/Makefile
> index 5854e0f0dd32..3bf43fdbedc1 100644
> --- a/drivers/media/platform/verisilicon/Makefile
> +++ b/drivers/media/platform/verisilicon/Makefile
> @@ -41,4 +41,5 @@ hantro-vpu-$(CONFIG_VIDEO_HANTRO_SUNXI) += \
> sunxi_vpu_hw.o
>
> hantro-vpu-$(CONFIG_VIDEO_HANTRO_STM32MP25) += \
> - stm32mp25_vdec_hw.o
> + stm32mp25_vdec_hw.o \
> + stm32mp25_venc_hw.o
> diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c
> index 2db27c333924..4d97a8ac03de 100644
> --- a/drivers/media/platform/verisilicon/hantro_drv.c
> +++ b/drivers/media/platform/verisilicon/hantro_drv.c
> @@ -736,6 +736,7 @@ static const struct of_device_id of_hantro_match[] = {
> #endif
> #ifdef CONFIG_VIDEO_HANTRO_STM32MP25
> { .compatible = "st,stm32mp25-vdec", .data = &stm32mp25_vdec_variant, },
> + { .compatible = "st,stm32mp25-venc", .data = &stm32mp25_venc_variant, },
> #endif
> { /* sentinel */ }
> };
> diff --git a/drivers/media/platform/verisilicon/hantro_hw.h b/drivers/media/platform/verisilicon/hantro_hw.h
> index b7eccc1a96fc..70c72e9d11d5 100644
> --- a/drivers/media/platform/verisilicon/hantro_hw.h
> +++ b/drivers/media/platform/verisilicon/hantro_hw.h
> @@ -407,6 +407,7 @@ extern const struct hantro_variant rk3588_vpu981_variant;
> extern const struct hantro_variant sama5d4_vdec_variant;
> extern const struct hantro_variant sunxi_vpu_variant;
> extern const struct hantro_variant stm32mp25_vdec_variant;
> +extern const struct hantro_variant stm32mp25_venc_variant;
>
> extern const struct hantro_postproc_ops hantro_g1_postproc_ops;
> extern const struct hantro_postproc_ops hantro_g2_postproc_ops;
> diff --git a/drivers/media/platform/verisilicon/stm32mp25_venc_hw.c b/drivers/media/platform/verisilicon/stm32mp25_venc_hw.c
> new file mode 100644
> index 000000000000..9d220ff5f1a9
> --- /dev/null
> +++ b/drivers/media/platform/verisilicon/stm32mp25_venc_hw.c
> @@ -0,0 +1,147 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * STM32MP25 VENC video encoder driver
> + *
> + * Copyright (C) STMicroelectronics SA 2022
> + * Authors: Hugues Fruchet <[email protected]>
> + * for STMicroelectronics.
> + *
> + */
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/reset.h>
> +
> +#include "hantro.h"
> +#include "hantro_jpeg.h"
> +#include "hantro_h1_regs.h"
> +
> +/*
> + * Supported formats.
> + */
> +
> +static const struct hantro_fmt stm32mp25_venc_fmts[] = {
> + {
> + .fourcc = V4L2_PIX_FMT_YUV420M,
> + .codec_mode = HANTRO_MODE_NONE,
> + .enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUV420P,
> + .frmsize = {
> + .min_width = 96,
> + .max_width = FMT_4K_WIDTH,
> + .step_width = MB_DIM,
> + .min_height = 96,
> + .max_height = FMT_4K_HEIGHT,
> + .step_height = MB_DIM,
> + },
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_NV12M,
> + .codec_mode = HANTRO_MODE_NONE,
> + .enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUV420SP,
> + .frmsize = {
> + .min_width = 96,
> + .max_width = FMT_4K_WIDTH,
> + .step_width = MB_DIM,
> + .min_height = 96,
> + .max_height = FMT_4K_HEIGHT,
> + .step_height = MB_DIM,
> + },
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_YUYV,
> + .codec_mode = HANTRO_MODE_NONE,
> + .enc_fmt = ROCKCHIP_VPU_ENC_FMT_YUYV422,
> + .frmsize = {
> + .min_width = 96,
> + .max_width = FMT_4K_WIDTH,
> + .step_width = MB_DIM,
> + .min_height = 96,
> + .max_height = FMT_4K_HEIGHT,
> + .step_height = MB_DIM,
> + },
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_UYVY,
> + .codec_mode = HANTRO_MODE_NONE,
> + .enc_fmt = ROCKCHIP_VPU_ENC_FMT_UYVY422,
> + .frmsize = {
> + .min_width = 96,
> + .max_width = FMT_4K_WIDTH,
> + .step_width = MB_DIM,
> + .min_height = 96,
> + .max_height = FMT_4K_HEIGHT,
> + .step_height = MB_DIM,
> + },
For all the RAW formats, min/max/step isn't being used at the moment, so best to
drop it.
> + },
> + {
> + .fourcc = V4L2_PIX_FMT_JPEG,
> + .codec_mode = HANTRO_MODE_JPEG_ENC,
> + .max_depth = 2,
> + .header_size = JPEG_HEADER_SIZE,
> + .frmsize = {
> + .min_width = 96,
> + .max_width = FMT_4K_WIDTH,
This should be 8176 according to your commit message. Though, according to the
Rockchip integration, this is more likely 8192. I'd suggest to add a define and
share it if that is correct.
> + .step_width = MB_DIM,
> + .min_height = 96,
> + .max_height = FMT_4K_HEIGHT,
> + .step_height = MB_DIM,
> + },
> + },
> +};
> +
> +static irqreturn_t stm32mp25_venc_irq(int irq, void *dev_id)
> +{
> + struct hantro_dev *vpu = dev_id;
> + enum vb2_buffer_state state;
> + u32 status;
> +
> + status = vepu_read(vpu, H1_REG_INTERRUPT);
> + state = (status & H1_REG_INTERRUPT_FRAME_RDY) ?
> + VB2_BUF_STATE_DONE : VB2_BUF_STATE_ERROR;
> +
> + vepu_write(vpu, H1_REG_INTERRUPT_BIT, H1_REG_INTERRUPT);
> +
> + hantro_irq_done(vpu, state);
> +
> + return IRQ_HANDLED;
> +}
> +
> +static void stm32mp25_venc_reset(struct hantro_ctx *ctx)
> +{
> +}
> +
> +/*
> + * Supported codec ops.
> + */
> +
> +static const struct hantro_codec_ops stm32mp25_venc_codec_ops[] = {
> + [HANTRO_MODE_JPEG_ENC] = {
> + .run = hantro_h1_jpeg_enc_run,
> + .reset = stm32mp25_venc_reset,
> + .done = hantro_h1_jpeg_enc_done,
> + },
> +};
> +
> +/*
> + * Variants.
> + */
> +
> +static const struct hantro_irq stm32mp25_venc_irqs[] = {
> + { "venc", stm32mp25_venc_irq },
> +};
> +
> +static const char * const stm32mp25_venc_clk_names[] = {
> + "venc-clk"
> +};
> +
> +const struct hantro_variant stm32mp25_venc_variant = {
> + .enc_fmts = stm32mp25_venc_fmts,
> + .num_enc_fmts = ARRAY_SIZE(stm32mp25_venc_fmts),
> + .codec = HANTRO_JPEG_ENCODER,
> + .codec_ops = stm32mp25_venc_codec_ops,
> + .irqs = stm32mp25_venc_irqs,
> + .num_irqs = ARRAY_SIZE(stm32mp25_venc_irqs),
> + .clk_names = stm32mp25_venc_clk_names,
> + .num_clocks = ARRAY_SIZE(stm32mp25_venc_clk_names)
> +};
> +