From: William Zhang <[email protected]>
Update the descriptions to reflect different families of broadband SoC and
use the general name bcmbca for ARM based SoC.
Add brcm,nand-use-wp property to have an option for disabling this
feature on broadband board design that does not use write protection.
Add brcm,nand-ecc-use-strap to get ecc setting from board boot strap for
broadband board designs because they do not specify ecc setting in dts
but rather using the strap setting.
Remove the requirement of interrupts property to reflect the driver
code. Also add myself to the list of maintainers.
Signed-off-by: William Zhang <[email protected]>
Reviewed-by: David Regan <[email protected]>
---
Changes in v2:
- Revert the new compatible string nand-bcmbca
- Drop the BCM63168 compatible fix to avoid any potential ABI
incompatibility issue
- Simplify the explanation for brcm,nand-use-wp
- Keep the interrupt name requirement when interrupt number is specified
---
.../bindings/mtd/brcm,brcmnand.yaml | 36 +++++++++++++++----
1 file changed, 30 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
index f57e96374e67..56176ec1a992 100644
--- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
+++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
@@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller
maintainers:
- Brian Norris <[email protected]>
- Kamal Dasu <[email protected]>
+ - William Zhang <[email protected]>
description: |
The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
@@ -18,9 +19,10 @@ description: |
supports basic PROGRAM and READ functions, among other features.
This controller was originally designed for STB SoCs (BCM7xxx) but is now
- available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and
- iProc/Cygnus. Its history includes several similar (but not fully register
- compatible) versions.
+ available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based
+ Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus.
+ Its history includes several similar (but not fully register compatible)
+ versions.
-- Additional SoC-specific NAND controller properties --
@@ -53,7 +55,7 @@ properties:
- brcm,brcmnand-v7.2
- brcm,brcmnand-v7.3
- const: brcm,brcmnand
- - description: BCM63138 SoC-specific NAND controller
+ - description: BCMBCA SoC-specific NAND controller
items:
- const: brcm,nand-bcm63138
- enum:
@@ -65,7 +67,7 @@ properties:
- const: brcm,nand-iproc
- const: brcm,brcmnand-v6.1
- const: brcm,brcmnand
- - description: BCM63168 SoC-specific NAND controller
+ - description: BCM63xx SoC-specific NAND controller
items:
- const: brcm,nand-bcm63168
- const: brcm,nand-bcm6368
@@ -111,6 +113,17 @@ properties:
earlier versions of this core that include WP
type: boolean
+ brcm,nand-use-wp:
+ description:
+ Use this property to indicate if board design uses
+ controller's write protection feature and connects its
+ NAND_WPb pin to nand chip's WP_L pin. Driver defaults to
+ use this feature when this property does not exist.
+ Set to 0 if WP pins are not connected and feature is not
+ used. Set to 1 if WP pins are connected and feature is used.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ enum: [0, 1]
+
patternProperties:
"^nand@[a-f0-9]$":
type: object
@@ -137,6 +150,16 @@ patternProperties:
layout.
$ref: /schemas/types.yaml#/definitions/uint32
+ brcm,nand-ecc-use-strap:
+ description:
+ This flag is used by the driver to get the ecc strength and
+ spare area size from the SoC NAND boot strap setting. This
+ is commonly used by the BCMBCA SoC board design. If ecc
+ strength and spare area size are set by nand-ecc-strength
+ and brcm,nand-oob-sector-size in the dts, these settings
+ have precedence and override this flag.
+ $ref: /schemas/types.yaml#/definitions/flag
+
unevaluatedProperties: false
allOf:
@@ -177,6 +200,8 @@ allOf:
- const: iproc-idm
- const: iproc-ext
- if:
+ required:
+ - interrupts
properties:
interrupts:
minItems: 2
@@ -189,7 +214,6 @@ unevaluatedProperties: false
required:
- reg
- reg-names
- - interrupts
examples:
- |
--
2.37.3
On Thu, Jan 18, 2024 at 11:53:47AM -0800, [email protected] wrote:
> From: William Zhang <[email protected]>
>
> Update the descriptions to reflect different families of broadband SoC and
> use the general name bcmbca for ARM based SoC.
>
> Add brcm,nand-use-wp property to have an option for disabling this
> feature on broadband board design that does not use write protection.
>
> Add brcm,nand-ecc-use-strap to get ecc setting from board boot strap for
> broadband board designs because they do not specify ecc setting in dts
> but rather using the strap setting.
>
> Remove the requirement of interrupts property to reflect the driver
> code. Also add myself to the list of maintainers.
>
> Signed-off-by: William Zhang <[email protected]>
> Reviewed-by: David Regan <[email protected]>
> ---
> Changes in v2:
> - Revert the new compatible string nand-bcmbca
> - Drop the BCM63168 compatible fix to avoid any potential ABI
> incompatibility issue
> - Simplify the explanation for brcm,nand-use-wp
> - Keep the interrupt name requirement when interrupt number is specified
> ---
> .../bindings/mtd/brcm,brcmnand.yaml | 36 +++++++++++++++----
> 1 file changed, 30 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> index f57e96374e67..56176ec1a992 100644
> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> @@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller
> maintainers:
> - Brian Norris <[email protected]>
> - Kamal Dasu <[email protected]>
> + - William Zhang <[email protected]>
>
> description: |
> The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
> @@ -18,9 +19,10 @@ description: |
> supports basic PROGRAM and READ functions, among other features.
>
> This controller was originally designed for STB SoCs (BCM7xxx) but is now
> - available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and
> - iProc/Cygnus. Its history includes several similar (but not fully register
> - compatible) versions.
> + available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based
> + Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus.
> + Its history includes several similar (but not fully register compatible)
> + versions.
>
> -- Additional SoC-specific NAND controller properties --
>
> @@ -53,7 +55,7 @@ properties:
> - brcm,brcmnand-v7.2
> - brcm,brcmnand-v7.3
> - const: brcm,brcmnand
> - - description: BCM63138 SoC-specific NAND controller
> + - description: BCMBCA SoC-specific NAND controller
> items:
> - const: brcm,nand-bcm63138
> - enum:
> @@ -65,7 +67,7 @@ properties:
> - const: brcm,nand-iproc
> - const: brcm,brcmnand-v6.1
> - const: brcm,brcmnand
> - - description: BCM63168 SoC-specific NAND controller
> + - description: BCM63xx SoC-specific NAND controller
> items:
> - const: brcm,nand-bcm63168
> - const: brcm,nand-bcm6368
> @@ -111,6 +113,17 @@ properties:
> earlier versions of this core that include WP
> type: boolean
>
> + brcm,nand-use-wp:
> + description:
> + Use this property to indicate if board design uses
> + controller's write protection feature and connects its
> + NAND_WPb pin to nand chip's WP_L pin. Driver defaults to
> + use this feature when this property does not exist.
> + Set to 0 if WP pins are not connected and feature is not
> + used. Set to 1 if WP pins are connected and feature is used.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [0, 1]
This property does not make sense to me. "Driver defaults to use this
feature when the property does not exist" - either the property name is
backwards or the description is. Secondly, I don't get why the property
is an enum in the first place - depending on which if the name or
description is wrong, either 0 or 1 would overlap with the default.
> patternProperties:
> "^nand@[a-f0-9]$":
> type: object
> @@ -137,6 +150,16 @@ patternProperties:
> layout.
> $ref: /schemas/types.yaml#/definitions/uint32
>
> + brcm,nand-ecc-use-strap:
> + description:
> + This flag is used by the driver to get the ecc strength and
> + spare area size from the SoC NAND boot strap setting. This
> + is commonly used by the BCMBCA SoC board design. If ecc
> + strength and spare area size are set by nand-ecc-strength
> + and brcm,nand-oob-sector-size in the dts, these settings
> + have precedence and override this flag.
> + $ref: /schemas/types.yaml#/definitions/flag
This property I'm not all that sure about either. If the specific
properties that you mention here are not set in the DT what happens at
the moment?
I suppose what I am getting at is why are the bootstrap settings not
always used in the absence of specific values provided in the DT?
Thanks,
Conor.
> +
> unevaluatedProperties: false
>
> allOf:
> @@ -177,6 +200,8 @@ allOf:
> - const: iproc-idm
> - const: iproc-ext
> - if:
> + required:
> + - interrupts
> properties:
> interrupts:
> minItems: 2
> @@ -189,7 +214,6 @@ unevaluatedProperties: false
> required:
> - reg
> - reg-names
> - - interrupts
>
> examples:
> - |
> --
> 2.37.3
>
Hi,
On 01/19/2024 09:12 AM, Conor Dooley wrote:
> On Thu, Jan 18, 2024 at 11:53:47AM -0800, [email protected] wrote:
>> From: William Zhang <[email protected]>
>>
>> Update the descriptions to reflect different families of broadband SoC and
>> use the general name bcmbca for ARM based SoC.
>>
>> Add brcm,nand-use-wp property to have an option for disabling this
>> feature on broadband board design that does not use write protection.
>>
>> Add brcm,nand-ecc-use-strap to get ecc setting from board boot strap for
>> broadband board designs because they do not specify ecc setting in dts
>> but rather using the strap setting.
>>
>> Remove the requirement of interrupts property to reflect the driver
>> code. Also add myself to the list of maintainers.
>>
>> Signed-off-by: William Zhang <[email protected]>
>> Reviewed-by: David Regan <[email protected]>
>> ---
>> Changes in v2:
>> - Revert the new compatible string nand-bcmbca
>> - Drop the BCM63168 compatible fix to avoid any potential ABI
>> incompatibility issue
>> - Simplify the explanation for brcm,nand-use-wp
>> - Keep the interrupt name requirement when interrupt number is specified
>> ---
>> .../bindings/mtd/brcm,brcmnand.yaml | 36 +++++++++++++++----
>> 1 file changed, 30 insertions(+), 6 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>> index f57e96374e67..56176ec1a992 100644
>> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>> @@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller
>> maintainers:
>> - Brian Norris <[email protected]>
>> - Kamal Dasu <[email protected]>
>> + - William Zhang <[email protected]>
>>
>> description: |
>> The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
>> @@ -18,9 +19,10 @@ description: |
>> supports basic PROGRAM and READ functions, among other features.
>>
>> This controller was originally designed for STB SoCs (BCM7xxx) but is now
>> - available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and
>> - iProc/Cygnus. Its history includes several similar (but not fully register
>> - compatible) versions.
>> + available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based
>> + Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus.
>> + Its history includes several similar (but not fully register compatible)
>> + versions.
>>
>> -- Additional SoC-specific NAND controller properties --
>>
>> @@ -53,7 +55,7 @@ properties:
>> - brcm,brcmnand-v7.2
>> - brcm,brcmnand-v7.3
>> - const: brcm,brcmnand
>> - - description: BCM63138 SoC-specific NAND controller
>> + - description: BCMBCA SoC-specific NAND controller
>> items:
>> - const: brcm,nand-bcm63138
>> - enum:
>> @@ -65,7 +67,7 @@ properties:
>> - const: brcm,nand-iproc
>> - const: brcm,brcmnand-v6.1
>> - const: brcm,brcmnand
>> - - description: BCM63168 SoC-specific NAND controller
>> + - description: BCM63xx SoC-specific NAND controller
>> items:
>> - const: brcm,nand-bcm63168
>> - const: brcm,nand-bcm6368
>> @@ -111,6 +113,17 @@ properties:
>> earlier versions of this core that include WP
>> type: boolean
>>
>> + brcm,nand-use-wp:
>> + description:
>> + Use this property to indicate if board design uses
>> + controller's write protection feature and connects its
>> + NAND_WPb pin to nand chip's WP_L pin. Driver defaults to
>> + use this feature when this property does not exist.
>> + Set to 0 if WP pins are not connected and feature is not
>> + used. Set to 1 if WP pins are connected and feature is used.
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> + enum: [0, 1]
>
> This property does not make sense to me. "Driver defaults to use this
> feature when the property does not exist" - either the property name is
> backwards or the description is. Secondly, I don't get why the property
> is an enum in the first place - depending on which if the name or
> description is wrong, either 0 or 1 would overlap with the default.
>
The write protection feature was controlled by the module parameter
wp_on with default set to enabled. But not all the board use this
feature especially in BCMBCA broadband board. And module parameter is
not sufficient as different board can have different option. Add a
device tree property to override this default behavior and allow this
feature to be configured through the board dts on per board basis.
Maybe I can update the text here to
"By default the driver use a module parameter with default value set to
enable to control this feature for all boards. Use this dts property to
override the default behavior and enable/disable this feature through
board dts on per board basis"
>> patternProperties:
>> "^nand@[a-f0-9]$":
>> type: object
>> @@ -137,6 +150,16 @@ patternProperties:
>> layout.
>> $ref: /schemas/types.yaml#/definitions/uint32
>>
>> + brcm,nand-ecc-use-strap:
>> + description:
>> + This flag is used by the driver to get the ecc strength and
>> + spare area size from the SoC NAND boot strap setting. This
>> + is commonly used by the BCMBCA SoC board design. If ecc
>> + strength and spare area size are set by nand-ecc-strength
>> + and brcm,nand-oob-sector-size in the dts, these settings
>> + have precedence and override this flag.
>> + $ref: /schemas/types.yaml#/definitions/flag
>
> This property I'm not all that sure about either. If the specific
> properties that you mention here are not set in the DT what happens at
> the moment?
>
In that case, the ecc strength and oob size come from ONFI or nand id
decoding. But that is usually the minimum requirement and user can
choose to use stronger ecc as long as there is enough oob spare area in
the nand chip.
> I suppose what I am getting at is why are the bootstrap settings not
> always used in the absence of specific values provided in the DT?
>
This is because the STB, iProc and other chip and their board design may
not have or use the strap setting. But for BCMBCA SoC and board
reference design, we always use the strap setting.
> Thanks,
> Conor.
>
>> +
>> unevaluatedProperties: false
>>
>> allOf:
>> @@ -177,6 +200,8 @@ allOf:
>> - const: iproc-idm
>> - const: iproc-ext
>> - if:
>> + required:
>> + - interrupts
>> properties:
>> interrupts:
>> minItems: 2
>> @@ -189,7 +214,6 @@ unevaluatedProperties: false
>> required:
>> - reg
>> - reg-names
>> - - interrupts
>>
>> examples:
>> - |
>> --
>> 2.37.3
>>
Hi,
On Thu, 18 Jan 2024 at 20:56, <[email protected]> wrote:
>
> From: William Zhang <[email protected]>
>
> Update the descriptions to reflect different families of broadband SoC and
> use the general name bcmbca for ARM based SoC.
>
> Add brcm,nand-use-wp property to have an option for disabling this
> feature on broadband board design that does not use write protection.
>
> Add brcm,nand-ecc-use-strap to get ecc setting from board boot strap for
> broadband board designs because they do not specify ecc setting in dts
> but rather using the strap setting.
>
> Remove the requirement of interrupts property to reflect the driver
> code. Also add myself to the list of maintainers.
>
> Signed-off-by: William Zhang <[email protected]>
> Reviewed-by: David Regan <[email protected]>
> ---
> Changes in v2:
> - Revert the new compatible string nand-bcmbca
> - Drop the BCM63168 compatible fix to avoid any potential ABI
> incompatibility issue
> - Simplify the explanation for brcm,nand-use-wp
> - Keep the interrupt name requirement when interrupt number is specified
> ---
> .../bindings/mtd/brcm,brcmnand.yaml | 36 +++++++++++++++----
> 1 file changed, 30 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> index f57e96374e67..56176ec1a992 100644
> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> @@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller
> maintainers:
> - Brian Norris <[email protected]>
> - Kamal Dasu <[email protected]>
> + - William Zhang <[email protected]>
>
> description: |
> The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
> @@ -18,9 +19,10 @@ description: |
> supports basic PROGRAM and READ functions, among other features.
>
> This controller was originally designed for STB SoCs (BCM7xxx) but is now
> - available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and
> - iProc/Cygnus. Its history includes several similar (but not fully register
> - compatible) versions.
> + available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based
> + Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus.
> + Its history includes several similar (but not fully register compatible)
> + versions.
>
> -- Additional SoC-specific NAND controller properties --
>
> @@ -53,7 +55,7 @@ properties:
> - brcm,brcmnand-v7.2
> - brcm,brcmnand-v7.3
> - const: brcm,brcmnand
> - - description: BCM63138 SoC-specific NAND controller
> + - description: BCMBCA SoC-specific NAND controller
> items:
> - const: brcm,nand-bcm63138
> - enum:
> @@ -65,7 +67,7 @@ properties:
> - const: brcm,nand-iproc
> - const: brcm,brcmnand-v6.1
> - const: brcm,brcmnand
> - - description: BCM63168 SoC-specific NAND controller
> + - description: BCM63xx SoC-specific NAND controller
Only the BCM63268 family has a v4.0 NAND controller with support for
ONFI and raw access; BCM6368 has a v2.1, and BCM6328 and BCM6362 have
a v2.2.
So claiming this is a generic binding is wrong; you would need to add
the appropriate variants first. Or add another one for the BCM6368
NAND v2.x controllers, which is missing. You can find them used in
arch/mips/boot/dts/brcm/bcm63{28,62,68}.dtsi.
> items:
> - const: brcm,nand-bcm63168
> - const: brcm,nand-bcm6368
Also bcm63168's v4.0 has a different register layout than bcm6368's
v2.x, so claiming brcm.nand-bcm6368 as compatible here is a bit weird.
It works because the register layout used is derived from the
"brcm,brcmnand-vX.Y" compatible, and the driver attaching to
'brcm,nand-bcm6368" only uses the shared interrupt registers which are
identical, the layout only diverges after that.
But then again these aren't really used as compatibles in the original
sense, and more like tags which describe different parts of the
controller, and the combination is the whole unique "compatible". Not
sure if this is how compatibles are supposed to be used. /rant.
Best Regards,
Jonas
On 2024-01-18 20:53, [email protected] wrote:
> @@ -111,6 +113,17 @@ properties:
> earlier versions of this core that include WP
> type: boolean
>
> + brcm,nand-use-wp:
> + description:
> + Use this property to indicate if board design uses
> + controller's write protection feature and connects its
> + NAND_WPb pin to nand chip's WP_L pin. Driver defaults to
> + use this feature when this property does not exist.
> + Set to 0 if WP pins are not connected and feature is not
> + used. Set to 1 if WP pins are connected and feature is used.
> + $ref: /schemas/types.yaml#/definitions/uint32
> + enum: [0, 1]
> +
> patternProperties:
> "^nand@[a-f0-9]$":
> type: object
Please take a look at:
[PATCH 1/2] dt-bindings: mtd: brcmnand: add "no-wp" property
https://lore.kernel.org/linux-mtd/20211109115215.5bcef0db@xps13/T/
Miquel suggested a generic property applicable to all raw NANDs for
such purpose. Unfortunately I dropped the ball on that.
--
Rafał Miłecki
Hi,
On 1/22/24 03:48, Jonas Gorski wrote:
> Hi,
>
> On Thu, 18 Jan 2024 at 20:56, <[email protected]> wrote:
>>
>> From: William Zhang <[email protected]>
>>
>> Update the descriptions to reflect different families of broadband SoC and
>> use the general name bcmbca for ARM based SoC.
>>
>> Add brcm,nand-use-wp property to have an option for disabling this
>> feature on broadband board design that does not use write protection.
>>
>> Add brcm,nand-ecc-use-strap to get ecc setting from board boot strap for
>> broadband board designs because they do not specify ecc setting in dts
>> but rather using the strap setting.
>>
>> Remove the requirement of interrupts property to reflect the driver
>> code. Also add myself to the list of maintainers.
>>
>> Signed-off-by: William Zhang <[email protected]>
>> Reviewed-by: David Regan <[email protected]>
>> ---
>> Changes in v2:
>> - Revert the new compatible string nand-bcmbca
>> - Drop the BCM63168 compatible fix to avoid any potential ABI
>> incompatibility issue
>> - Simplify the explanation for brcm,nand-use-wp
>> - Keep the interrupt name requirement when interrupt number is specified
>> ---
>> .../bindings/mtd/brcm,brcmnand.yaml | 36 +++++++++++++++----
>> 1 file changed, 30 insertions(+), 6 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>> index f57e96374e67..56176ec1a992 100644
>> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>> @@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller
>> maintainers:
>> - Brian Norris <[email protected]>
>> - Kamal Dasu <[email protected]>
>> + - William Zhang <[email protected]>
>>
>> description: |
>> The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
>> @@ -18,9 +19,10 @@ description: |
>> supports basic PROGRAM and READ functions, among other features.
>>
>> This controller was originally designed for STB SoCs (BCM7xxx) but is now
>> - available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and
>> - iProc/Cygnus. Its history includes several similar (but not fully register
>> - compatible) versions.
>> + available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based
>> + Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus.
>> + Its history includes several similar (but not fully register compatible)
>> + versions.
>>
>> -- Additional SoC-specific NAND controller properties --
>>
>> @@ -53,7 +55,7 @@ properties:
>> - brcm,brcmnand-v7.2
>> - brcm,brcmnand-v7.3
>> - const: brcm,brcmnand
>> - - description: BCM63138 SoC-specific NAND controller
>> + - description: BCMBCA SoC-specific NAND controller
>> items:
>> - const: brcm,nand-bcm63138
>> - enum:
>> @@ -65,7 +67,7 @@ properties:
>> - const: brcm,nand-iproc
>> - const: brcm,brcmnand-v6.1
>> - const: brcm,brcmnand
>> - - description: BCM63168 SoC-specific NAND controller
>> + - description: BCM63xx SoC-specific NAND controller
>
> Only the BCM63268 family has a v4.0 NAND controller with support for
> ONFI and raw access; BCM6368 has a v2.1, and BCM6328 and BCM6362 have
> a v2.2.
>
> So claiming this is a generic binding is wrong; you would need to add
> the appropriate variants first. Or add another one for the BCM6368
> NAND v2.x controllers, which is missing. You can find them used in
> arch/mips/boot/dts/brcm/bcm63{28,62,68}.dtsi.
>
I am not changing binding here but jsut update the description to
identify these MIPS based chip as bcm63xx family. This convention is
used in other IP blocks too. And yes this binding is not correct and I
noticed the same v2.x usage in the dtsi files you pointed out. So I
actually updated this binding in my v1 here
https://lore.kernel.org/lkml/[email protected]/
but there was some concern as it could possibly break the ABI in that
thread's discussion.
So I decided to take that change off this patch series since it is not
related to my change (ARM based BCMBCA family) either. It should be a
separate patch to address this MIPS based SoCs binding issue.
>> items:
>> - const: brcm,nand-bcm63168
>> - const: brcm,nand-bcm6368
>
> Also bcm63168's v4.0 has a different register layout than bcm6368's
> v2.x, so claiming brcm.nand-bcm6368 as compatible here is a bit weird.
> It works because the register layout used is derived from the
> "brcm,brcmnand-vX.Y" compatible, and the driver attaching to
> 'brcm,nand-bcm6368" only uses the shared interrupt registers which are
> identical, the layout only diverges after that.
>
> But then again these aren't really used as compatibles in the original
> sense, and more like tags which describe different parts of the
> controller, and the combination is the whole unique "compatible". Not
> sure if this is how compatibles are supposed to be used. /rant.
>
> Best Regards,
> Jonas
Hi
On 1/22/24 10:57, Rafał Miłecki wrote:
> On 2024-01-18 20:53, [email protected] wrote:
>> @@ -111,6 +113,17 @@ properties:
>> earlier versions of this core that include WP
>> type: boolean
>>
>> + brcm,nand-use-wp:
>> + description:
>> + Use this property to indicate if board design uses
>> + controller's write protection feature and connects its
>> + NAND_WPb pin to nand chip's WP_L pin. Driver defaults to
>> + use this feature when this property does not exist.
>> + Set to 0 if WP pins are not connected and feature is not
>> + used. Set to 1 if WP pins are connected and feature is used.
>> + $ref: /schemas/types.yaml#/definitions/uint32
>> + enum: [0, 1]
>> +
>> patternProperties:
>> "^nand@[a-f0-9]$":
>> type: object
>
> Please take a look at:
> [PATCH 1/2] dt-bindings: mtd: brcmnand: add "no-wp" property
> https://lore.kernel.org/linux-mtd/20211109115215.5bcef0db@xps13/T/
>
> Miquel suggested a generic property applicable to all raw NANDs for
> such purpose. Unfortunately I dropped the ball on that.
>
This is already added in this commit
https://github.com/torvalds/linux/commit/cb57fae479be41d1233f5a49d4760de9a5692b6e.
But brcmnand nand controller has dedicated pin for WP and don't use
GPIO. So it does not apply to here. Basically brcmnand controller
handle the WP inside the controller and its driver.
brcm,nand-has-wp is SoC level flag and it actually is only needed for
some rare earlier versions of the controller. I don't want to break
that so I added this board level flag brcm,nand-use-wp for per board
control of the WP pin usage. As you know many BCMBCA reference boards
(like the 4908 based) do not connect WP pin so customer follow the same.
You can use this flag in the Asus GT-AC5300 board dts as you intended to
address in your patch.
On Mon, 22 Jan 2024 at 18:34, William Zhang <[email protected]> wrote:
>
> Hi,
>
> On 1/22/24 03:48, Jonas Gorski wrote:
> > Hi,
> >
> > On Thu, 18 Jan 2024 at 20:56, <[email protected]> wrote:
> >>
> >> From: William Zhang <[email protected]>
> >>
> >> Update the descriptions to reflect different families of broadband SoC and
> >> use the general name bcmbca for ARM based SoC.
> >>
> >> Add brcm,nand-use-wp property to have an option for disabling this
> >> feature on broadband board design that does not use write protection.
> >>
> >> Add brcm,nand-ecc-use-strap to get ecc setting from board boot strap for
> >> broadband board designs because they do not specify ecc setting in dts
> >> but rather using the strap setting.
> >>
> >> Remove the requirement of interrupts property to reflect the driver
> >> code. Also add myself to the list of maintainers.
> >>
> >> Signed-off-by: William Zhang <[email protected]>
> >> Reviewed-by: David Regan <[email protected]>
> >> ---
> >> Changes in v2:
> >> - Revert the new compatible string nand-bcmbca
> >> - Drop the BCM63168 compatible fix to avoid any potential ABI
> >> incompatibility issue
> >> - Simplify the explanation for brcm,nand-use-wp
> >> - Keep the interrupt name requirement when interrupt number is specified
> >> ---
> >> .../bindings/mtd/brcm,brcmnand.yaml | 36 +++++++++++++++----
> >> 1 file changed, 30 insertions(+), 6 deletions(-)
> >>
> >> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> >> index f57e96374e67..56176ec1a992 100644
> >> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> >> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
> >> @@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller
> >> maintainers:
> >> - Brian Norris <[email protected]>
> >> - Kamal Dasu <[email protected]>
> >> + - William Zhang <[email protected]>
> >>
> >> description: |
> >> The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
> >> @@ -18,9 +19,10 @@ description: |
> >> supports basic PROGRAM and READ functions, among other features.
> >>
> >> This controller was originally designed for STB SoCs (BCM7xxx) but is now
> >> - available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and
> >> - iProc/Cygnus. Its history includes several similar (but not fully register
> >> - compatible) versions.
> >> + available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based
> >> + Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus.
> >> + Its history includes several similar (but not fully register compatible)
> >> + versions.
> >>
> >> -- Additional SoC-specific NAND controller properties --
> >>
> >> @@ -53,7 +55,7 @@ properties:
> >> - brcm,brcmnand-v7.2
> >> - brcm,brcmnand-v7.3
> >> - const: brcm,brcmnand
> >> - - description: BCM63138 SoC-specific NAND controller
> >> + - description: BCMBCA SoC-specific NAND controller
> >> items:
> >> - const: brcm,nand-bcm63138
> >> - enum:
> >> @@ -65,7 +67,7 @@ properties:
> >> - const: brcm,nand-iproc
> >> - const: brcm,brcmnand-v6.1
> >> - const: brcm,brcmnand
> >> - - description: BCM63168 SoC-specific NAND controller
> >> + - description: BCM63xx SoC-specific NAND controller
> >
> > Only the BCM63268 family has a v4.0 NAND controller with support for
> > ONFI and raw access; BCM6368 has a v2.1, and BCM6328 and BCM6362 have
> > a v2.2.
> >
> > So claiming this is a generic binding is wrong; you would need to add
> > the appropriate variants first. Or add another one for the BCM6368
> > NAND v2.x controllers, which is missing. You can find them used in
> > arch/mips/boot/dts/brcm/bcm63{28,62,68}.dtsi.
> >
> I am not changing binding here but jsut update the description to
> identify these MIPS based chip as bcm63xx family. This convention is
> used in other IP blocks too. And yes this binding is not correct and I
> noticed the same v2.x usage in the dtsi files you pointed out. So I
> actually updated this binding in my v1 here
> https://lore.kernel.org/lkml/[email protected]/
> but there was some concern as it could possibly break the ABI in that
> thread's discussion.
That change did change the ABI that would have (AFAICT) broken it for BCM63168.
My point is: This binding in its current state is valid *only* for the
BCM63168 NAND controller, and not for any other BCM63xx NAND
controllers.
So changing the description to BCM63xx is wrong, unless you extend it
to also match the BCM6328/6362/6368 NAND controller bindings as used.
I can send a patch adding the missing binding parts, I actually have a
WIP one lying around as I started trying to address dts issues in the
MIPS bcm63xx dts(i) files a while ago.
Best Regards,
Jonas
On 1/23/24 02:34, Jonas Gorski wrote:
> On Mon, 22 Jan 2024 at 18:34, William Zhang <[email protected]> wrote:
>>
>> Hi,
>>
>> On 1/22/24 03:48, Jonas Gorski wrote:
>>> Hi,
>>>
>>> On Thu, 18 Jan 2024 at 20:56, <[email protected]> wrote:
>>>>
>>>> From: William Zhang <[email protected]>
>>>>
>>>> Update the descriptions to reflect different families of broadband SoC and
>>>> use the general name bcmbca for ARM based SoC.
>>>>
>>>> Add brcm,nand-use-wp property to have an option for disabling this
>>>> feature on broadband board design that does not use write protection.
>>>>
>>>> Add brcm,nand-ecc-use-strap to get ecc setting from board boot strap for
>>>> broadband board designs because they do not specify ecc setting in dts
>>>> but rather using the strap setting.
>>>>
>>>> Remove the requirement of interrupts property to reflect the driver
>>>> code. Also add myself to the list of maintainers.
>>>>
>>>> Signed-off-by: William Zhang <[email protected]>
>>>> Reviewed-by: David Regan <[email protected]>
>>>> ---
>>>> Changes in v2:
>>>> - Revert the new compatible string nand-bcmbca
>>>> - Drop the BCM63168 compatible fix to avoid any potential ABI
>>>> incompatibility issue
>>>> - Simplify the explanation for brcm,nand-use-wp
>>>> - Keep the interrupt name requirement when interrupt number is specified
>>>> ---
>>>> .../bindings/mtd/brcm,brcmnand.yaml | 36 +++++++++++++++----
>>>> 1 file changed, 30 insertions(+), 6 deletions(-)
>>>>
>>>> diff --git a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>>>> index f57e96374e67..56176ec1a992 100644
>>>> --- a/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>>>> +++ b/Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
>>>> @@ -9,6 +9,7 @@ title: Broadcom STB NAND Controller
>>>> maintainers:
>>>> - Brian Norris <[email protected]>
>>>> - Kamal Dasu <[email protected]>
>>>> + - William Zhang <[email protected]>
>>>>
>>>> description: |
>>>> The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
>>>> @@ -18,9 +19,10 @@ description: |
>>>> supports basic PROGRAM and READ functions, among other features.
>>>>
>>>> This controller was originally designed for STB SoCs (BCM7xxx) but is now
>>>> - available on a variety of Broadcom SoCs, including some BCM3xxx, BCM63xx, and
>>>> - iProc/Cygnus. Its history includes several similar (but not fully register
>>>> - compatible) versions.
>>>> + available on a variety of Broadcom SoCs, including some BCM3xxx, MIPS based
>>>> + Broadband SoC (BCM63xx), ARM based Broadband SoC (BCMBCA) and iProc/Cygnus.
>>>> + Its history includes several similar (but not fully register compatible)
>>>> + versions.
>>>>
>>>> -- Additional SoC-specific NAND controller properties --
>>>>
>>>> @@ -53,7 +55,7 @@ properties:
>>>> - brcm,brcmnand-v7.2
>>>> - brcm,brcmnand-v7.3
>>>> - const: brcm,brcmnand
>>>> - - description: BCM63138 SoC-specific NAND controller
>>>> + - description: BCMBCA SoC-specific NAND controller
>>>> items:
>>>> - const: brcm,nand-bcm63138
>>>> - enum:
>>>> @@ -65,7 +67,7 @@ properties:
>>>> - const: brcm,nand-iproc
>>>> - const: brcm,brcmnand-v6.1
>>>> - const: brcm,brcmnand
>>>> - - description: BCM63168 SoC-specific NAND controller
>>>> + - description: BCM63xx SoC-specific NAND controller
>>>
>>> Only the BCM63268 family has a v4.0 NAND controller with support for
>>> ONFI and raw access; BCM6368 has a v2.1, and BCM6328 and BCM6362 have
>>> a v2.2.
>>>
>>> So claiming this is a generic binding is wrong; you would need to add
>>> the appropriate variants first. Or add another one for the BCM6368
>>> NAND v2.x controllers, which is missing. You can find them used in
>>> arch/mips/boot/dts/brcm/bcm63{28,62,68}.dtsi.
>>>
>> I am not changing binding here but jsut update the description to
>> identify these MIPS based chip as bcm63xx family. This convention is
>> used in other IP blocks too. And yes this binding is not correct and I
>> noticed the same v2.x usage in the dtsi files you pointed out. So I
>> actually updated this binding in my v1 here
>> https://lore.kernel.org/lkml/[email protected]/
>> but there was some concern as it could possibly break the ABI in that
>> thread's discussion.
>
> That change did change the ABI that would have (AFAICT) broken it for BCM63168.
>
> My point is: This binding in its current state is valid *only* for the
> BCM63168 NAND controller, and not for any other BCM63xx NAND
> controllers.
>
I didn't know that 6368 does not work. I will revert this change then.
> So changing the description to BCM63xx is wrong, unless you extend it
> to also match the BCM6328/6362/6368 NAND controller bindings as used.
>
> I can send a patch adding the missing binding parts, I actually have a
> WIP one lying around as I started trying to address dts issues in the
> MIPS bcm63xx dts(i) files a while ago.
>
Yeah and if you can update it to bcm63xx, that will be great!
> Best Regards,
> Jonas