From: Ghennadi Procopciuc <[email protected]>
This patchset adds device tree support for S32G2 SCMI firmware and uSDHC
node. The SCMI clock IDs are based on a downstream version of the TF-A
stored on GitHub [0].
I can send the patches individually if you prefer that instead of
submitting them all at once.
[0] https://github.com/nxp-auto-linux/arm-trusted-firmware
Ghennadi Procopciuc (3):
dt-bindings: clock: s32g: add uSDHC clock IDs
arm64: dts: s32g: add SCMI firmware node
arm64: dts: s32g: add uSDHC node
arch/arm64/boot/dts/freescale/s32g2.dtsi | 40 ++++++++++++++++++-
.../arm64/boot/dts/freescale/s32g274a-evb.dts | 6 ++-
.../boot/dts/freescale/s32g274a-rdb2.dts | 6 ++-
include/dt-bindings/clock/s32g-scmi-clock.h | 14 +++++++
4 files changed, 63 insertions(+), 3 deletions(-)
create mode 100644 include/dt-bindings/clock/s32g-scmi-clock.h
--
2.43.0
From: Ghennadi Procopciuc <[email protected]>
Add the SCMI clock IDs for the uSDHC controller present on
S32G SoCs.
Signed-off-by: Ciprian Costea <[email protected]>
Signed-off-by: Ghennadi Procopciuc <[email protected]>
---
include/dt-bindings/clock/s32g-scmi-clock.h | 14 ++++++++++++++
1 file changed, 14 insertions(+)
create mode 100644 include/dt-bindings/clock/s32g-scmi-clock.h
diff --git a/include/dt-bindings/clock/s32g-scmi-clock.h b/include/dt-bindings/clock/s32g-scmi-clock.h
new file mode 100644
index 000000000000..739f98a924c3
--- /dev/null
+++ b/include/dt-bindings/clock/s32g-scmi-clock.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
+/*
+ * Copyright 2020-2024 NXP
+ */
+#ifndef _DT_BINDINGS_SCMI_CLK_S32G_H
+#define _DT_BINDINGS_SCMI_CLK_S32G_H
+
+/* uSDHC */
+#define S32G_SCMI_CLK_USDHC_AHB 31
+#define S32G_SCMI_CLK_USDHC_MODULE 32
+#define S32G_SCMI_CLK_USDHC_CORE 33
+#define S32G_SCMI_CLK_USDHC_MOD32K 34
+
+#endif
--
2.43.0
From: Ghennadi Procopciuc <[email protected]>
Linux controls the clocks over SCMI on S32G SoCs. Therefore,
add the SCMI device tree node and the reserved region for SCMI
messages.
Signed-off-by: Catalin Udma <[email protected]>
Signed-off-by: Ghennadi Procopciuc <[email protected]>
---
arch/arm64/boot/dts/freescale/s32g2.dtsi | 28 +++++++++++++++++++++++-
1 file changed, 27 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index 5ac1cc9ff50e..bbb5e979ba93 100644
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -3,10 +3,11 @@
* NXP S32G2 SoC family
*
* Copyright (c) 2021 SUSE LLC
- * Copyright (c) 2017-2021 NXP
+ * Copyright 2017-2021, 2024 NXP
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/s32g-scmi-clock.h>
/ {
compatible = "nxp,s32g2";
@@ -14,6 +15,18 @@ / {
#address-cells = <2>;
#size-cells = <2>;
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ scmi_buf: shm@d0000000 {
+ compatible = "arm,scmi-shmem";
+ reg = <0x0 0xd0000000 0x0 0x80>;
+ no-map;
+ };
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -77,6 +90,19 @@ timer {
};
firmware {
+ scmi {
+ compatible = "arm,scmi-smc";
+ arm,smc-id = <0xc20000fe>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ shmem = <&scmi_buf>;
+
+ clks: protocol@14 {
+ reg = <0x14>;
+ #clock-cells = <1>;
+ };
+ };
+
psci {
compatible = "arm,psci-1.0";
method = "smc";
--
2.43.0
From: Ghennadi Procopciuc <[email protected]>
Add the uSDHC node for the boards that are based on S32G SoCs.
Signed-off-by: Ciprian Costea <[email protected]>
Signed-off-by: Ghennadi Procopciuc <[email protected]>
---
arch/arm64/boot/dts/freescale/s32g2.dtsi | 12 ++++++++++++
arch/arm64/boot/dts/freescale/s32g274a-evb.dts | 6 +++++-
arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts | 6 +++++-
3 files changed, 22 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts/freescale/s32g2.dtsi
index bbb5e979ba93..7a4d686d8c6d 100644
--- a/arch/arm64/boot/dts/freescale/s32g2.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi
@@ -139,6 +139,18 @@ uart2: serial@402bc000 {
status = "disabled";
};
+ usdhc0: mmc@402f0000 {
+ compatible = "nxp,s32g2-usdhc";
+ reg = <0x402f0000 0x1000>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks S32G_SCMI_CLK_USDHC_MODULE>,
+ <&clks S32G_SCMI_CLK_USDHC_AHB>,
+ <&clks S32G_SCMI_CLK_USDHC_CORE>;
+ clock-names = "ipg", "ahb", "per";
+ bus-width = <8>;
+ status = "disabled";
+ };
+
gic: interrupt-controller@50800000 {
compatible = "arm,gic-v3";
reg = <0x50800000 0x10000>,
diff --git a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
index 9118d8d2ee01..00070c949e2a 100644
--- a/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
+++ b/arch/arm64/boot/dts/freescale/s32g274a-evb.dts
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2021 SUSE LLC
- * Copyright (c) 2019-2021 NXP
+ * Copyright 2019-2021, 2024 NXP
*/
/dts-v1/;
@@ -32,3 +32,7 @@ memory@80000000 {
&uart0 {
status = "okay";
};
+
+&usdhc0 {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
index e05ee854cdf5..b3fc12899cae 100644
--- a/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
+++ b/arch/arm64/boot/dts/freescale/s32g274a-rdb2.dts
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2021 SUSE LLC
- * Copyright (c) 2019-2021 NXP
+ * Copyright 2019-2021, 2024 NXP
*/
/dts-v1/;
@@ -38,3 +38,7 @@ &uart0 {
&uart1 {
status = "okay";
};
+
+&usdhc0 {
+ status = "okay";
+};
--
2.43.0
On Fri, Jan 19, 2024 at 03:02:28PM +0200, Ghennadi Procopciuc (OSS) wrote:
> From: Ghennadi Procopciuc <[email protected]>
>
> Add the SCMI clock IDs for the uSDHC controller present on
> S32G SoCs.
>
> Signed-off-by: Ciprian Costea <[email protected]>
> Signed-off-by: Ghennadi Procopciuc <[email protected]>
> ---
> include/dt-bindings/clock/s32g-scmi-clock.h | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
> create mode 100644 include/dt-bindings/clock/s32g-scmi-clock.h
>
> diff --git a/include/dt-bindings/clock/s32g-scmi-clock.h b/include/dt-bindings/clock/s32g-scmi-clock.h
> new file mode 100644
> index 000000000000..739f98a924c3
> --- /dev/null
> +++ b/include/dt-bindings/clock/s32g-scmi-clock.h
> @@ -0,0 +1,14 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
> +/*
> + * Copyright 2020-2024 NXP
> + */
> +#ifndef _DT_BINDINGS_SCMI_CLK_S32G_H
> +#define _DT_BINDINGS_SCMI_CLK_S32G_H
> +
> +/* uSDHC */
> +#define S32G_SCMI_CLK_USDHC_AHB 31
> +#define S32G_SCMI_CLK_USDHC_MODULE 32
> +#define S32G_SCMI_CLK_USDHC_CORE 33
> +#define S32G_SCMI_CLK_USDHC_MOD32K 34
Why do these numbers not start at 0?
On Fri, Jan 19, 2024 at 04:11:37PM +0000, Conor Dooley wrote:
> On Fri, Jan 19, 2024 at 03:02:28PM +0200, Ghennadi Procopciuc (OSS) wrote:
> > From: Ghennadi Procopciuc <[email protected]>
> >
> > Add the SCMI clock IDs for the uSDHC controller present on
> > S32G SoCs.
> >
> > Signed-off-by: Ciprian Costea <[email protected]>
> > Signed-off-by: Ghennadi Procopciuc <[email protected]>
> > ---
> > include/dt-bindings/clock/s32g-scmi-clock.h | 14 ++++++++++++++
> > 1 file changed, 14 insertions(+)
> > create mode 100644 include/dt-bindings/clock/s32g-scmi-clock.h
> >
> > diff --git a/include/dt-bindings/clock/s32g-scmi-clock.h b/include/dt-bindings/clock/s32g-scmi-clock.h
> > new file mode 100644
> > index 000000000000..739f98a924c3
> > --- /dev/null
> > +++ b/include/dt-bindings/clock/s32g-scmi-clock.h
> > @@ -0,0 +1,14 @@
> > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
> > +/*
> > + * Copyright 2020-2024 NXP
> > + */
> > +#ifndef _DT_BINDINGS_SCMI_CLK_S32G_H
> > +#define _DT_BINDINGS_SCMI_CLK_S32G_H
> > +
> > +/* uSDHC */
> > +#define S32G_SCMI_CLK_USDHC_AHB 31
> > +#define S32G_SCMI_CLK_USDHC_MODULE 32
> > +#define S32G_SCMI_CLK_USDHC_CORE 33
> > +#define S32G_SCMI_CLK_USDHC_MOD32K 34
>
> Why do these numbers not start at 0?
Ah, because these are the SCMI IDs directly. If these are numbers that
are in the TRM, just use the numbers directly - there's no need to
create bindings for that.
On 1/19/24 18:14, Conor Dooley wrote:
> On Fri, Jan 19, 2024 at 04:11:37PM +0000, Conor Dooley wrote:
>> On Fri, Jan 19, 2024 at 03:02:28PM +0200, Ghennadi Procopciuc (OSS) wrote:
>>> From: Ghennadi Procopciuc <[email protected]>
>>>
>>> Add the SCMI clock IDs for the uSDHC controller present on
>>> S32G SoCs.
>>>
>>> Signed-off-by: Ciprian Costea <[email protected]>
>>> Signed-off-by: Ghennadi Procopciuc <[email protected]>
>>> ---
>>> include/dt-bindings/clock/s32g-scmi-clock.h | 14 ++++++++++++++
>>> 1 file changed, 14 insertions(+)
>>> create mode 100644 include/dt-bindings/clock/s32g-scmi-clock.h
>>>
>>> diff --git a/include/dt-bindings/clock/s32g-scmi-clock.h b/include/dt-bindings/clock/s32g-scmi-clock.h
>>> new file mode 100644
>>> index 000000000000..739f98a924c3
>>> --- /dev/null
>>> +++ b/include/dt-bindings/clock/s32g-scmi-clock.h
>>> @@ -0,0 +1,14 @@
>>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
>>> +/*
>>> + * Copyright 2020-2024 NXP
>>> + */
>>> +#ifndef _DT_BINDINGS_SCMI_CLK_S32G_H
>>> +#define _DT_BINDINGS_SCMI_CLK_S32G_H
>>> +
>>> +/* uSDHC */
>>> +#define S32G_SCMI_CLK_USDHC_AHB 31
>>> +#define S32G_SCMI_CLK_USDHC_MODULE 32
>>> +#define S32G_SCMI_CLK_USDHC_CORE 33
>>> +#define S32G_SCMI_CLK_USDHC_MOD32K 34
>>
>> Why do these numbers not start at 0?
>
> Ah, because these are the SCMI IDs directly. If these are numbers that
> are in the TRM, just use the numbers directly - there's no need to
> create bindings for that.
>
Hi Conor,
I appreciate you taking the time to review the proposed changes. I
wanted to clarify that the IDs mentioned in the header are SCMI IDs
exported by the TF-A and are utilized by the second patch of this
series. These IDs are for the uSDHC controller to control its clocks. As
other SoCs use this model, I have included all the necessary IDs in a
dedicated header file:
- rk3588s (arch/arm64/boot/dts/rockchip/rk3588s.dtsi:97 [0])
- stm32mp157c (arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts:73 [1])
- stm32mp131 (arch/arm/boot/dts/st/stm32mp131.dtsi:1372 [2])
Should I remove the header and use raw numbers in the uSDHC node? For
example:
> + usdhc0: mmc@402f0000 {
> + compatible = "nxp,s32g2-usdhc";
> + reg = <0x402f0000 0x1000>;
> + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks 32>,
> + <&clks 31>,
> + <&clks 33>;
> + clock-names = "ipg", "ahb", "per";
> + bus-width = <8>;
> + status = "disabled";
> + };
[0]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588s.dtsi#n97
[1]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts#n73
[2]
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/st/stm32mp131.dtsi#n1372
--
Regards,
Ghennadi
On Fri, Jan 19, 2024 at 11:25:57PM +0200, Ghennadi Procopciuc wrote:
> On 1/19/24 18:14, Conor Dooley wrote:
> > On Fri, Jan 19, 2024 at 04:11:37PM +0000, Conor Dooley wrote:
> >> On Fri, Jan 19, 2024 at 03:02:28PM +0200, Ghennadi Procopciuc (OSS) wrote:
> >>> From: Ghennadi Procopciuc <[email protected]>
> >>>
> >>> Add the SCMI clock IDs for the uSDHC controller present on
> >>> S32G SoCs.
> >>>
> >>> Signed-off-by: Ciprian Costea <[email protected]>
> >>> Signed-off-by: Ghennadi Procopciuc <[email protected]>
> >>> ---
> >>> include/dt-bindings/clock/s32g-scmi-clock.h | 14 ++++++++++++++
> >>> 1 file changed, 14 insertions(+)
> >>> create mode 100644 include/dt-bindings/clock/s32g-scmi-clock.h
> >>>
> >>> diff --git a/include/dt-bindings/clock/s32g-scmi-clock.h b/include/dt-bindings/clock/s32g-scmi-clock.h
> >>> new file mode 100644
> >>> index 000000000000..739f98a924c3
> >>> --- /dev/null
> >>> +++ b/include/dt-bindings/clock/s32g-scmi-clock.h
> >>> @@ -0,0 +1,14 @@
> >>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
> >>> +/*
> >>> + * Copyright 2020-2024 NXP
> >>> + */
> >>> +#ifndef _DT_BINDINGS_SCMI_CLK_S32G_H
> >>> +#define _DT_BINDINGS_SCMI_CLK_S32G_H
> >>> +
> >>> +/* uSDHC */
> >>> +#define S32G_SCMI_CLK_USDHC_AHB 31
> >>> +#define S32G_SCMI_CLK_USDHC_MODULE 32
> >>> +#define S32G_SCMI_CLK_USDHC_CORE 33
> >>> +#define S32G_SCMI_CLK_USDHC_MOD32K 34
> >>
> >> Why do these numbers not start at 0?
> >
> > Ah, because these are the SCMI IDs directly. If these are numbers that
> > are in the TRM, just use the numbers directly - there's no need to
> > create bindings for that.
> >
>
> Hi Conor,
>
> I appreciate you taking the time to review the proposed changes. I
> wanted to clarify that the IDs mentioned in the header are SCMI IDs
> exported by the TF-A and are utilized by the second patch of this
> series. These IDs are for the uSDHC controller to control its clocks. As
> other SoCs use this model, I have included all the necessary IDs in a
> dedicated header file:
> - rk3588s (arch/arm64/boot/dts/rockchip/rk3588s.dtsi:97 [0])
> - stm32mp157c (arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts:73 [1])
> - stm32mp131 (arch/arm/boot/dts/st/stm32mp131.dtsi:1372 [2])
>
> Should I remove the header and use raw numbers in the uSDHC node?
IMO, yes. There's no abstraction/binding being created here if they're
the SCMI IDs.
Thanks,
conor.
> For
> example:
> > + usdhc0: mmc@402f0000 {
> > + compatible = "nxp,s32g2-usdhc";
> > + reg = <0x402f0000 0x1000>;
> > + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clks 32>,
> > + <&clks 31>,
> > + <&clks 33>;
> > + clock-names = "ipg", "ahb", "per";
> > + bus-width = <8>;
> > + status = "disabled";
> > + };
>
> [0]
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588s.dtsi#n97
> [1]
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts#n73
> [2]
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/st/stm32mp131.dtsi#n1372
>
> --
> Regards,
> Ghennadi
>
On 1/21/24 15:32, Conor Dooley wrote:
> On Fri, Jan 19, 2024 at 11:25:57PM +0200, Ghennadi Procopciuc wrote:
>> On 1/19/24 18:14, Conor Dooley wrote:
>>> On Fri, Jan 19, 2024 at 04:11:37PM +0000, Conor Dooley wrote:
>>>> On Fri, Jan 19, 2024 at 03:02:28PM +0200, Ghennadi Procopciuc (OSS) wrote:
>>>>> From: Ghennadi Procopciuc <[email protected]>
>>>>>
>>>>> Add the SCMI clock IDs for the uSDHC controller present on
>>>>> S32G SoCs.
>>>>>
>>>>> Signed-off-by: Ciprian Costea <[email protected]>
>>>>> Signed-off-by: Ghennadi Procopciuc <[email protected]>
>>>>> ---
>>>>> include/dt-bindings/clock/s32g-scmi-clock.h | 14 ++++++++++++++
>>>>> 1 file changed, 14 insertions(+)
>>>>> create mode 100644 include/dt-bindings/clock/s32g-scmi-clock.h
>>>>>
>>>>> diff --git a/include/dt-bindings/clock/s32g-scmi-clock.h b/include/dt-bindings/clock/s32g-scmi-clock.h
>>>>> new file mode 100644
>>>>> index 000000000000..739f98a924c3
>>>>> --- /dev/null
>>>>> +++ b/include/dt-bindings/clock/s32g-scmi-clock.h
>>>>> @@ -0,0 +1,14 @@
>>>>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
>>>>> +/*
>>>>> + * Copyright 2020-2024 NXP
>>>>> + */
>>>>> +#ifndef _DT_BINDINGS_SCMI_CLK_S32G_H
>>>>> +#define _DT_BINDINGS_SCMI_CLK_S32G_H
>>>>> +
>>>>> +/* uSDHC */
>>>>> +#define S32G_SCMI_CLK_USDHC_AHB 31
>>>>> +#define S32G_SCMI_CLK_USDHC_MODULE 32
>>>>> +#define S32G_SCMI_CLK_USDHC_CORE 33
>>>>> +#define S32G_SCMI_CLK_USDHC_MOD32K 34
>>>>
>>>> Why do these numbers not start at 0?
>>>
>>> Ah, because these are the SCMI IDs directly. If these are numbers that
>>> are in the TRM, just use the numbers directly - there's no need to
>>> create bindings for that.
>>>
>>
>> Hi Conor,
>>
>> I appreciate you taking the time to review the proposed changes. I
>> wanted to clarify that the IDs mentioned in the header are SCMI IDs
>> exported by the TF-A and are utilized by the second patch of this
>> series. These IDs are for the uSDHC controller to control its clocks. As
>> other SoCs use this model, I have included all the necessary IDs in a
>> dedicated header file:
>> - rk3588s (arch/arm64/boot/dts/rockchip/rk3588s.dtsi:97 [0])
>> - stm32mp157c (arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts:73 [1])
>> - stm32mp131 (arch/arm/boot/dts/st/stm32mp131.dtsi:1372 [2])
>>
>> Should I remove the header and use raw numbers in the uSDHC node?
>
> IMO, yes. There's no abstraction/binding being created here if they're
> the SCMI IDs.
>
> Thanks,
> conor.
Thank you for letting me know. I will make sure to include this change
in the second version of the patchset.
>> For
>> example:
>>> + usdhc0: mmc@402f0000 {
>>> + compatible = "nxp,s32g2-usdhc";
>>> + reg = <0x402f0000 0x1000>;
>>> + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
>>> + clocks = <&clks 32>,
>>> + <&clks 31>,
>>> + <&clks 33>;
>>> + clock-names = "ipg", "ahb", "per";
>>> + bus-width = <8>;
>>> + status = "disabled";
>>> + };
>>
>> [0]
>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588s.dtsi#n97
>> [1]
>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts#n73
>> [2]
>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/st/stm32mp131.dtsi#n1372
>>
>> --
>> Regards,
>> Ghennadi
>>
--
Regards,
Ghennadi
On 1/22/24 12:09, Ghennadi Procopciuc wrote:
> On 1/21/24 15:32, Conor Dooley wrote:
>> On Fri, Jan 19, 2024 at 11:25:57PM +0200, Ghennadi Procopciuc wrote:
>>> On 1/19/24 18:14, Conor Dooley wrote:
>>>> On Fri, Jan 19, 2024 at 04:11:37PM +0000, Conor Dooley wrote:
>>>>> On Fri, Jan 19, 2024 at 03:02:28PM +0200, Ghennadi Procopciuc (OSS) wrote:
>>>>>> From: Ghennadi Procopciuc <[email protected]>
>>>>>>
>>>>>> Add the SCMI clock IDs for the uSDHC controller present on
>>>>>> S32G SoCs.
>>>>>>
>>>>>> Signed-off-by: Ciprian Costea <[email protected]>
>>>>>> Signed-off-by: Ghennadi Procopciuc <[email protected]>
>>>>>> ---
>>>>>> include/dt-bindings/clock/s32g-scmi-clock.h | 14 ++++++++++++++
>>>>>> 1 file changed, 14 insertions(+)
>>>>>> create mode 100644 include/dt-bindings/clock/s32g-scmi-clock.h
>>>>>>
>>>>>> diff --git a/include/dt-bindings/clock/s32g-scmi-clock.h b/include/dt-bindings/clock/s32g-scmi-clock.h
>>>>>> new file mode 100644
>>>>>> index 000000000000..739f98a924c3
>>>>>> --- /dev/null
>>>>>> +++ b/include/dt-bindings/clock/s32g-scmi-clock.h
>>>>>> @@ -0,0 +1,14 @@
>>>>>> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
>>>>>> +/*
>>>>>> + * Copyright 2020-2024 NXP
>>>>>> + */
>>>>>> +#ifndef _DT_BINDINGS_SCMI_CLK_S32G_H
>>>>>> +#define _DT_BINDINGS_SCMI_CLK_S32G_H
>>>>>> +
>>>>>> +/* uSDHC */
>>>>>> +#define S32G_SCMI_CLK_USDHC_AHB 31
>>>>>> +#define S32G_SCMI_CLK_USDHC_MODULE 32
>>>>>> +#define S32G_SCMI_CLK_USDHC_CORE 33
>>>>>> +#define S32G_SCMI_CLK_USDHC_MOD32K 34
>>>>>
>>>>> Why do these numbers not start at 0?
>>>>
>>>> Ah, because these are the SCMI IDs directly. If these are numbers that
>>>> are in the TRM, just use the numbers directly - there's no need to
>>>> create bindings for that.
>>>>
>>>
>>> Hi Conor,
>>>
>>> I appreciate you taking the time to review the proposed changes. I
>>> wanted to clarify that the IDs mentioned in the header are SCMI IDs
>>> exported by the TF-A and are utilized by the second patch of this
>>> series. These IDs are for the uSDHC controller to control its clocks. As
>>> other SoCs use this model, I have included all the necessary IDs in a
>>> dedicated header file:
>>> - rk3588s (arch/arm64/boot/dts/rockchip/rk3588s.dtsi:97 [0])
>>> - stm32mp157c (arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts:73 [1])
>>> - stm32mp131 (arch/arm/boot/dts/st/stm32mp131.dtsi:1372 [2])
>>>
>>> Should I remove the header and use raw numbers in the uSDHC node?
>>
>> IMO, yes. There's no abstraction/binding being created here if they're
>> the SCMI IDs.
I included the suggestion in the second version of this patchset.
>> Thanks,
>> conor.
>
> Thank you for letting me know. I will make sure to include this change
> in the second version of the patchset.
>
>>> For
>>> example:
>>>> + usdhc0: mmc@402f0000 {
>>>> + compatible = "nxp,s32g2-usdhc";
>>>> + reg = <0x402f0000 0x1000>;
>>>> + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
>>>> + clocks = <&clks 32>,
>>>> + <&clks 31>,
>>>> + <&clks 33>;
>>>> + clock-names = "ipg", "ahb", "per";
>>>> + bus-width = <8>;
>>>> + status = "disabled";
>>>> + };
>>>
>>> [0]
>>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3588s.dtsi#n97
>>> [1]
>>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts#n73
>>> [2]
>>> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/st/stm32mp131.dtsi#n1372
>>>
>>> --
>>> Regards,
>>> Ghennadi