The SiFive PLIC driver needs to know the number of irqs and contexts
to complete initialization. Parse these details early in plic_probe()
to avoid unnecessary memory allocations and register mappings if these
details are not available.
Signed-off-by: Anup Patel <[email protected]>
---
drivers/irqchip/irq-sifive-plic.c | 43 ++++++++++++++++++++++++-------
1 file changed, 33 insertions(+), 10 deletions(-)
diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index f0df5d0cb76e..e6d23fde51ed 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -416,6 +416,34 @@ static const struct of_device_id plic_match[] = {
{}
};
+static int plic_parse_nr_irqs_and_contexts(struct platform_device *pdev,
+ u32 *nr_irqs, u32 *nr_contexts)
+{
+ struct device *dev = &pdev->dev;
+ int rc;
+
+ /*
+ * Currently, only OF fwnode is supported so extend this
+ * function for ACPI support.
+ */
+ if (!is_of_node(dev->fwnode))
+ return -EINVAL;
+
+ rc = of_property_read_u32(to_of_node(dev->fwnode), "riscv,ndev", nr_irqs);
+ if (rc) {
+ dev_err(dev, "riscv,ndev property not available\n");
+ return rc;
+ }
+
+ *nr_contexts = of_irq_count(to_of_node(dev->fwnode));
+ if (WARN_ON(!(*nr_contexts))) {
+ dev_err(dev, "no PLIC context available\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int plic_parse_context_parent(struct platform_device *pdev, u32 context,
u32 *parent_hwirq, int *parent_cpu)
{
@@ -464,31 +492,26 @@ static int plic_probe(struct platform_device *pdev)
plic_quirks = (unsigned long)id->data;
}
+ error = plic_parse_nr_irqs_and_contexts(pdev, &nr_irqs, &nr_contexts);
+ if (error)
+ return error;
+
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->dev = dev;
priv->plic_quirks = plic_quirks;
+ priv->nr_irqs = nr_irqs;
priv->regs = devm_platform_ioremap_resource(pdev, 0);
if (WARN_ON(!priv->regs))
return -EIO;
- of_property_read_u32(to_of_node(dev->fwnode), "riscv,ndev", &nr_irqs);
- if (WARN_ON(!nr_irqs))
- return -EINVAL;
-
- priv->nr_irqs = nr_irqs;
-
priv->prio_save = devm_bitmap_zalloc(dev, nr_irqs, GFP_KERNEL);
if (!priv->prio_save)
return -ENOMEM;
- nr_contexts = of_irq_count(to_of_node(dev->fwnode));
- if (WARN_ON(!nr_contexts))
- return -EINVAL;
-
for (i = 0; i < nr_contexts; i++) {
error = plic_parse_context_parent(pdev, i, &parent_hwirq, &cpu);
if (error) {
--
2.34.1
The following commit has been merged into the irq/msi branch of tip:
Commit-ID: 95652106478030f54620b1f0d28f78ab110b3212
Gitweb: https://git.kernel.org/tip/95652106478030f54620b1f0d28f78ab110b3212
Author: Anup Patel <[email protected]>
AuthorDate: Thu, 22 Feb 2024 15:09:54 +05:30
Committer: Thomas Gleixner <[email protected]>
CommitterDate: Fri, 23 Feb 2024 10:18:44 +01:00
irqchip/sifive-plic: Parse number of interrupts and contexts early in plic_probe()
The SiFive PLIC driver needs to know the number of interrupts and contexts
to complete initialization. Parse these details early in plic_probe() to
avoid unnecessary memory allocations and register mappings if these details
are not available.
Signed-off-by: Anup Patel <[email protected]>
Signed-off-by: Thomas Gleixner <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
---
drivers/irqchip/irq-sifive-plic.c | 43 +++++++++++++++++++++++-------
1 file changed, 33 insertions(+), 10 deletions(-)
diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index a399cb3..474ddc3 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -417,6 +417,34 @@ static const struct of_device_id plic_match[] = {
{}
};
+static int plic_parse_nr_irqs_and_contexts(struct platform_device *pdev,
+ u32 *nr_irqs, u32 *nr_contexts)
+{
+ struct device *dev = &pdev->dev;
+ int rc;
+
+ /*
+ * Currently, only OF fwnode is supported so extend this
+ * function for ACPI support.
+ */
+ if (!is_of_node(dev->fwnode))
+ return -EINVAL;
+
+ rc = of_property_read_u32(to_of_node(dev->fwnode), "riscv,ndev", nr_irqs);
+ if (rc) {
+ dev_err(dev, "riscv,ndev property not available\n");
+ return rc;
+ }
+
+ *nr_contexts = of_irq_count(to_of_node(dev->fwnode));
+ if (WARN_ON(!(*nr_contexts))) {
+ dev_err(dev, "no PLIC context available\n");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int plic_parse_context_parent(struct platform_device *pdev, u32 context,
u32 *parent_hwirq, int *parent_cpu)
{
@@ -465,31 +493,26 @@ static int plic_probe(struct platform_device *pdev)
plic_quirks = (unsigned long)id->data;
}
+ error = plic_parse_nr_irqs_and_contexts(pdev, &nr_irqs, &nr_contexts);
+ if (error)
+ return error;
+
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
priv->dev = dev;
priv->plic_quirks = plic_quirks;
+ priv->nr_irqs = nr_irqs;
priv->regs = devm_platform_ioremap_resource(pdev, 0);
if (WARN_ON(!priv->regs))
return -EIO;
- of_property_read_u32(to_of_node(dev->fwnode), "riscv,ndev", &nr_irqs);
- if (WARN_ON(!nr_irqs))
- return -EINVAL;
-
- priv->nr_irqs = nr_irqs;
-
priv->prio_save = devm_bitmap_zalloc(dev, nr_irqs, GFP_KERNEL);
if (!priv->prio_save)
return -ENOMEM;
- nr_contexts = of_irq_count(to_of_node(dev->fwnode));
- if (WARN_ON(!nr_contexts))
- return -EINVAL;
-
for (i = 0; i < nr_contexts; i++) {
error = plic_parse_context_parent(pdev, i, &parent_hwirq, &cpu);
if (error) {