Initial support for Wave515 multi-decoder IP among other refinements.
This was tested on FPGA prototype, so wave5_dt_ids[] was not expanded.
fluster score for JCT-VC-HEVC_V1 testsuite with
GStreamer-H.265-V4L2-Gst1.0 decoder is 132/147
The issue with Main10 tests is that fluster expects decoded file to be
in yuv420p10le format while this driver decodes HEVC Main10 into 8-bit
yuv420p. Though result is looks alright to the naked eye, proper
decoding into yuv420p10le is to be added.
The rest failed fluster tests are common with Wave521.
ChangeLog:
v1:
https://lore.kernel.org/linux-media/[email protected]/
v2:
https://lore.kernel.org/linux-media/[email protected]/
* drop patch "dt-bindings: media: cnm,wave521c: drop resets restriction"
The only user of Wave5 in mainline is TI K3 boards, thus there is
no real need to alter dt-bindings
* in patch "media: chips-media: wave5: support decoding HEVC Main10 profile"
add check for flag "support_hevc10bit_dec"
* in patch "media: chips-media: wave5: support reset lines" move
reset_control_deassert() out of else branch, add
reset_control_assert() to probe error path.
* rework patch "media: chips-media: wave5: drop "sram-size" DT prop"
- don't move alloc/free form device open/close
- intead of exact configuration of reserved SRAM memory in DT and
allocating all of it, allocate all available SRAM memory up to
WAVE5_MAX_SRAM_SIZE from whatever pool provided.
* adjust patch "media: chips-media: wave5: support Wave515 decoder"
according to changes in patches
"media: chips-media: wave5: support decoding HEVC Main10 profile" and
"media: chips-media: wave5: drop "sram-size" DT prop"
v3:
* reword patch "media: chips-media: wave5: separate irq setup routine"
a bit.
* in patch "media: chips-media: wave5: drop "sram-size" DT prop"
- move MAX_SRAM_SIZE define into match_data->sram_size
- add placeholders for validation that allocated SRAM memory is
enough to encode/decode bitstream of given resolution before
setting W5_USE_SEC_AXI and W5_CMD_ENC_PIC_USE_SEC_AXI registers
- reword accordingly
* in patch "media: chips-media: wave5: support Wave515 decoder"
- add comments around SRAM memory allocation/freeing about
Wave515 specifics
- add comments about BSOPTION_RD_PTR_VALID_FLAG bit in
W5_BS_OPTION register
- add W[AVE]521_ prefix to defines, for wich there are W[AVE]515_
alternatieves
- add semi-magic Wave515 specific formulas to estimate SRAM usage
Ivan Bornyakov (5):
media: chips-media: wave5: support decoding HEVC Main10 profile
media: chips-media: wave5: support reset lines
media: chips-media: wave5: separate irq setup routine
media: chips-media: wave5: drop "sram-size" DT prop
media: chips-media: wave5: support Wave515 decoder
.../platform/chips-media/wave5/wave5-helper.c | 8 +-
.../platform/chips-media/wave5/wave5-hw.c | 395 +++++++++++++-----
.../chips-media/wave5/wave5-regdefine.h | 5 +
.../platform/chips-media/wave5/wave5-vdi.c | 27 +-
.../chips-media/wave5/wave5-vpu-dec.c | 51 ++-
.../chips-media/wave5/wave5-vpu-enc.c | 2 +-
.../platform/chips-media/wave5/wave5-vpu.c | 35 +-
.../platform/chips-media/wave5/wave5-vpuapi.h | 3 +
.../chips-media/wave5/wave5-vpuconfig.h | 16 +-
.../media/platform/chips-media/wave5/wave5.h | 6 +
10 files changed, 407 insertions(+), 141 deletions(-)
--
2.44.0
Add initial support for optional reset lines. For now, simply deassert
resets on driver probe and assert them back on driver remove.
Signed-off-by: Ivan Bornyakov <[email protected]>
---
.../media/platform/chips-media/wave5/wave5-vpu.c | 16 +++++++++++++++-
.../platform/chips-media/wave5/wave5-vpuapi.h | 1 +
2 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpu.c b/drivers/media/platform/chips-media/wave5/wave5-vpu.c
index 1b3df5b04249..1e631da58e15 100644
--- a/drivers/media/platform/chips-media/wave5/wave5-vpu.c
+++ b/drivers/media/platform/chips-media/wave5/wave5-vpu.c
@@ -10,6 +10,7 @@
#include <linux/clk.h>
#include <linux/firmware.h>
#include <linux/interrupt.h>
+#include <linux/reset.h>
#include "wave5-vpu.h"
#include "wave5-regdefine.h"
#include "wave5-vpuconfig.h"
@@ -151,6 +152,16 @@ static int wave5_vpu_probe(struct platform_device *pdev)
dev_set_drvdata(&pdev->dev, dev);
dev->dev = &pdev->dev;
+ dev->resets = devm_reset_control_array_get_optional_exclusive(&pdev->dev);
+ if (IS_ERR(dev->resets)) {
+ return dev_err_probe(&pdev->dev, PTR_ERR(dev->resets),
+ "Failed to get reset control\n");
+ }
+
+ ret = reset_control_deassert(dev->resets);
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret, "Failed to deassert resets\n");
+
ret = devm_clk_bulk_get_all(&pdev->dev, &dev->clks);
/* continue without clock, assume externally managed */
@@ -163,7 +174,7 @@ static int wave5_vpu_probe(struct platform_device *pdev)
ret = clk_bulk_prepare_enable(dev->num_clks, dev->clks);
if (ret) {
dev_err(&pdev->dev, "Enabling clocks, fail: %d\n", ret);
- return ret;
+ goto err_reset_assert;
}
ret = of_property_read_u32(pdev->dev.of_node, "sram-size",
@@ -246,6 +257,8 @@ static int wave5_vpu_probe(struct platform_device *pdev)
wave5_vdi_release(&pdev->dev);
err_clk_dis:
clk_bulk_disable_unprepare(dev->num_clks, dev->clks);
+err_reset_assert:
+ reset_control_assert(dev->resets);
return ret;
}
@@ -256,6 +269,7 @@ static void wave5_vpu_remove(struct platform_device *pdev)
mutex_destroy(&dev->dev_lock);
mutex_destroy(&dev->hw_lock);
+ reset_control_assert(dev->resets);
clk_bulk_disable_unprepare(dev->num_clks, dev->clks);
wave5_vpu_enc_unregister_device(dev);
wave5_vpu_dec_unregister_device(dev);
diff --git a/drivers/media/platform/chips-media/wave5/wave5-vpuapi.h b/drivers/media/platform/chips-media/wave5/wave5-vpuapi.h
index 465ff9dfe8b1..da530fd98964 100644
--- a/drivers/media/platform/chips-media/wave5/wave5-vpuapi.h
+++ b/drivers/media/platform/chips-media/wave5/wave5-vpuapi.h
@@ -758,6 +758,7 @@ struct vpu_device {
struct ida inst_ida;
struct clk_bulk_data *clks;
int num_clks;
+ struct reset_control *resets;
};
struct vpu_instance;
--
2.44.0
Hi Ivan
Can you provide a score for testing a fluster tool so that we can verify the change on your HW?
Thanks
Jackson
> -----Original Message-----
> From: Ivan Bornyakov <[email protected]>
> Sent: Saturday, April 6, 2024 1:41 AM
> To: Nas Chung <[email protected]>; jackson.lee
> <[email protected]>; Mauro Carvalho Chehab <[email protected]>;
> Philipp Zabel <[email protected]>; Sebastian Fricke
> <[email protected]>
> Cc: Ivan Bornyakov <[email protected]>; [email protected];
> [email protected]
> Subject: [PATCH v3 0/5] Wave515 decoder IP support
>
> Initial support for Wave515 multi-decoder IP among other refinements.
> This was tested on FPGA prototype, so wave5_dt_ids[] was not expanded.
>
> fluster score for JCT-VC-HEVC_V1 testsuite with
> GStreamer-H.265-V4L2-Gst1.0 decoder is 132/147
>
> The issue with Main10 tests is that fluster expects decoded file to be in
> yuv420p10le format while this driver decodes HEVC Main10 into 8-bit
> yuv420p. Though result is looks alright to the naked eye, proper decoding
> into yuv420p10le is to be added.
>
> The rest failed fluster tests are common with Wave521.
>
> ChangeLog:
> v1:
> https://lore.kernel.org/linux-media/20240318144225.30835-1-
> [email protected]/
> v2:
> https://lore.kernel.org/linux-media/20240325064102.9278-1-
> [email protected]/
> * drop patch "dt-bindings: media: cnm,wave521c: drop resets
> restriction"
> The only user of Wave5 in mainline is TI K3 boards, thus there is
> no real need to alter dt-bindings
> * in patch "media: chips-media: wave5: support decoding HEVC Main10
> profile"
> add check for flag "support_hevc10bit_dec"
> * in patch "media: chips-media: wave5: support reset lines" move
> reset_control_deassert() out of else branch, add
> reset_control_assert() to probe error path.
> * rework patch "media: chips-media: wave5: drop "sram-size" DT prop"
> - don't move alloc/free form device open/close
> - intead of exact configuration of reserved SRAM memory in DT and
> allocating all of it, allocate all available SRAM memory up to
> WAVE5_MAX_SRAM_SIZE from whatever pool provided.
> * adjust patch "media: chips-media: wave5: support Wave515 decoder"
> according to changes in patches
> "media: chips-media: wave5: support decoding HEVC Main10 profile" and
> "media: chips-media: wave5: drop "sram-size" DT prop"
> v3:
> * reword patch "media: chips-media: wave5: separate irq setup routine"
> a bit.
> * in patch "media: chips-media: wave5: drop "sram-size" DT prop"
> - move MAX_SRAM_SIZE define into match_data->sram_size
> - add placeholders for validation that allocated SRAM memory is
> enough to encode/decode bitstream of given resolution before
> setting W5_USE_SEC_AXI and W5_CMD_ENC_PIC_USE_SEC_AXI registers
> - reword accordingly
> * in patch "media: chips-media: wave5: support Wave515 decoder"
> - add comments around SRAM memory allocation/freeing about
> Wave515 specifics
> - add comments about BSOPTION_RD_PTR_VALID_FLAG bit in
> W5_BS_OPTION register
> - add W[AVE]521_ prefix to defines, for wich there are W[AVE]515_
> alternatieves
> - add semi-magic Wave515 specific formulas to estimate SRAM usage
>
> Ivan Bornyakov (5):
> media: chips-media: wave5: support decoding HEVC Main10 profile
> media: chips-media: wave5: support reset lines
> media: chips-media: wave5: separate irq setup routine
> media: chips-media: wave5: drop "sram-size" DT prop
> media: chips-media: wave5: support Wave515 decoder
>
> .../platform/chips-media/wave5/wave5-helper.c | 8 +-
> .../platform/chips-media/wave5/wave5-hw.c | 395 +++++++++++++-----
> .../chips-media/wave5/wave5-regdefine.h | 5 +
> .../platform/chips-media/wave5/wave5-vdi.c | 27 +-
> .../chips-media/wave5/wave5-vpu-dec.c | 51 ++-
> .../chips-media/wave5/wave5-vpu-enc.c | 2 +-
> .../platform/chips-media/wave5/wave5-vpu.c | 35 +-
> .../platform/chips-media/wave5/wave5-vpuapi.h | 3 +
> .../chips-media/wave5/wave5-vpuconfig.h | 16 +-
> .../media/platform/chips-media/wave5/wave5.h | 6 +
> 10 files changed, 407 insertions(+), 141 deletions(-)
>
> --
> 2.44.0
Hi
On Thu, Apr 11, 2024 at 08:13:39AM +0000, jackson.lee wrote:
> Hi Ivan
>
> Can you provide a score for testing a fluster tool so that we can verify the change on your HW?
>
I did that, didn't I?
> Thanks
> Jackson
>
> > -----Original Message-----
> > From: Ivan Bornyakov <[email protected]>
> > Sent: Saturday, April 6, 2024 1:41 AM
> > To: Nas Chung <[email protected]>; jackson.lee
> > <[email protected]>; Mauro Carvalho Chehab <[email protected]>;
> > Philipp Zabel <[email protected]>; Sebastian Fricke
> > <[email protected]>
> > Cc: Ivan Bornyakov <[email protected]>; [email protected];
> > [email protected]
> > Subject: [PATCH v3 0/5] Wave515 decoder IP support
> >
> > Initial support for Wave515 multi-decoder IP among other refinements.
> > This was tested on FPGA prototype, so wave5_dt_ids[] was not expanded.
> >
> > fluster score for JCT-VC-HEVC_V1 testsuite with
> > GStreamer-H.265-V4L2-Gst1.0 decoder is 132/147
> >
Here it is. Above is the score, below is notes about failed tests.
> > The issue with Main10 tests is that fluster expects decoded file to be in
> > yuv420p10le format while this driver decodes HEVC Main10 into 8-bit
> > yuv420p. Though result is looks alright to the naked eye, proper decoding
> > into yuv420p10le is to be added.
> >
> > The rest failed fluster tests are common with Wave521.
> >
> > ChangeLog:
> > v1:
> > https://lore.kernel.org/linux-media/20240318144225.30835-1-
> > [email protected]/
> > v2:
> > https://lore.kernel.org/linux-media/20240325064102.9278-1-
> > [email protected]/
> > * drop patch "dt-bindings: media: cnm,wave521c: drop resets
> > restriction"
> > The only user of Wave5 in mainline is TI K3 boards, thus there is
> > no real need to alter dt-bindings
> > * in patch "media: chips-media: wave5: support decoding HEVC Main10
> > profile"
> > add check for flag "support_hevc10bit_dec"
> > * in patch "media: chips-media: wave5: support reset lines" move
> > reset_control_deassert() out of else branch, add
> > reset_control_assert() to probe error path.
> > * rework patch "media: chips-media: wave5: drop "sram-size" DT prop"
> > - don't move alloc/free form device open/close
> > - intead of exact configuration of reserved SRAM memory in DT and
> > allocating all of it, allocate all available SRAM memory up to
> > WAVE5_MAX_SRAM_SIZE from whatever pool provided.
> > * adjust patch "media: chips-media: wave5: support Wave515 decoder"
> > according to changes in patches
> > "media: chips-media: wave5: support decoding HEVC Main10 profile" and
> > "media: chips-media: wave5: drop "sram-size" DT prop"
> > v3:
> > * reword patch "media: chips-media: wave5: separate irq setup routine"
> > a bit.
> > * in patch "media: chips-media: wave5: drop "sram-size" DT prop"
> > - move MAX_SRAM_SIZE define into match_data->sram_size
> > - add placeholders for validation that allocated SRAM memory is
> > enough to encode/decode bitstream of given resolution before
> > setting W5_USE_SEC_AXI and W5_CMD_ENC_PIC_USE_SEC_AXI registers
> > - reword accordingly
> > * in patch "media: chips-media: wave5: support Wave515 decoder"
> > - add comments around SRAM memory allocation/freeing about
> > Wave515 specifics
> > - add comments about BSOPTION_RD_PTR_VALID_FLAG bit in
> > W5_BS_OPTION register
> > - add W[AVE]521_ prefix to defines, for wich there are W[AVE]515_
> > alternatieves
> > - add semi-magic Wave515 specific formulas to estimate SRAM usage
> >
> > Ivan Bornyakov (5):
> > media: chips-media: wave5: support decoding HEVC Main10 profile
> > media: chips-media: wave5: support reset lines
> > media: chips-media: wave5: separate irq setup routine
> > media: chips-media: wave5: drop "sram-size" DT prop
> > media: chips-media: wave5: support Wave515 decoder
> >
> > .../platform/chips-media/wave5/wave5-helper.c | 8 +-
> > .../platform/chips-media/wave5/wave5-hw.c | 395 +++++++++++++-----
> > .../chips-media/wave5/wave5-regdefine.h | 5 +
> > .../platform/chips-media/wave5/wave5-vdi.c | 27 +-
> > .../chips-media/wave5/wave5-vpu-dec.c | 51 ++-
> > .../chips-media/wave5/wave5-vpu-enc.c | 2 +-
> > .../platform/chips-media/wave5/wave5-vpu.c | 35 +-
> > .../platform/chips-media/wave5/wave5-vpuapi.h | 3 +
> > .../chips-media/wave5/wave5-vpuconfig.h | 16 +-
> > .../media/platform/chips-media/wave5/wave5.h | 6 +
> > 10 files changed, 407 insertions(+), 141 deletions(-)
> >
> > --
> > 2.44.0
>
Hi Ivan
> -----Original Message-----
> From: Ivan Bornyakov <[email protected]>
> Sent: Thursday, April 11, 2024 6:37 PM
> To: jackson.lee <[email protected]>
> Cc: Nas Chung <[email protected]>; Mauro Carvalho Chehab
> <[email protected]>; Philipp Zabel <[email protected]>; Sebastian
> Fricke <[email protected]>; [email protected]; linux-
> [email protected]
> Subject: Re: RE: [PATCH v3 0/5] Wave515 decoder IP support
>
> Hi
>
> On Thu, Apr 11, 2024 at 08:13:39AM +0000, jackson.lee wrote:
> > Hi Ivan
> >
> > Can you provide a score for testing a fluster tool so that we can verify
> the change on your HW?
> >
>
> I did that, didn't I?
>
> > Thanks
> > Jackson
> >
> > > -----Original Message-----
> > > From: Ivan Bornyakov <[email protected]>
> > > Sent: Saturday, April 6, 2024 1:41 AM
> > > To: Nas Chung <[email protected]>; jackson.lee
> > > <[email protected]>; Mauro Carvalho Chehab
> > > <[email protected]>; Philipp Zabel <[email protected]>;
> > > Sebastian Fricke <[email protected]>
> > > Cc: Ivan Bornyakov <[email protected]>;
> > > [email protected]; [email protected]
> > > Subject: [PATCH v3 0/5] Wave515 decoder IP support
> > >
> > > Initial support for Wave515 multi-decoder IP among other refinements.
> > > This was tested on FPGA prototype, so wave5_dt_ids[] was not expanded.
> > >
> > > fluster score for JCT-VC-HEVC_V1 testsuite with
> > > GStreamer-H.265-V4L2-Gst1.0 decoder is 132/147
> > >
>
> Here it is. Above is the score, below is notes about failed tests.
>
I didn't see that, It is enough for HEVC
> > > The issue with Main10 tests is that fluster expects decoded file to
> > > be in yuv420p10le format while this driver decodes HEVC Main10 into
> > > 8-bit yuv420p. Though result is looks alright to the naked eye,
> > > proper decoding into yuv420p10le is to be added.
> > >
> > > The rest failed fluster tests are common with Wave521.
> > >
> > > ChangeLog:
> > > v1:
> > > https://lore.kernel.org/linux-media/20240318144225.30835-1-
> > > [email protected]/
> > > v2:
> > > https://lore.kernel.org/linux-media/20240325064102.9278-1-
> > > [email protected]/
> > > * drop patch "dt-bindings: media: cnm,wave521c: drop resets
> > > restriction"
> > > The only user of Wave5 in mainline is TI K3 boards, thus there is
> > > no real need to alter dt-bindings
> > > * in patch "media: chips-media: wave5: support decoding HEVC
> > > Main10 profile"
> > > add check for flag "support_hevc10bit_dec"
> > > * in patch "media: chips-media: wave5: support reset lines" move
> > > reset_control_deassert() out of else branch, add
> > > reset_control_assert() to probe error path.
> > > * rework patch "media: chips-media: wave5: drop "sram-size" DT prop"
> > > - don't move alloc/free form device open/close
> > > - intead of exact configuration of reserved SRAM memory in DT and
> > > allocating all of it, allocate all available SRAM memory up to
> > > WAVE5_MAX_SRAM_SIZE from whatever pool provided.
> > > * adjust patch "media: chips-media: wave5: support Wave515 decoder"
> > > according to changes in patches
> > > "media: chips-media: wave5: support decoding HEVC Main10 profile"
> and
> > > "media: chips-media: wave5: drop "sram-size" DT prop"
> > > v3:
> > > * reword patch "media: chips-media: wave5: separate irq setup routine"
> > > a bit.
> > > * in patch "media: chips-media: wave5: drop "sram-size" DT prop"
> > > - move MAX_SRAM_SIZE define into match_data->sram_size
> > > - add placeholders for validation that allocated SRAM memory is
> > > enough to encode/decode bitstream of given resolution before
> > > setting W5_USE_SEC_AXI and W5_CMD_ENC_PIC_USE_SEC_AXI registers
> > > - reword accordingly
> > > * in patch "media: chips-media: wave5: support Wave515 decoder"
> > > - add comments around SRAM memory allocation/freeing about
> > > Wave515 specifics
> > > - add comments about BSOPTION_RD_PTR_VALID_FLAG bit in
> > > W5_BS_OPTION register
> > > - add W[AVE]521_ prefix to defines, for wich there are W[AVE]515_
> > > alternatieves
> > > - add semi-magic Wave515 specific formulas to estimate SRAM
> > > usage
> > >
> > > Ivan Bornyakov (5):
> > > media: chips-media: wave5: support decoding HEVC Main10 profile
> > > media: chips-media: wave5: support reset lines
> > > media: chips-media: wave5: separate irq setup routine
> > > media: chips-media: wave5: drop "sram-size" DT prop
> > > media: chips-media: wave5: support Wave515 decoder
> > >
> > > .../platform/chips-media/wave5/wave5-helper.c | 8 +-
> > > .../platform/chips-media/wave5/wave5-hw.c | 395 +++++++++++++-----
> > > .../chips-media/wave5/wave5-regdefine.h | 5 +
> > > .../platform/chips-media/wave5/wave5-vdi.c | 27 +-
> > > .../chips-media/wave5/wave5-vpu-dec.c | 51 ++-
> > > .../chips-media/wave5/wave5-vpu-enc.c | 2 +-
> > > .../platform/chips-media/wave5/wave5-vpu.c | 35 +-
> > > .../platform/chips-media/wave5/wave5-vpuapi.h | 3 +
> > > .../chips-media/wave5/wave5-vpuconfig.h | 16 +-
> > > .../media/platform/chips-media/wave5/wave5.h | 6 +
> > > 10 files changed, 407 insertions(+), 141 deletions(-)
> > >
> > > --
> > > 2.44.0
> >