This patchset has several updates in imx93 dtsi and imx93-11x11-evk dts
- add dma for lpspi/lpi2c
- add nvmem for fec/eqos
- update sdhc assigned clocks
- update resource table for m33
- add sleep pinctrl
- add reset gpios for network phys
- includes a defconfig patch to build in OCOTP ELE.
Signed-off-by: Peng Fan <[email protected]>
---
Changes in v2:
- Add new patch 1 to convert dma bit mask to FSL_EDMA_RX
- Use FSL_EDMA_RX for patch 2,3
- Update commit log for patch 7. Add Fixes tag for patch 7.
- Link to v1: https://lore.kernel.org/r/[email protected]
---
Haibo Chen (1):
arm64: dts: imx93: assign usdhc[1..3] root clock to 400MHz
Luke Wang (1):
arm64: dts: imx93-11x11-evk: add different usdhc pinctrl for different timing usage
Peng Fan (9):
arm64: dts: imx93: use FSL_EDMA_RX for rx channel
arm64: dts: imx93: add dma support for lpi2c[1..8]
arm64: dts: imx93: add dma support for lpspi[1..8]
arm64: dts: imx93: add nvmem property for fec1
arm64: dts: imx93: add nvmem property for eqos
arm64: dts: imx93-11x11-evk: update resource table address
arm64: dts: imx93-11x11-evk: add sleep pinctrl for eqos and fec
arm64: dts: imx93-11x11-evk: add sleep pinctrl for sdhc2
arm64: defconfig: build in OCOTP ELE
Wei Fang (1):
arm64: dts: imx93-11x11-evk: add reset gpios for ethernet PHYs
arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts | 146 ++++++++++++++++++++--
arch/arm64/boot/dts/freescale/imx93.dtsi | 79 ++++++++++--
arch/arm64/configs/defconfig | 2 +-
3 files changed, 204 insertions(+), 23 deletions(-)
---
base-commit: 9ed46da14b9b9b2ad4edb3b0c545b6dbe5c00d39
change-id: 20240413-imx93-dts-4-13-60d93c9f1cb2
Best regards,
--
Peng Fan <[email protected]>
From: Peng Fan <[email protected]>
Use FSL_EDMA_RX for dma rx channel bitmask, which is intuitive.
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx93.dtsi | 25 +++++++++++++------------
1 file changed, 13 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index b8ef9b938856..42bbe491a29b 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -4,6 +4,7 @@
*/
#include <dt-bindings/clock/imx93-clock.h>
+#include <dt-bindings/dma/fsl-edma.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -361,7 +362,7 @@ lpuart1: serial@44380000 {
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART1_GATE>;
clock-names = "ipg";
- dmas = <&edma1 17 0 1>, <&edma1 16 0 0>;
+ dmas = <&edma1 17 0 FSL_EDMA_RX>, <&edma1 16 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
@@ -372,7 +373,7 @@ lpuart2: serial@44390000 {
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART2_GATE>;
clock-names = "ipg";
- dmas = <&edma1 19 0 1>, <&edma1 18 0 0>;
+ dmas = <&edma1 19 0 FSL_EDMA_RX>, <&edma1 18 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
@@ -400,7 +401,7 @@ sai1: sai@443b0000 {
<&clk IMX93_CLK_SAI1_GATE>, <&clk IMX93_CLK_DUMMY>,
<&clk IMX93_CLK_DUMMY>;
clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
- dmas = <&edma1 22 0 1>, <&edma1 21 0 0>;
+ dmas = <&edma1 22 0 FSL_EDMA_RX>, <&edma1 21 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
@@ -737,7 +738,7 @@ lpuart3: serial@42570000 {
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART3_GATE>;
clock-names = "ipg";
- dmas = <&edma2 18 0 1>, <&edma2 17 0 0>;
+ dmas = <&edma2 18 0 FSL_EDMA_RX>, <&edma2 17 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
@@ -748,7 +749,7 @@ lpuart4: serial@42580000 {
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART4_GATE>;
clock-names = "ipg";
- dmas = <&edma2 20 0 1>, <&edma2 19 0 0>;
+ dmas = <&edma2 20 0 FSL_EDMA_RX>, <&edma2 19 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
@@ -759,7 +760,7 @@ lpuart5: serial@42590000 {
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART5_GATE>;
clock-names = "ipg";
- dmas = <&edma2 22 0 1>, <&edma2 21 0 0>;
+ dmas = <&edma2 22 0 FSL_EDMA_RX>, <&edma2 21 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
@@ -770,7 +771,7 @@ lpuart6: serial@425a0000 {
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART6_GATE>;
clock-names = "ipg";
- dmas = <&edma2 24 0 1>, <&edma2 23 0 0>;
+ dmas = <&edma2 24 0 FSL_EDMA_RX>, <&edma2 23 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
@@ -813,7 +814,7 @@ sai2: sai@42650000 {
<&clk IMX93_CLK_SAI2_GATE>, <&clk IMX93_CLK_DUMMY>,
<&clk IMX93_CLK_DUMMY>;
clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
- dmas = <&edma2 59 0 1>, <&edma2 58 0 0>;
+ dmas = <&edma2 59 0 FSL_EDMA_RX>, <&edma2 58 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
@@ -826,7 +827,7 @@ sai3: sai@42660000 {
<&clk IMX93_CLK_SAI3_GATE>, <&clk IMX93_CLK_DUMMY>,
<&clk IMX93_CLK_DUMMY>;
clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
- dmas = <&edma2 61 0 1>, <&edma2 60 0 0>;
+ dmas = <&edma2 61 0 FSL_EDMA_RX>, <&edma2 60 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
@@ -845,7 +846,7 @@ xcvr: xcvr@42680000 {
<&clk IMX93_CLK_DUMMY>,
<&clk IMX93_CLK_AUD_XCVR_GATE>;
clock-names = "ipg", "phy", "spba", "pll_ipg";
- dmas = <&edma2 65 0 1>, <&edma2 66 0 0>;
+ dmas = <&edma2 65 0 FSL_EDMA_RX>, <&edma2 66 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
@@ -856,7 +857,7 @@ lpuart7: serial@42690000 {
interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART7_GATE>;
clock-names = "ipg";
- dmas = <&edma2 88 0 1>, <&edma2 87 0 0>;
+ dmas = <&edma2 88 0 FSL_EDMA_RX>, <&edma2 87 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
@@ -867,7 +868,7 @@ lpuart8: serial@426a0000 {
interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX93_CLK_LPUART8_GATE>;
clock-names = "ipg";
- dmas = <&edma2 90 0 1>, <&edma2 89 0 0>;
+ dmas = <&edma2 90 0 FSL_EDMA_RX>, <&edma2 89 0 0>;
dma-names = "rx", "tx";
status = "disabled";
};
--
2.37.1
From: Peng Fan <[email protected]>
Add dma support for lpi2c[1..8].
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx93.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 42bbe491a29b..93c1d0fae291 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -317,6 +317,8 @@ lpi2c1: i2c@44340000 {
clocks = <&clk IMX93_CLK_LPI2C1_GATE>,
<&clk IMX93_CLK_BUS_AON>;
clock-names = "per", "ipg";
+ dmas = <&edma1 7 0 0>, <&edma1 8 0 FSL_EDMA_RX>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -329,6 +331,8 @@ lpi2c2: i2c@44350000 {
clocks = <&clk IMX93_CLK_LPI2C2_GATE>,
<&clk IMX93_CLK_BUS_AON>;
clock-names = "per", "ipg";
+ dmas = <&edma1 9 0 0>, <&edma1 10 0 FSL_EDMA_RX>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -693,6 +697,8 @@ lpi2c3: i2c@42530000 {
clocks = <&clk IMX93_CLK_LPI2C3_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
+ dmas = <&edma2 8 0 0>, <&edma2 9 0 FSL_EDMA_RX>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -705,6 +711,8 @@ lpi2c4: i2c@42540000 {
clocks = <&clk IMX93_CLK_LPI2C4_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
+ dmas = <&edma2 10 0 0>, <&edma2 11 0 FSL_EDMA_RX>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -882,6 +890,8 @@ lpi2c5: i2c@426b0000 {
clocks = <&clk IMX93_CLK_LPI2C5_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
+ dmas = <&edma2 71 0 0>, <&edma2 72 0 FSL_EDMA_RX>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -894,6 +904,8 @@ lpi2c6: i2c@426c0000 {
clocks = <&clk IMX93_CLK_LPI2C6_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
+ dmas = <&edma2 73 0 0>, <&edma2 74 0 FSL_EDMA_RX>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -906,6 +918,8 @@ lpi2c7: i2c@426d0000 {
clocks = <&clk IMX93_CLK_LPI2C7_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
+ dmas = <&edma2 75 0 0>, <&edma2 76 0 FSL_EDMA_RX>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -918,6 +932,8 @@ lpi2c8: i2c@426e0000 {
clocks = <&clk IMX93_CLK_LPI2C8_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
+ dmas = <&edma2 77 0 0>, <&edma2 78 0 FSL_EDMA_RX>;
+ dma-names = "tx", "rx";
status = "disabled";
};
--
2.37.1
From: Peng Fan <[email protected]>
Add dma support for lpspi[1..8]
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx93.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 93c1d0fae291..d762d96afcd5 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -345,6 +345,8 @@ lpspi1: spi@44360000 {
clocks = <&clk IMX93_CLK_LPSPI1_GATE>,
<&clk IMX93_CLK_BUS_AON>;
clock-names = "per", "ipg";
+ dmas = <&edma1 11 0 0>, <&edma1 12 0 FSL_EDMA_RX>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -357,6 +359,8 @@ lpspi2: spi@44370000 {
clocks = <&clk IMX93_CLK_LPSPI2_GATE>,
<&clk IMX93_CLK_BUS_AON>;
clock-names = "per", "ipg";
+ dmas = <&edma1 13 0 0>, <&edma1 14 0 FSL_EDMA_RX>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -725,6 +729,8 @@ lpspi3: spi@42550000 {
clocks = <&clk IMX93_CLK_LPSPI3_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
+ dmas = <&edma2 12 0 0>, <&edma2 13 0 FSL_EDMA_RX>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -737,6 +743,8 @@ lpspi4: spi@42560000 {
clocks = <&clk IMX93_CLK_LPSPI4_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
+ dmas = <&edma2 14 0 0>, <&edma2 15 0 FSL_EDMA_RX>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -946,6 +954,8 @@ lpspi5: spi@426f0000 {
clocks = <&clk IMX93_CLK_LPSPI5_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
+ dmas = <&edma2 79 0 0>, <&edma2 80 0 FSL_EDMA_RX>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -958,6 +968,8 @@ lpspi6: spi@42700000 {
clocks = <&clk IMX93_CLK_LPSPI6_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
+ dmas = <&edma2 81 0 0>, <&edma2 82 0 FSL_EDMA_RX>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -970,6 +982,8 @@ lpspi7: spi@42710000 {
clocks = <&clk IMX93_CLK_LPSPI7_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
+ dmas = <&edma2 83 0 0>, <&edma2 84 0 FSL_EDMA_RX>;
+ dma-names = "tx", "rx";
status = "disabled";
};
@@ -982,6 +996,8 @@ lpspi8: spi@42720000 {
clocks = <&clk IMX93_CLK_LPSPI8_GATE>,
<&clk IMX93_CLK_BUS_WAKEUP>;
clock-names = "per", "ipg";
+ dmas = <&edma2 85 0 0>, <&edma2 86 0 FSL_EDMA_RX>;
+ dma-names = "tx", "rx";
status = "disabled";
};
--
2.37.1
From: Haibo Chen <[email protected]>
1. Config SDHC1 clock 400MHz to support eMMC HS400ES mode
2. The original usdhc2 and usdhc3 root clock is 200MHz. Then WIFI
on usdhc3 at SDR104 mode can work under 200MHz. But if imx93 work
under Low Drive mode, the usdhc3 pad signal is not good under 200MHz,
SDR104 mode can't work stable. Need to downgrade to 133MHz to let
WIFI work stable. To cover all the cases, for Norminal Drive mode,
keep usdhc root at 400MHz, then card(SD/wifi) can work at SDR104 mode
under 200MHz to get the best performance. For Low Drive mode,
bootloader need override usdhc root clock to 266MHz, and the
card(SD/wifi) work at SDR104 mode under 133MHz, can work stable.
Reviewed-by: Sherry Sun <[email protected]>
Signed-off-by: Haibo Chen <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx93.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index d762d96afcd5..9a7cb59e2c7f 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -1018,6 +1018,9 @@ usdhc1: mmc@42850000 {
<&clk IMX93_CLK_WAKEUP_AXI>,
<&clk IMX93_CLK_USDHC1_GATE>;
clock-names = "ipg", "ahb", "per";
+ assigned-clocks = <&clk IMX93_CLK_USDHC1>;
+ assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
+ assigned-clock-rates = <400000000>;
bus-width = <8>;
fsl,tuning-start-tap = <1>;
fsl,tuning-step = <2>;
@@ -1032,6 +1035,9 @@ usdhc2: mmc@42860000 {
<&clk IMX93_CLK_WAKEUP_AXI>,
<&clk IMX93_CLK_USDHC2_GATE>;
clock-names = "ipg", "ahb", "per";
+ assigned-clocks = <&clk IMX93_CLK_USDHC2>;
+ assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
+ assigned-clock-rates = <400000000>;
bus-width = <4>;
fsl,tuning-start-tap = <1>;
fsl,tuning-step = <2>;
@@ -1095,6 +1101,9 @@ usdhc3: mmc@428b0000 {
<&clk IMX93_CLK_WAKEUP_AXI>,
<&clk IMX93_CLK_USDHC3_GATE>;
clock-names = "ipg", "ahb", "per";
+ assigned-clocks = <&clk IMX93_CLK_USDHC3>;
+ assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1>;
+ assigned-clock-rates = <400000000>;
bus-width = <4>;
fsl,tuning-start-tap = <1>;
fsl,tuning-step = <2>;
--
2.37.1
From: Peng Fan <[email protected]>
Add nvmem property for fec1 to get mac address.
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx93.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 9a7cb59e2c7f..04d0b1c2ce02 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -1068,6 +1068,8 @@ fec: ethernet@42890000 {
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
fsl,stop-mode = <&wakeupmix_gpr 0x0c 1>;
+ nvmem-cells = <ð_mac1>;
+ nvmem-cell-names = "mac-address";
status = "disabled";
};
@@ -1177,6 +1179,11 @@ ocotp: efuse@47510000 {
reg = <0x47510000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
+
+ eth_mac1: mac-address@4ec {
+ reg = <0x4ec 0x6>;
+ };
+
};
s4muap: mailbox@47520000 {
--
2.37.1
From: Peng Fan <[email protected]>
Add nvmem properties for eqos to get mac address.
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx93.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
index 04d0b1c2ce02..7aee43a8ae71 100644
--- a/arch/arm64/boot/dts/freescale/imx93.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
@@ -1092,6 +1092,8 @@ eqos: ethernet@428a0000 {
assigned-clock-rates = <100000000>, <250000000>;
intf_mode = <&wakeupmix_gpr 0x28>;
snps,clk-csr = <0>;
+ nvmem-cells = <ð_mac2>;
+ nvmem-cell-names = "mac-address";
status = "disabled";
};
@@ -1184,6 +1186,10 @@ eth_mac1: mac-address@4ec {
reg = <0x4ec 0x6>;
};
+ eth_mac2: mac-address@4f2 {
+ reg = <0x4f2 0x6>;
+ };
+
};
s4muap: mailbox@47520000 {
--
2.37.1
From: Peng Fan <[email protected]>
Update the resource table to avoid conflict because iMX93 ROM use last 4KB
TCM aream. Also correct vdev1vring node name to align with reg.
Fixes: e1da729459e6 ("arm64: dts: imx93: enable CM33 for 11x11 EVK")
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
index 07e85a30a25f..b7b52576586f 100644
--- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
@@ -38,7 +38,7 @@ vdev0vring1: vdev0vring1@a4008000 {
no-map;
};
- vdev1vring0: vdev1vring0@a4000000 {
+ vdev1vring0: vdev1vring0@a4010000 {
reg = <0 0xa4010000 0 0x8000>;
no-map;
};
@@ -48,8 +48,8 @@ vdev1vring1: vdev1vring1@a4018000 {
no-map;
};
- rsc_table: rsc-table@2021f000 {
- reg = <0 0x2021f000 0 0x1000>;
+ rsc_table: rsc-table@2021e000 {
+ reg = <0 0x2021e000 0 0x1000>;
no-map;
};
--
2.37.1
From: Peng Fan <[email protected]>
Add sleep pinctrl settings for EQoS and FEC to save power when suspend.
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts | 44 +++++++++++++++++++++--
1 file changed, 42 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
index b7b52576586f..2b67724db685 100644
--- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
@@ -105,8 +105,9 @@ &mu2 {
};
&eqos {
- pinctrl-names = "default";
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_eqos>;
+ pinctrl-1 = <&pinctrl_eqos_sleep>;
phy-mode = "rgmii-id";
phy-handle = <ðphy1>;
status = "okay";
@@ -125,8 +126,9 @@ ethphy1: ethernet-phy@1 {
};
&fec {
- pinctrl-names = "default";
+ pinctrl-names = "default", "sleep";
pinctrl-0 = <&pinctrl_fec>;
+ pinctrl-1 = <&pinctrl_fec_sleep>;
phy-mode = "rgmii-id";
phy-handle = <ðphy2>;
fsl,magic-packet;
@@ -301,6 +303,25 @@ MX93_PAD_ENET1_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x57e
>;
};
+ pinctrl_eqos_sleep: eqossleepgrp {
+ fsl,pins = <
+ MX93_PAD_ENET1_MDC__GPIO4_IO00 0x31e
+ MX93_PAD_ENET1_MDIO__GPIO4_IO01 0x31e
+ MX93_PAD_ENET1_RD0__GPIO4_IO10 0x31e
+ MX93_PAD_ENET1_RD1__GPIO4_IO11 0x31e
+ MX93_PAD_ENET1_RD2__GPIO4_IO12 0x31e
+ MX93_PAD_ENET1_RD3__GPIO4_IO13 0x31e
+ MX93_PAD_ENET1_RXC__GPIO4_IO09 0x31e
+ MX93_PAD_ENET1_RX_CTL__GPIO4_IO08 0x31e
+ MX93_PAD_ENET1_TD0__GPIO4_IO05 0x31e
+ MX93_PAD_ENET1_TD1__GPIO4_IO04 0x31e
+ MX93_PAD_ENET1_TD2__GPIO4_IO03 0x31e
+ MX93_PAD_ENET1_TD3__GPIO4_IO02 0x31e
+ MX93_PAD_ENET1_TXC__GPIO4_IO07 0x31e
+ MX93_PAD_ENET1_TX_CTL__GPIO4_IO06 0x31e
+ >;
+ };
+
pinctrl_fec: fecgrp {
fsl,pins = <
MX93_PAD_ENET2_MDC__ENET1_MDC 0x57e
@@ -320,6 +341,25 @@ MX93_PAD_ENET2_TX_CTL__ENET1_RGMII_TX_CTL 0x57e
>;
};
+ pinctrl_fec_sleep: fecsleepgrp {
+ fsl,pins = <
+ MX93_PAD_ENET2_MDC__GPIO4_IO14 0x51e
+ MX93_PAD_ENET2_MDIO__GPIO4_IO15 0x51e
+ MX93_PAD_ENET2_RD0__GPIO4_IO24 0x51e
+ MX93_PAD_ENET2_RD1__GPIO4_IO25 0x51e
+ MX93_PAD_ENET2_RD2__GPIO4_IO26 0x51e
+ MX93_PAD_ENET2_RD3__GPIO4_IO27 0x51e
+ MX93_PAD_ENET2_RXC__GPIO4_IO23 0x51e
+ MX93_PAD_ENET2_RX_CTL__GPIO4_IO22 0x51e
+ MX93_PAD_ENET2_TD0__GPIO4_IO19 0x51e
+ MX93_PAD_ENET2_TD1__GPIO4_IO18 0x51e
+ MX93_PAD_ENET2_TD2__GPIO4_IO17 0x51e
+ MX93_PAD_ENET2_TD3__GPIO4_IO16 0x51e
+ MX93_PAD_ENET2_TXC__GPIO4_IO21 0x51e
+ MX93_PAD_ENET2_TX_CTL__GPIO4_IO20 0x51e
+ >;
+ };
+
pinctrl_uart1: uart1grp {
fsl,pins = <
MX93_PAD_UART1_RXD__LPUART1_RX 0x31e
--
2.37.1
From: Luke Wang <[email protected]>
imx93-11x11-evk dts use the strongest driver strength for
default(high-speed), 100MHz(SDR50/DDR50/DDR52) and
200MHz(SDR104/HS200/HS400) timing. To make usdhc working appropriately for
each timing, add X1 drive strength to default timing and X3 drive
strength to 100MHz timing.
Reviewed-by: Haibo Chen <[email protected]>
Signed-off-by: Luke Wang <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts | 68 +++++++++++++++++++++--
1 file changed, 64 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
index 2b67724db685..f848cb0922ef 100644
--- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
@@ -161,8 +161,8 @@ &lpuart5 {
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>;
- pinctrl-1 = <&pinctrl_usdhc1>;
- pinctrl-2 = <&pinctrl_usdhc1>;
+ pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
+ pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
bus-width = <8>;
non-removable;
status = "okay";
@@ -171,8 +171,8 @@ &usdhc1 {
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
- pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
- pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
vmmc-supply = <®_usdhc2_vmmc>;
bus-width = <4>;
@@ -391,6 +391,40 @@ MX93_PAD_CCM_CLKO2__GPIO3_IO27 0x31e
/* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc1: usdhc1grp {
+ fsl,pins = <
+ MX93_PAD_SD1_CLK__USDHC1_CLK 0x1582
+ MX93_PAD_SD1_CMD__USDHC1_CMD 0x40001382
+ MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x40001382
+ MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x40001382
+ MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x40001382
+ MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x40001382
+ MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x40001382
+ MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x40001382
+ MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x40001382
+ MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x40001382
+ MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x1582
+ >;
+ };
+
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
+ pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
+ fsl,pins = <
+ MX93_PAD_SD1_CLK__USDHC1_CLK 0x158e
+ MX93_PAD_SD1_CMD__USDHC1_CMD 0x4000138e
+ MX93_PAD_SD1_DATA0__USDHC1_DATA0 0x4000138e
+ MX93_PAD_SD1_DATA1__USDHC1_DATA1 0x4000138e
+ MX93_PAD_SD1_DATA2__USDHC1_DATA2 0x4000138e
+ MX93_PAD_SD1_DATA3__USDHC1_DATA3 0x4000138e
+ MX93_PAD_SD1_DATA4__USDHC1_DATA4 0x4000138e
+ MX93_PAD_SD1_DATA5__USDHC1_DATA5 0x4000138e
+ MX93_PAD_SD1_DATA6__USDHC1_DATA6 0x4000138e
+ MX93_PAD_SD1_DATA7__USDHC1_DATA7 0x4000138e
+ MX93_PAD_SD1_STROBE__USDHC1_STROBE 0x158e
+ >;
+ };
+
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
+ pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
fsl,pins = <
MX93_PAD_SD1_CLK__USDHC1_CLK 0x15fe
MX93_PAD_SD1_CMD__USDHC1_CMD 0x400013fe
@@ -420,6 +454,32 @@ MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
/* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc2: usdhc2grp {
+ fsl,pins = <
+ MX93_PAD_SD2_CLK__USDHC2_CLK 0x1582
+ MX93_PAD_SD2_CMD__USDHC2_CMD 0x40001382
+ MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x40001382
+ MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x40001382
+ MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x40001382
+ MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x40001382
+ MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
+ >;
+ };
+
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
+ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
+ fsl,pins = <
+ MX93_PAD_SD2_CLK__USDHC2_CLK 0x158e
+ MX93_PAD_SD2_CMD__USDHC2_CMD 0x4000138e
+ MX93_PAD_SD2_DATA0__USDHC2_DATA0 0x4000138e
+ MX93_PAD_SD2_DATA1__USDHC2_DATA1 0x4000138e
+ MX93_PAD_SD2_DATA2__USDHC2_DATA2 0x4000138e
+ MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x4000138e
+ MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
+ >;
+ };
+
+ /* need to config the SION for data and cmd pad, refer to ERR052021 */
+ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
fsl,pins = <
MX93_PAD_SD2_CLK__USDHC2_CLK 0x15fe
MX93_PAD_SD2_CMD__USDHC2_CMD 0x400013fe
--
2.37.1
From: Peng Fan <[email protected]>
Add sleep pinctrl for SDHC2 for suspend usage.
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts | 22 +++++++++++++++++++++-
1 file changed, 21 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
index f848cb0922ef..b29d470d2492 100644
--- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
@@ -169,10 +169,11 @@ &usdhc1 {
};
&usdhc2 {
- pinctrl-names = "default", "state_100mhz", "state_200mhz";
+ pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+ pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_gpio_sleep>;
cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
vmmc-supply = <®_usdhc2_vmmc>;
bus-width = <4>;
@@ -452,6 +453,12 @@ MX93_PAD_SD2_CD_B__GPIO3_IO00 0x31e
>;
};
+ pinctrl_usdhc2_gpio_sleep: usdhc2gpiosleepgrp {
+ fsl,pins = <
+ MX93_PAD_SD2_CD_B__GPIO3_IO00 0x51e
+ >;
+ };
+
/* need to config the SION for data and cmd pad, refer to ERR052021 */
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
@@ -490,4 +497,17 @@ MX93_PAD_SD2_DATA3__USDHC2_DATA3 0x400013fe
MX93_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e
>;
};
+
+ pinctrl_usdhc2_sleep: usdhc2sleepgrp {
+ fsl,pins = <
+ MX93_PAD_SD2_CLK__GPIO3_IO01 0x51e
+ MX93_PAD_SD2_CMD__GPIO3_IO02 0x51e
+ MX93_PAD_SD2_DATA0__GPIO3_IO03 0x51e
+ MX93_PAD_SD2_DATA1__GPIO3_IO04 0x51e
+ MX93_PAD_SD2_DATA2__GPIO3_IO05 0x51e
+ MX93_PAD_SD2_DATA3__GPIO3_IO06 0x51e
+ MX93_PAD_SD2_VSELECT__GPIO3_IO19 0x51e
+ >;
+ };
+
};
--
2.37.1
From: Wei Fang <[email protected]>
Both the PHYs of the EQOS interface and the FEC interface are supported
to be reset by I2C GPIO Expender. So add the support to reset PHYs.
Signed-off-by: Wei Fang <[email protected]>
Reviewed-by: Clark Wang <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
index b29d470d2492..44ae985945ad 100644
--- a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
@@ -121,6 +121,9 @@ mdio {
ethphy1: ethernet-phy@1 {
reg = <1>;
eee-broken-1000t;
+ reset-gpios = <&pcal6524 15 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <80000>;
};
};
};
@@ -142,6 +145,9 @@ mdio {
ethphy2: ethernet-phy@2 {
reg = <2>;
eee-broken-1000t;
+ reset-gpios = <&pcal6524 16 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <80000>;
};
};
};
--
2.37.1
From: Peng Fan <[email protected]>
The FEC network driver is built in, with OCOTP ELE built as module,
the FEC drive will defer probe because nvmem provider not ready and
nfsboot not work. So build in OCOTP ELE driver.
Signed-off-by: Peng Fan <[email protected]>
---
arch/arm64/configs/defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 9957e126e32d..b9f0805abeef 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -1553,7 +1553,7 @@ CONFIG_ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU=m
CONFIG_MESON_DDR_PMU=m
CONFIG_NVMEM_LAYOUT_SL28_VPD=m
CONFIG_NVMEM_IMX_OCOTP=y
-CONFIG_NVMEM_IMX_OCOTP_ELE=m
+CONFIG_NVMEM_IMX_OCOTP_ELE=y
CONFIG_NVMEM_IMX_OCOTP_SCU=y
CONFIG_NVMEM_LAYERSCAPE_SFP=m
CONFIG_NVMEM_MESON_EFUSE=m
--
2.37.1
On 19/04/2024 05:37, Peng Fan (OSS) wrote:
> From: Peng Fan <[email protected]>
>
> The FEC network driver is built in, with OCOTP ELE built as module,
> the FEC drive will defer probe because nvmem provider not ready and
> nfsboot not work. So build in OCOTP ELE driver.
That's not an explanation. FEC can defer and probe immediately, that's
not a problem. Just use ramdisk.
No, this stays as module. Fix your system instead.
Best regards,
Krzysztof
On Fri, Apr 19, 2024 at 11:36:56AM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <[email protected]>
>
> Use FSL_EDMA_RX for dma rx channel bitmask, which is intuitive.
>
> Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Frank Li <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx93.dtsi | 25 +++++++++++++------------
> 1 file changed, 13 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
> index b8ef9b938856..42bbe491a29b 100644
> --- a/arch/arm64/boot/dts/freescale/imx93.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
> @@ -4,6 +4,7 @@
> */
>
> #include <dt-bindings/clock/imx93-clock.h>
> +#include <dt-bindings/dma/fsl-edma.h>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/input/input.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> @@ -361,7 +362,7 @@ lpuart1: serial@44380000 {
> interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clk IMX93_CLK_LPUART1_GATE>;
> clock-names = "ipg";
> - dmas = <&edma1 17 0 1>, <&edma1 16 0 0>;
> + dmas = <&edma1 17 0 FSL_EDMA_RX>, <&edma1 16 0 0>;
> dma-names = "rx", "tx";
> status = "disabled";
> };
> @@ -372,7 +373,7 @@ lpuart2: serial@44390000 {
> interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clk IMX93_CLK_LPUART2_GATE>;
> clock-names = "ipg";
> - dmas = <&edma1 19 0 1>, <&edma1 18 0 0>;
> + dmas = <&edma1 19 0 FSL_EDMA_RX>, <&edma1 18 0 0>;
> dma-names = "rx", "tx";
> status = "disabled";
> };
> @@ -400,7 +401,7 @@ sai1: sai@443b0000 {
> <&clk IMX93_CLK_SAI1_GATE>, <&clk IMX93_CLK_DUMMY>,
> <&clk IMX93_CLK_DUMMY>;
> clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
> - dmas = <&edma1 22 0 1>, <&edma1 21 0 0>;
> + dmas = <&edma1 22 0 FSL_EDMA_RX>, <&edma1 21 0 0>;
> dma-names = "rx", "tx";
> status = "disabled";
> };
> @@ -737,7 +738,7 @@ lpuart3: serial@42570000 {
> interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clk IMX93_CLK_LPUART3_GATE>;
> clock-names = "ipg";
> - dmas = <&edma2 18 0 1>, <&edma2 17 0 0>;
> + dmas = <&edma2 18 0 FSL_EDMA_RX>, <&edma2 17 0 0>;
> dma-names = "rx", "tx";
> status = "disabled";
> };
> @@ -748,7 +749,7 @@ lpuart4: serial@42580000 {
> interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clk IMX93_CLK_LPUART4_GATE>;
> clock-names = "ipg";
> - dmas = <&edma2 20 0 1>, <&edma2 19 0 0>;
> + dmas = <&edma2 20 0 FSL_EDMA_RX>, <&edma2 19 0 0>;
> dma-names = "rx", "tx";
> status = "disabled";
> };
> @@ -759,7 +760,7 @@ lpuart5: serial@42590000 {
> interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clk IMX93_CLK_LPUART5_GATE>;
> clock-names = "ipg";
> - dmas = <&edma2 22 0 1>, <&edma2 21 0 0>;
> + dmas = <&edma2 22 0 FSL_EDMA_RX>, <&edma2 21 0 0>;
> dma-names = "rx", "tx";
> status = "disabled";
> };
> @@ -770,7 +771,7 @@ lpuart6: serial@425a0000 {
> interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clk IMX93_CLK_LPUART6_GATE>;
> clock-names = "ipg";
> - dmas = <&edma2 24 0 1>, <&edma2 23 0 0>;
> + dmas = <&edma2 24 0 FSL_EDMA_RX>, <&edma2 23 0 0>;
> dma-names = "rx", "tx";
> status = "disabled";
> };
> @@ -813,7 +814,7 @@ sai2: sai@42650000 {
> <&clk IMX93_CLK_SAI2_GATE>, <&clk IMX93_CLK_DUMMY>,
> <&clk IMX93_CLK_DUMMY>;
> clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
> - dmas = <&edma2 59 0 1>, <&edma2 58 0 0>;
> + dmas = <&edma2 59 0 FSL_EDMA_RX>, <&edma2 58 0 0>;
> dma-names = "rx", "tx";
> status = "disabled";
> };
> @@ -826,7 +827,7 @@ sai3: sai@42660000 {
> <&clk IMX93_CLK_SAI3_GATE>, <&clk IMX93_CLK_DUMMY>,
> <&clk IMX93_CLK_DUMMY>;
> clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
> - dmas = <&edma2 61 0 1>, <&edma2 60 0 0>;
> + dmas = <&edma2 61 0 FSL_EDMA_RX>, <&edma2 60 0 0>;
> dma-names = "rx", "tx";
> status = "disabled";
> };
> @@ -845,7 +846,7 @@ xcvr: xcvr@42680000 {
> <&clk IMX93_CLK_DUMMY>,
> <&clk IMX93_CLK_AUD_XCVR_GATE>;
> clock-names = "ipg", "phy", "spba", "pll_ipg";
> - dmas = <&edma2 65 0 1>, <&edma2 66 0 0>;
> + dmas = <&edma2 65 0 FSL_EDMA_RX>, <&edma2 66 0 0>;
> dma-names = "rx", "tx";
> status = "disabled";
> };
> @@ -856,7 +857,7 @@ lpuart7: serial@42690000 {
> interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clk IMX93_CLK_LPUART7_GATE>;
> clock-names = "ipg";
> - dmas = <&edma2 88 0 1>, <&edma2 87 0 0>;
> + dmas = <&edma2 88 0 FSL_EDMA_RX>, <&edma2 87 0 0>;
> dma-names = "rx", "tx";
> status = "disabled";
> };
> @@ -867,7 +868,7 @@ lpuart8: serial@426a0000 {
> interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&clk IMX93_CLK_LPUART8_GATE>;
> clock-names = "ipg";
> - dmas = <&edma2 90 0 1>, <&edma2 89 0 0>;
> + dmas = <&edma2 90 0 FSL_EDMA_RX>, <&edma2 89 0 0>;
> dma-names = "rx", "tx";
> status = "disabled";
> };
>
> --
> 2.37.1
>
On Fri, Apr 19, 2024 at 11:36:57AM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <[email protected]>
>
> Add dma support for lpi2c[1..8].
>
> Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Frank Li <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx93.dtsi | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
> index 42bbe491a29b..93c1d0fae291 100644
> --- a/arch/arm64/boot/dts/freescale/imx93.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
> @@ -317,6 +317,8 @@ lpi2c1: i2c@44340000 {
> clocks = <&clk IMX93_CLK_LPI2C1_GATE>,
> <&clk IMX93_CLK_BUS_AON>;
> clock-names = "per", "ipg";
> + dmas = <&edma1 7 0 0>, <&edma1 8 0 FSL_EDMA_RX>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
> @@ -329,6 +331,8 @@ lpi2c2: i2c@44350000 {
> clocks = <&clk IMX93_CLK_LPI2C2_GATE>,
> <&clk IMX93_CLK_BUS_AON>;
> clock-names = "per", "ipg";
> + dmas = <&edma1 9 0 0>, <&edma1 10 0 FSL_EDMA_RX>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
> @@ -693,6 +697,8 @@ lpi2c3: i2c@42530000 {
> clocks = <&clk IMX93_CLK_LPI2C3_GATE>,
> <&clk IMX93_CLK_BUS_WAKEUP>;
> clock-names = "per", "ipg";
> + dmas = <&edma2 8 0 0>, <&edma2 9 0 FSL_EDMA_RX>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
> @@ -705,6 +711,8 @@ lpi2c4: i2c@42540000 {
> clocks = <&clk IMX93_CLK_LPI2C4_GATE>,
> <&clk IMX93_CLK_BUS_WAKEUP>;
> clock-names = "per", "ipg";
> + dmas = <&edma2 10 0 0>, <&edma2 11 0 FSL_EDMA_RX>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
> @@ -882,6 +890,8 @@ lpi2c5: i2c@426b0000 {
> clocks = <&clk IMX93_CLK_LPI2C5_GATE>,
> <&clk IMX93_CLK_BUS_WAKEUP>;
> clock-names = "per", "ipg";
> + dmas = <&edma2 71 0 0>, <&edma2 72 0 FSL_EDMA_RX>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
> @@ -894,6 +904,8 @@ lpi2c6: i2c@426c0000 {
> clocks = <&clk IMX93_CLK_LPI2C6_GATE>,
> <&clk IMX93_CLK_BUS_WAKEUP>;
> clock-names = "per", "ipg";
> + dmas = <&edma2 73 0 0>, <&edma2 74 0 FSL_EDMA_RX>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
> @@ -906,6 +918,8 @@ lpi2c7: i2c@426d0000 {
> clocks = <&clk IMX93_CLK_LPI2C7_GATE>,
> <&clk IMX93_CLK_BUS_WAKEUP>;
> clock-names = "per", "ipg";
> + dmas = <&edma2 75 0 0>, <&edma2 76 0 FSL_EDMA_RX>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
> @@ -918,6 +932,8 @@ lpi2c8: i2c@426e0000 {
> clocks = <&clk IMX93_CLK_LPI2C8_GATE>,
> <&clk IMX93_CLK_BUS_WAKEUP>;
> clock-names = "per", "ipg";
> + dmas = <&edma2 77 0 0>, <&edma2 78 0 FSL_EDMA_RX>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
>
> --
> 2.37.1
>
On Fri, Apr 19, 2024 at 11:36:58AM +0800, Peng Fan (OSS) wrote:
> From: Peng Fan <[email protected]>
>
> Add dma support for lpspi[1..8]
>
> Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Frank Li <[email protected]>
> ---
> arch/arm64/boot/dts/freescale/imx93.dtsi | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi
> index 93c1d0fae291..d762d96afcd5 100644
> --- a/arch/arm64/boot/dts/freescale/imx93.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi
> @@ -345,6 +345,8 @@ lpspi1: spi@44360000 {
> clocks = <&clk IMX93_CLK_LPSPI1_GATE>,
> <&clk IMX93_CLK_BUS_AON>;
> clock-names = "per", "ipg";
> + dmas = <&edma1 11 0 0>, <&edma1 12 0 FSL_EDMA_RX>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
> @@ -357,6 +359,8 @@ lpspi2: spi@44370000 {
> clocks = <&clk IMX93_CLK_LPSPI2_GATE>,
> <&clk IMX93_CLK_BUS_AON>;
> clock-names = "per", "ipg";
> + dmas = <&edma1 13 0 0>, <&edma1 14 0 FSL_EDMA_RX>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
> @@ -725,6 +729,8 @@ lpspi3: spi@42550000 {
> clocks = <&clk IMX93_CLK_LPSPI3_GATE>,
> <&clk IMX93_CLK_BUS_WAKEUP>;
> clock-names = "per", "ipg";
> + dmas = <&edma2 12 0 0>, <&edma2 13 0 FSL_EDMA_RX>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
> @@ -737,6 +743,8 @@ lpspi4: spi@42560000 {
> clocks = <&clk IMX93_CLK_LPSPI4_GATE>,
> <&clk IMX93_CLK_BUS_WAKEUP>;
> clock-names = "per", "ipg";
> + dmas = <&edma2 14 0 0>, <&edma2 15 0 FSL_EDMA_RX>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
> @@ -946,6 +954,8 @@ lpspi5: spi@426f0000 {
> clocks = <&clk IMX93_CLK_LPSPI5_GATE>,
> <&clk IMX93_CLK_BUS_WAKEUP>;
> clock-names = "per", "ipg";
> + dmas = <&edma2 79 0 0>, <&edma2 80 0 FSL_EDMA_RX>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
> @@ -958,6 +968,8 @@ lpspi6: spi@42700000 {
> clocks = <&clk IMX93_CLK_LPSPI6_GATE>,
> <&clk IMX93_CLK_BUS_WAKEUP>;
> clock-names = "per", "ipg";
> + dmas = <&edma2 81 0 0>, <&edma2 82 0 FSL_EDMA_RX>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
> @@ -970,6 +982,8 @@ lpspi7: spi@42710000 {
> clocks = <&clk IMX93_CLK_LPSPI7_GATE>,
> <&clk IMX93_CLK_BUS_WAKEUP>;
> clock-names = "per", "ipg";
> + dmas = <&edma2 83 0 0>, <&edma2 84 0 FSL_EDMA_RX>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
> @@ -982,6 +996,8 @@ lpspi8: spi@42720000 {
> clocks = <&clk IMX93_CLK_LPSPI8_GATE>,
> <&clk IMX93_CLK_BUS_WAKEUP>;
> clock-names = "per", "ipg";
> + dmas = <&edma2 85 0 0>, <&edma2 86 0 FSL_EDMA_RX>;
> + dma-names = "tx", "rx";
> status = "disabled";
> };
>
>
> --
> 2.37.1
>
> Subject: Re: [PATCH v2 12/12] arm64: defconfig: build in OCOTP ELE
>
> On 19/04/2024 05:37, Peng Fan (OSS) wrote:
> > From: Peng Fan <[email protected]>
> >
> > The FEC network driver is built in, with OCOTP ELE built as module,
> > the FEC drive will defer probe because nvmem provider not ready and
> > nfsboot not work. So build in OCOTP ELE driver.
>
> That's not an explanation. FEC can defer and probe immediately, that's not a
> problem. Just use ramdisk.
no problem, let's drop this patch.
Thanks,
Peng.
>
>
> No, this stays as module. Fix your system instead.
>
>
> Best regards,
> Krzysztof
Hi Shawn,
> Subject: [PATCH v2 00/12] arm64: dts: imx93: various update
Sorry for early asking. Do you need me to resend v2 if just dropping
patch 12?
Thanks,
Peng.
>
> This patchset has several updates in imx93 dtsi and imx93-11x11-evk dts
> - add dma for lpspi/lpi2c
> - add nvmem for fec/eqos
> - update sdhc assigned clocks
> - update resource table for m33
> - add sleep pinctrl
> - add reset gpios for network phys
> - includes a defconfig patch to build in OCOTP ELE.
>
> Signed-off-by: Peng Fan <[email protected]>
> ---
> Changes in v2:
> - Add new patch 1 to convert dma bit mask to FSL_EDMA_RX
> - Use FSL_EDMA_RX for patch 2,3
> - Update commit log for patch 7. Add Fixes tag for patch 7.
> - Link to v1: https://lore.kernel.org/r/20240416-imx93-dts-4-13-v1-0-
> [email protected]
>
> ---
> Haibo Chen (1):
> arm64: dts: imx93: assign usdhc[1..3] root clock to 400MHz
>
> Luke Wang (1):
> arm64: dts: imx93-11x11-evk: add different usdhc pinctrl for different
> timing usage
>
> Peng Fan (9):
> arm64: dts: imx93: use FSL_EDMA_RX for rx channel
> arm64: dts: imx93: add dma support for lpi2c[1..8]
> arm64: dts: imx93: add dma support for lpspi[1..8]
> arm64: dts: imx93: add nvmem property for fec1
> arm64: dts: imx93: add nvmem property for eqos
> arm64: dts: imx93-11x11-evk: update resource table address
> arm64: dts: imx93-11x11-evk: add sleep pinctrl for eqos and fec
> arm64: dts: imx93-11x11-evk: add sleep pinctrl for sdhc2
> arm64: defconfig: build in OCOTP ELE
>
> Wei Fang (1):
> arm64: dts: imx93-11x11-evk: add reset gpios for ethernet PHYs
>
> arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts | 146
> ++++++++++++++++++++--
> arch/arm64/boot/dts/freescale/imx93.dtsi | 79 ++++++++++--
> arch/arm64/configs/defconfig | 2 +-
> 3 files changed, 204 insertions(+), 23 deletions(-)
> ---
> base-commit: 9ed46da14b9b9b2ad4edb3b0c545b6dbe5c00d39
> change-id: 20240413-imx93-dts-4-13-60d93c9f1cb2
>
> Best regards,
> --
> Peng Fan <[email protected]>
On Fri, Apr 19, 2024 at 11:36:55AM +0800, Peng Fan (OSS) wrote:
> This patchset has several updates in imx93 dtsi and imx93-11x11-evk dts
> - add dma for lpspi/lpi2c
> - add nvmem for fec/eqos
> - update sdhc assigned clocks
> - update resource table for m33
> - add sleep pinctrl
> - add reset gpios for network phys
> - includes a defconfig patch to build in OCOTP ELE.
>
> Signed-off-by: Peng Fan <[email protected]>
> ---
> Changes in v2:
> - Add new patch 1 to convert dma bit mask to FSL_EDMA_RX
> - Use FSL_EDMA_RX for patch 2,3
> - Update commit log for patch 7. Add Fixes tag for patch 7.
> - Link to v1: https://lore.kernel.org/r/[email protected]
>
> ---
> Haibo Chen (1):
> arm64: dts: imx93: assign usdhc[1..3] root clock to 400MHz
>
> Luke Wang (1):
> arm64: dts: imx93-11x11-evk: add different usdhc pinctrl for different timing usage
>
> Peng Fan (9):
> arm64: dts: imx93: use FSL_EDMA_RX for rx channel
> arm64: dts: imx93: add dma support for lpi2c[1..8]
> arm64: dts: imx93: add dma support for lpspi[1..8]
> arm64: dts: imx93: add nvmem property for fec1
> arm64: dts: imx93: add nvmem property for eqos
> arm64: dts: imx93-11x11-evk: update resource table address
> arm64: dts: imx93-11x11-evk: add sleep pinctrl for eqos and fec
> arm64: dts: imx93-11x11-evk: add sleep pinctrl for sdhc2
> arm64: defconfig: build in OCOTP ELE
>
> Wei Fang (1):
> arm64: dts: imx93-11x11-evk: add reset gpios for ethernet PHYs
Applied all, except the defconfig one.