Fix left shift overflow issue when the parameter idx is greater than or
equal to 8 in the calculation of perm in PIRx_ELx_PERM macro.
Fix this by modifying the encoding to use a long integer type.
Signed-off-by: Shiqi Liu <[email protected]>
---
arch/arm64/include/asm/sysreg.h | 24 ++++++++++++------------
tools/arch/arm64/include/asm/sysreg.h | 24 ++++++++++++------------
2 files changed, 24 insertions(+), 24 deletions(-)
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 9e8999592f3a..af3b206fa423 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -1036,18 +1036,18 @@
* Permission Indirection Extension (PIE) permission encodings.
* Encodings with the _O suffix, have overlays applied (Permission Overlay Extension).
*/
-#define PIE_NONE_O 0x0
-#define PIE_R_O 0x1
-#define PIE_X_O 0x2
-#define PIE_RX_O 0x3
-#define PIE_RW_O 0x5
-#define PIE_RWnX_O 0x6
-#define PIE_RWX_O 0x7
-#define PIE_R 0x8
-#define PIE_GCS 0x9
-#define PIE_RX 0xa
-#define PIE_RW 0xc
-#define PIE_RWX 0xe
+#define PIE_NONE_O UL(0x0)
+#define PIE_R_O UL(0x1)
+#define PIE_X_O UL(0x2)
+#define PIE_RX_O UL(0x3)
+#define PIE_RW_O UL(0x5)
+#define PIE_RWnX_O UL(0x6)
+#define PIE_RWX_O UL(0x7)
+#define PIE_R UL(0x8)
+#define PIE_GCS UL(0x9)
+#define PIE_RX UL(0xa)
+#define PIE_RW UL(0xc)
+#define PIE_RWX UL(0xe)
#define PIRx_ELx_PERM(idx, perm) ((perm) << ((idx) * 4))
diff --git a/tools/arch/arm64/include/asm/sysreg.h b/tools/arch/arm64/include/asm/sysreg.h
index ccc13e991376..cd8420e8c3ad 100644
--- a/tools/arch/arm64/include/asm/sysreg.h
+++ b/tools/arch/arm64/include/asm/sysreg.h
@@ -701,18 +701,18 @@
* Permission Indirection Extension (PIE) permission encodings.
* Encodings with the _O suffix, have overlays applied (Permission Overlay Extension).
*/
-#define PIE_NONE_O 0x0
-#define PIE_R_O 0x1
-#define PIE_X_O 0x2
-#define PIE_RX_O 0x3
-#define PIE_RW_O 0x5
-#define PIE_RWnX_O 0x6
-#define PIE_RWX_O 0x7
-#define PIE_R 0x8
-#define PIE_GCS 0x9
-#define PIE_RX 0xa
-#define PIE_RW 0xc
-#define PIE_RWX 0xe
+#define PIE_NONE_O UL(0x0)
+#define PIE_R_O UL(0x1)
+#define PIE_X_O UL(0x2)
+#define PIE_RX_O UL(0x3)
+#define PIE_RW_O UL(0x5)
+#define PIE_RWnX_O UL(0x6)
+#define PIE_RWX_O UL(0x7)
+#define PIE_R UL(0x8)
+#define PIE_GCS UL(0x9)
+#define PIE_RX UL(0xa)
+#define PIE_RW UL(0xc)
+#define PIE_RWX UL(0xe)
#define PIRx_ELx_PERM(idx, perm) ((perm) << ((idx) * 4))
--
2.34.1
On Sun, 21 Apr 2024 07:33:28 +0100,
Shiqi Liu <[email protected]> wrote:
>
> Fix left shift overflow issue when the parameter idx is greater than or
> equal to 8 in the calculation of perm in PIRx_ELx_PERM macro.
>
> Fix this by modifying the encoding to use a long integer type.
>
> Signed-off-by: Shiqi Liu <[email protected]>
Nice catch.
Acked-by: Marc Zyngier <[email protected]>
M.
--
Without deviation from the norm, progress is not possible.
On Sun, Apr 21, 2024 at 02:33:28PM +0800, Shiqi Liu wrote:
> Fix left shift overflow issue when the parameter idx is greater than or
> equal to 8 in the calculation of perm in PIRx_ELx_PERM macro.
>
> Fix this by modifying the encoding to use a long integer type.
>
> Signed-off-by: Shiqi Liu <[email protected]>
> ---
> arch/arm64/include/asm/sysreg.h | 24 ++++++++++++------------
> tools/arch/arm64/include/asm/sysreg.h | 24 ++++++++++++------------
> 2 files changed, 24 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
> index 9e8999592f3a..af3b206fa423 100644
> --- a/arch/arm64/include/asm/sysreg.h
> +++ b/arch/arm64/include/asm/sysreg.h
> @@ -1036,18 +1036,18 @@
> * Permission Indirection Extension (PIE) permission encodings.
> * Encodings with the _O suffix, have overlays applied (Permission Overlay Extension).
> */
> -#define PIE_NONE_O 0x0
> -#define PIE_R_O 0x1
> -#define PIE_X_O 0x2
> -#define PIE_RX_O 0x3
> -#define PIE_RW_O 0x5
> -#define PIE_RWnX_O 0x6
> -#define PIE_RWX_O 0x7
> -#define PIE_R 0x8
> -#define PIE_GCS 0x9
> -#define PIE_RX 0xa
> -#define PIE_RW 0xc
> -#define PIE_RWX 0xe
> +#define PIE_NONE_O UL(0x0)
> +#define PIE_R_O UL(0x1)
> +#define PIE_X_O UL(0x2)
> +#define PIE_RX_O UL(0x3)
> +#define PIE_RW_O UL(0x5)
> +#define PIE_RWnX_O UL(0x6)
> +#define PIE_RWX_O UL(0x7)
> +#define PIE_R UL(0x8)
> +#define PIE_GCS UL(0x9)
> +#define PIE_RX UL(0xa)
> +#define PIE_RW UL(0xc)
> +#define PIE_RWX UL(0xe)
>
> #define PIRx_ELx_PERM(idx, perm) ((perm) << ((idx) * 4))
Thanks. That's indeed the better way to write these constants, they also
match the POE_* macros further down in this file.
Currently nothing is broken since the PIE_E0 and PIE_E1 macros are only
used in assembly where the UL() doesn't have any effect but we may
change it in the future. I'll leave it with Will to pick up.
Reviewed-by: Catalin Marinas <[email protected]>
On Sun, 21 Apr 2024 14:33:28 +0800, Shiqi Liu wrote:
> Fix left shift overflow issue when the parameter idx is greater than or
> equal to 8 in the calculation of perm in PIRx_ELx_PERM macro.
>
> Fix this by modifying the encoding to use a long integer type.
>
>
Applied to arm64 (for-next/misc), thanks!
[1/1] arm64/sysreg: Update PIE permission encodings
https://git.kernel.org/arm64/c/12d712dc8e4f
Cheers,
--
Will
https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev