Both QCP and CRD boards using X Elite (x1e80100) make use of 3 USB
Type-C ports (USB1 SS0, SS1, and SS2). Describe the graph for the USB
part of each one of them for now. The DP port will come at a later stage
since there are some muxes/retimers involved, depending on the type of
board.
Signed-off-by: Abel Vesa <[email protected]>
---
Abel Vesa (3):
arm64: dts: qcom: x1e80100: Add ports nodes to USB1 SS[0-2] PHYs and controllers
arm64: dts: qcom: x1e80100-crd: Add pmic-glink node with all 3 connectors
arm64: dts: qcom: x1e80100-qcp: Add pmic-glink node with all 3 connectors
arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 143 ++++++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 143 ++++++++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/x1e80100.dtsi | 123 +++++++++++++++++++++++--
3 files changed, 403 insertions(+), 6 deletions(-)
---
base-commit: 3689b0ef08b70e4e03b82ebd37730a03a672853a
change-id: 20231214-x1e80100-dts-pmic-glink-65e351579b8b
Best regards,
--
Abel Vesa <[email protected]>
Add the pmic-glink node and describe all 3 USB Type-C connectors. Do this
for USB only, for now. The DP port will come at a later stage since it
uses a retimer.
Signed-off-by: Abel Vesa <[email protected]>
---
arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 143 ++++++++++++++++++++++++++++++
1 file changed, 143 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
index c5c2895b37c7..2fcc994cbb89 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
@@ -49,6 +49,101 @@ chosen {
stdout-path = "serial0:115200n8";
};
+ pmic-glink {
+ compatible = "qcom,x1e80100-pmic-glink",
+ "qcom,sm8550-pmic-glink",
+ "qcom,pmic-glink";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
+ <&tlmm 123 GPIO_ACTIVE_HIGH>,
+ <&tlmm 125 GPIO_ACTIVE_HIGH>;
+
+ connector@0 {
+ compatible = "usb-c-connector";
+ reg = <0>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ pmic_glink_ss0_hs_in: endpoint {
+ remote-endpoint = <&usb_1_ss0_dwc3_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ pmic_glink_ss0_ss_in: endpoint {
+ remote-endpoint = <&usb_1_ss0_qmpphy_out>;
+ };
+ };
+ };
+ };
+
+ connector@1 {
+ compatible = "usb-c-connector";
+ reg = <1>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ pmic_glink_ss1_hs_in: endpoint {
+ remote-endpoint = <&usb_1_ss1_dwc3_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ pmic_glink_ss1_ss_in: endpoint {
+ remote-endpoint = <&usb_1_ss1_qmpphy_out>;
+ };
+ };
+ };
+ };
+
+ connector@2 {
+ compatible = "usb-c-connector";
+ reg = <2>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ pmic_glink_ss2_hs_in: endpoint {
+ remote-endpoint = <&usb_1_ss2_dwc3_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ pmic_glink_ss2_ss_in: endpoint {
+ remote-endpoint = <&usb_1_ss2_qmpphy_out>;
+ };
+ };
+ };
+ };
+ };
+
sound {
compatible = "qcom,x1e80100-sndcard";
model = "X1E80100-CRD";
@@ -852,6 +947,22 @@ &usb_1_ss0_dwc3 {
usb-role-switch;
};
+&usb_1_ss0_dwc3_hs {
+ remote-endpoint = <&pmic_glink_ss0_hs_in>;
+};
+
+&usb_1_ss0_dwc3_ss {
+ remote-endpoint = <&usb_1_ss0_qmpphy_usb_ss_in>;
+};
+
+&usb_1_ss0_qmpphy_out {
+ remote-endpoint = <&pmic_glink_ss0_ss_in>;
+};
+
+&usb_1_ss0_qmpphy_usb_ss_in {
+ remote-endpoint = <&usb_1_ss0_dwc3_ss>;
+};
+
&usb_1_ss1_hsphy {
vdd-supply = <&vreg_l2e_0p8>;
vdda12-supply = <&vreg_l3e_1p2>;
@@ -874,6 +985,22 @@ &usb_1_ss1_dwc3 {
usb-role-switch;
};
+&usb_1_ss1_dwc3_hs {
+ remote-endpoint = <&pmic_glink_ss1_hs_in>;
+};
+
+&usb_1_ss1_dwc3_ss {
+ remote-endpoint = <&usb_1_ss1_qmpphy_usb_ss_in>;
+};
+
+&usb_1_ss1_qmpphy_out {
+ remote-endpoint = <&pmic_glink_ss1_ss_in>;
+};
+
+&usb_1_ss1_qmpphy_usb_ss_in {
+ remote-endpoint = <&usb_1_ss1_dwc3_ss>;
+};
+
&usb_1_ss2_hsphy {
vdd-supply = <&vreg_l2e_0p8>;
vdda12-supply = <&vreg_l3e_1p2>;
@@ -895,3 +1022,19 @@ &usb_1_ss2_dwc3 {
dr_mode = "host";
usb-role-switch;
};
+
+&usb_1_ss2_dwc3_hs {
+ remote-endpoint = <&pmic_glink_ss2_hs_in>;
+};
+
+&usb_1_ss2_dwc3_ss {
+ remote-endpoint = <&usb_1_ss2_qmpphy_usb_ss_in>;
+};
+
+&usb_1_ss2_qmpphy_out {
+ remote-endpoint = <&pmic_glink_ss2_ss_in>;
+};
+
+&usb_1_ss2_qmpphy_usb_ss_in {
+ remote-endpoint = <&usb_1_ss2_dwc3_ss>;
+};
--
2.34.1
Add the pmic-glink node and describe all 3 USB Type-C connectors. Do this
for USB only, for now. The DP port will come at a later stage since it
uses a mux.
Signed-off-by: Abel Vesa <[email protected]>
---
arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 143 ++++++++++++++++++++++++++++++
1 file changed, 143 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
index 2061fbe7b75a..a7eecf84b6d6 100644
--- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
+++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
@@ -23,6 +23,101 @@ chosen {
stdout-path = "serial0:115200n8";
};
+ pmic-glink {
+ compatible = "qcom,x1e80100-pmic-glink",
+ "qcom,sm8550-pmic-glink",
+ "qcom,pmic-glink";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
+ <&tlmm 123 GPIO_ACTIVE_HIGH>,
+ <&tlmm 125 GPIO_ACTIVE_HIGH>;
+
+ connector@0 {
+ compatible = "usb-c-connector";
+ reg = <0>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ pmic_glink_ss0_hs_in: endpoint {
+ remote-endpoint = <&usb_1_ss0_dwc3_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ pmic_glink_ss0_ss_in: endpoint {
+ remote-endpoint = <&usb_1_ss0_qmpphy_out>;
+ };
+ };
+ };
+ };
+
+ connector@1 {
+ compatible = "usb-c-connector";
+ reg = <1>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ pmic_glink_ss1_hs_in: endpoint {
+ remote-endpoint = <&usb_1_ss1_dwc3_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ pmic_glink_ss1_ss_in: endpoint {
+ remote-endpoint = <&usb_1_ss1_qmpphy_out>;
+ };
+ };
+ };
+ };
+
+ connector@2 {
+ compatible = "usb-c-connector";
+ reg = <2>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+
+ pmic_glink_ss2_hs_in: endpoint {
+ remote-endpoint = <&usb_1_ss2_dwc3_hs>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+
+ pmic_glink_ss2_ss_in: endpoint {
+ remote-endpoint = <&usb_1_ss2_qmpphy_out>;
+ };
+ };
+ };
+ };
+ };
+
vph_pwr: vph-pwr-regulator {
compatible = "regulator-fixed";
@@ -548,6 +643,22 @@ &usb_1_ss0_dwc3 {
usb-role-switch;
};
+&usb_1_ss0_dwc3_hs {
+ remote-endpoint = <&pmic_glink_ss0_hs_in>;
+};
+
+&usb_1_ss0_dwc3_ss {
+ remote-endpoint = <&usb_1_ss0_qmpphy_usb_ss_in>;
+};
+
+&usb_1_ss0_qmpphy_out {
+ remote-endpoint = <&pmic_glink_ss0_ss_in>;
+};
+
+&usb_1_ss0_qmpphy_usb_ss_in {
+ remote-endpoint = <&usb_1_ss0_dwc3_ss>;
+};
+
&usb_1_ss1_hsphy {
vdd-supply = <&vreg_l2e_0p8>;
vdda12-supply = <&vreg_l3e_1p2>;
@@ -570,6 +681,22 @@ &usb_1_ss1_dwc3 {
usb-role-switch;
};
+&usb_1_ss1_dwc3_hs {
+ remote-endpoint = <&pmic_glink_ss1_hs_in>;
+};
+
+&usb_1_ss1_dwc3_ss {
+ remote-endpoint = <&usb_1_ss1_qmpphy_usb_ss_in>;
+};
+
+&usb_1_ss1_qmpphy_out {
+ remote-endpoint = <&pmic_glink_ss1_ss_in>;
+};
+
+&usb_1_ss1_qmpphy_usb_ss_in {
+ remote-endpoint = <&usb_1_ss1_dwc3_ss>;
+};
+
&usb_1_ss2_hsphy {
vdd-supply = <&vreg_l2e_0p8>;
vdda12-supply = <&vreg_l3e_1p2>;
@@ -591,3 +718,19 @@ &usb_1_ss2_dwc3 {
dr_mode = "host";
usb-role-switch;
};
+
+&usb_1_ss2_dwc3_hs {
+ remote-endpoint = <&pmic_glink_ss2_hs_in>;
+};
+
+&usb_1_ss2_dwc3_ss {
+ remote-endpoint = <&usb_1_ss2_qmpphy_usb_ss_in>;
+};
+
+&usb_1_ss2_qmpphy_out {
+ remote-endpoint = <&pmic_glink_ss2_ss_in>;
+};
+
+&usb_1_ss2_qmpphy_usb_ss_in {
+ remote-endpoint = <&usb_1_ss2_dwc3_ss>;
+};
--
2.34.1
On Mon, May 27, 2024 at 11:07:28AM +0300, Abel Vesa wrote:
> Add the pmic-glink node and describe all 3 USB Type-C connectors. Do this
> for USB only, for now. The DP port will come at a later stage since it
> uses a retimer.
>
> Signed-off-by: Abel Vesa <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 143 ++++++++++++++++++++++++++++++
> 1 file changed, 143 insertions(+)
Please rebase on top of https://lore.kernel.org/linux-arm-msm/[email protected]/, sorry about it.
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> index c5c2895b37c7..2fcc994cbb89 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> @@ -49,6 +49,101 @@ chosen {
> stdout-path = "serial0:115200n8";
> };
>
> + pmic-glink {
> + compatible = "qcom,x1e80100-pmic-glink",
> + "qcom,sm8550-pmic-glink",
> + "qcom,pmic-glink";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
> + <&tlmm 123 GPIO_ACTIVE_HIGH>,
> + <&tlmm 125 GPIO_ACTIVE_HIGH>;
> +
> + connector@0 {
> + compatible = "usb-c-connector";
> + reg = <0>;
> + power-role = "dual";
> + data-role = "dual";
Does this match the information reported by UCSI?
> +
--
With best wishes
Dmitry
On Mon, May 27, 2024 at 11:07:29AM +0300, Abel Vesa wrote:
> Add the pmic-glink node and describe all 3 USB Type-C connectors. Do this
> for USB only, for now. The DP port will come at a later stage since it
> uses a mux.
>
> Signed-off-by: Abel Vesa <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 143 ++++++++++++++++++++++++++++++
> 1 file changed, 143 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
> index 2061fbe7b75a..a7eecf84b6d6 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
> +++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts
> @@ -23,6 +23,101 @@ chosen {
> stdout-path = "serial0:115200n8";
> };
>
> + pmic-glink {
> + compatible = "qcom,x1e80100-pmic-glink",
> + "qcom,sm8550-pmic-glink",
> + "qcom,pmic-glink";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
> + <&tlmm 123 GPIO_ACTIVE_HIGH>,
> + <&tlmm 125 GPIO_ACTIVE_HIGH>;
> +
> + connector@0 {
> + compatible = "usb-c-connector";
> + reg = <0>;
> + power-role = "dual";
> + data-role = "dual";
Same question as for the previous patch.
> +
--
With best wishes
Dmitry
On 5/27/24 10:07, Abel Vesa wrote:
> Add the pmic-glink node and describe all 3 USB Type-C connectors. Do this
> for USB only, for now. The DP port will come at a later stage since it
> uses a retimer.
>
> Signed-off-by: Abel Vesa <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 143 ++++++++++++++++++++++++++++++
> 1 file changed, 143 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> index c5c2895b37c7..2fcc994cbb89 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> @@ -49,6 +49,101 @@ chosen {
> stdout-path = "serial0:115200n8";
> };
>
> + pmic-glink {
> + compatible = "qcom,x1e80100-pmic-glink",
> + "qcom,sm8550-pmic-glink",
> + "qcom,pmic-glink";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
> + <&tlmm 123 GPIO_ACTIVE_HIGH>,
> + <&tlmm 125 GPIO_ACTIVE_HIGH>;
> +
> + connector@0 {
Could you describe them somehow? e.g.
/* Left rear port */
connector @0 {
There is probably some better terminology to describe the one closer and
farther away from the user, do as you will..
For the QCP, they're numbered on the chassis
Konrad
On Tue, May 28, 2024 at 02:28:08PM +0200, Konrad Dybcio wrote:
>
>
> On 5/27/24 10:07, Abel Vesa wrote:
> > Add the pmic-glink node and describe all 3 USB Type-C connectors. Do this
> > for USB only, for now. The DP port will come at a later stage since it
> > uses a retimer.
> >
> > Signed-off-by: Abel Vesa <[email protected]>
> > ---
> > arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 143 ++++++++++++++++++++++++++++++
> > 1 file changed, 143 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> > index c5c2895b37c7..2fcc994cbb89 100644
> > --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> > +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> > @@ -49,6 +49,101 @@ chosen {
> > stdout-path = "serial0:115200n8";
> > };
> > + pmic-glink {
> > + compatible = "qcom,x1e80100-pmic-glink",
> > + "qcom,sm8550-pmic-glink",
> > + "qcom,pmic-glink";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
> > + <&tlmm 123 GPIO_ACTIVE_HIGH>,
> > + <&tlmm 125 GPIO_ACTIVE_HIGH>;
> > +
> > + connector@0 {
>
> Could you describe them somehow? e.g.
Which reminds me that we should add OF bindings for physical_location
driver.
>
>
> /* Left rear port */
> connector @0 {
>
>
> There is probably some better terminology to describe the one closer and
> farther away from the user, do as you will..
>
> For the QCP, they're numbered on the chassis
>
> Konrad
--
With best wishes
Dmitry
On Mon, May 27, 2024 at 11:07:28AM +0300, Abel Vesa wrote:
> Add the pmic-glink node and describe all 3 USB Type-C connectors. Do this
> for USB only, for now. The DP port will come at a later stage since it
> uses a retimer.
>
> Signed-off-by: Abel Vesa <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 143 ++++++++++++++++++++++++++++++
> 1 file changed, 143 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> index c5c2895b37c7..2fcc994cbb89 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> @@ -49,6 +49,101 @@ chosen {
> stdout-path = "serial0:115200n8";
> };
>
> + pmic-glink {
> + compatible = "qcom,x1e80100-pmic-glink",
> + "qcom,sm8550-pmic-glink",
> + "qcom,pmic-glink";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
> + <&tlmm 123 GPIO_ACTIVE_HIGH>,
> + <&tlmm 125 GPIO_ACTIVE_HIGH>;
With this series applied, I'm getting the following error on boot of the
CRD:
ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: PPM init failed, stop trying
Known issue? Do you need to enable some quirk in the UCSI driver?
Johan
On Mon, 3 Jun 2024 at 11:48, Johan Hovold <[email protected]> wrote:
>
> On Mon, May 27, 2024 at 11:07:28AM +0300, Abel Vesa wrote:
> > Add the pmic-glink node and describe all 3 USB Type-C connectors. Do this
> > for USB only, for now. The DP port will come at a later stage since it
> > uses a retimer.
> >
> > Signed-off-by: Abel Vesa <[email protected]>
> > ---
> > arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 143 ++++++++++++++++++++++++++++++
> > 1 file changed, 143 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> > index c5c2895b37c7..2fcc994cbb89 100644
> > --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> > +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts
> > @@ -49,6 +49,101 @@ chosen {
> > stdout-path = "serial0:115200n8";
> > };
> >
> > + pmic-glink {
> > + compatible = "qcom,x1e80100-pmic-glink",
> > + "qcom,sm8550-pmic-glink",
> > + "qcom,pmic-glink";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + orientation-gpios = <&tlmm 121 GPIO_ACTIVE_HIGH>,
> > + <&tlmm 123 GPIO_ACTIVE_HIGH>,
> > + <&tlmm 125 GPIO_ACTIVE_HIGH>;
>
> With this series applied, I'm getting the following error on boot of the
> CRD:
>
> ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: PPM init failed, stop trying
>
> Known issue? Do you need to enable some quirk in the UCSI driver?
Not that I know. The message is caused by the UCSI not responding to
the PPM_RESET command. A trace from pmic-glink would be helpful.
--
With best wishes
Dmitry
On Mon, Jun 03, 2024 at 11:49:51AM +0300, Dmitry Baryshkov wrote:
> On Mon, 3 Jun 2024 at 11:48, Johan Hovold <[email protected]> wrote:
> > On Mon, May 27, 2024 at 11:07:28AM +0300, Abel Vesa wrote:
> > > Add the pmic-glink node and describe all 3 USB Type-C connectors. Do this
> > > for USB only, for now. The DP port will come at a later stage since it
> > > uses a retimer.
> > With this series applied, I'm getting the following error on boot of the
> > CRD:
> >
> > ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: PPM init failed, stop trying
> >
> > Known issue? Do you need to enable some quirk in the UCSI driver?
>
> Not that I know. The message is caused by the UCSI not responding to
> the PPM_RESET command. A trace from pmic-glink would be helpful.
I don't have time to look into this right now, so only reporting to
Abel.
Looks like there are two more warnings earlier on boot which appear to
be related:
[ 10.730571] ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: invalid connector number, ignoring
[ 10.730656] pmic_glink_altmode.pmic_glink_altmode pmic_glink.altmode.0: invalid connector number, ignoring
Johan
On Mon, 3 Jun 2024 at 12:49, Johan Hovold <[email protected]> wrote:
>
> On Mon, Jun 03, 2024 at 11:26:28AM +0200, Johan Hovold wrote:
> > On Mon, Jun 03, 2024 at 11:49:51AM +0300, Dmitry Baryshkov wrote:
> > > On Mon, 3 Jun 2024 at 11:48, Johan Hovold <[email protected]> wrote:
> > > > On Mon, May 27, 2024 at 11:07:28AM +0300, Abel Vesa wrote:
>
> > I don't have time to look into this right now, so only reporting to
> > Abel.
> >
> > Looks like there are two more warnings earlier on boot which appear to
> > be related:
> >
> > [ 10.730571] ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: invalid connector number, ignoring
> > [ 10.730656] pmic_glink_altmode.pmic_glink_altmode pmic_glink.altmode.0: invalid connector number, ignoring
>
> Ok, it's just the pmic ucsi driver that is hardcoding max two ports
> still. I'll send a fix.
https://lore.kernel.org/linux-arm-msm/20240527-x1e80100-soc-qcom-pmic-glink-v1-1-e5c4cda2f745@linaro.org/
--
With best wishes
Dmitry
On Mon, Jun 03, 2024 at 11:49:04AM +0200, Johan Hovold wrote:
> On Mon, Jun 03, 2024 at 11:26:28AM +0200, Johan Hovold wrote:
> > [ 10.730571] ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: invalid connector number, ignoring
> > [ 10.730656] pmic_glink_altmode.pmic_glink_altmode pmic_glink.altmode.0: invalid connector number, ignoring
>
> Ok, it's just the pmic ucsi driver that is hardcoding max two ports
> still. I'll send a fix.
Abel had already sent a fix for the above here:
https://lore.kernel.org/lkml/20240527-x1e80100-soc-qcom-pmic-glink-v1-1-e5c4cda2f745@linaro.org/
The PPMI init failure still remains, though:
ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: PPM init failed, stop trying
Johan
On Mon, Jun 03, 2024 at 11:26:28AM +0200, Johan Hovold wrote:
> On Mon, Jun 03, 2024 at 11:49:51AM +0300, Dmitry Baryshkov wrote:
> > On Mon, 3 Jun 2024 at 11:48, Johan Hovold <[email protected]> wrote:
> > > On Mon, May 27, 2024 at 11:07:28AM +0300, Abel Vesa wrote:
> I don't have time to look into this right now, so only reporting to
> Abel.
>
> Looks like there are two more warnings earlier on boot which appear to
> be related:
>
> [ 10.730571] ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: invalid connector number, ignoring
> [ 10.730656] pmic_glink_altmode.pmic_glink_altmode pmic_glink.altmode.0: invalid connector number, ignoring
Ok, it's just the pmic ucsi driver that is hardcoding max two ports
still. I'll send a fix.
Johan
On Mon, Jun 03, 2024 at 11:51:24AM +0200, Johan Hovold wrote:
> On Mon, Jun 03, 2024 at 11:49:04AM +0200, Johan Hovold wrote:
> > On Mon, Jun 03, 2024 at 11:26:28AM +0200, Johan Hovold wrote:
>
> > > [ 10.730571] ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: invalid connector number, ignoring
> > > [ 10.730656] pmic_glink_altmode.pmic_glink_altmode pmic_glink.altmode.0: invalid connector number, ignoring
> >
> > Ok, it's just the pmic ucsi driver that is hardcoding max two ports
> > still. I'll send a fix.
>
> Abel had already sent a fix for the above here:
>
> https://lore.kernel.org/lkml/20240527-x1e80100-soc-qcom-pmic-glink-v1-1-e5c4cda2f745@linaro.org/
Nope, sorry, the above was for the PMIC GLINK driver itself. I just sent
a corresponding update for the GLINK UCSI driver here:
https://lore.kernel.org/all/[email protected]/
> The PPMI init failure still remains, though:
>
> ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: PPM init failed, stop trying
Johan
On Mon, Jun 03, 2024 at 11:26:28AM +0200, Johan Hovold wrote:
> On Mon, Jun 03, 2024 at 11:49:51AM +0300, Dmitry Baryshkov wrote:
> > On Mon, 3 Jun 2024 at 11:48, Johan Hovold <[email protected]> wrote:
> > > On Mon, May 27, 2024 at 11:07:28AM +0300, Abel Vesa wrote:
> > > > Add the pmic-glink node and describe all 3 USB Type-C connectors. Do this
> > > > for USB only, for now. The DP port will come at a later stage since it
> > > > uses a retimer.
>
> > > With this series applied, I'm getting the following error on boot of the
> > > CRD:
> > >
> > > ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: PPM init failed, stop trying
> > >
> > > Known issue? Do you need to enable some quirk in the UCSI driver?
> >
> > Not that I know. The message is caused by the UCSI not responding to
> > the PPM_RESET command. A trace from pmic-glink would be helpful.
>
> I don't have time to look into this right now, so only reporting to
> Abel.
Not having the hardware and not having the dumps I probalby can't help
either.
> Looks like there are two more warnings earlier on boot which appear to
> be related:
>
> [ 10.730571] ucsi_glink.pmic_glink_ucsi pmic_glink.ucsi.0: invalid connector number, ignoring
> [ 10.730656] pmic_glink_altmode.pmic_glink_altmode pmic_glink.altmode.0: invalid connector number, ignoring
It well might be.
--
With best wishes
Dmitry