Hi,
>On gigadevice gd25lq64c, the quad mode is enabled after BFPT is parsed.
>According to datasheet[1], Quad enable (QE) bit needs to be set to 0 to
>use write protection (WP) pin. It also recommends setting default value of
>QE to 0 to avoid a potential short issue.
So you are using either dual or single io mode. Why can't you use the device tree property spi-{tx,rx}-bus-width?
>Add a disable-quad-mode property in devicetree that platform can use it to
>override the quad mode status parsed from BFPT to use write protection.
>
>[1]
>https://www.elm-tech.com/ja/products/spi-flash-memory/gd25lq64/gd25lq64.pdf
should be a link on the vendor Homepage if possible.
-michael