2022-03-02 04:24:00

by Steven Rostedt

Subject: Re: [RFC 10/10] trace: platform/x86/intel/ifs: Add trace point to track Intel IFS operations

On Tue, 1 Mar 2022 11:54:57 -0800
Jithu Joseph <[email protected]> wrote:

> + TP_STRUCT__entry(
> + __field( u8, start )
> + __field( u8, stop )
> + __field( u64, status )
> + ),

I'd suggest swapping this to:

__field( u64, status )
__field( u8, start )
__field( u8, stop )

As trace events are usually aligned by 4 bytes (sometimes 8 for archs that
require 8byte alignment for 8 byte words), but any event, putting the
padding at the end of the event is better than in the middle of the event.

Having the u64 come after two u8 (two byes) will pretty much guarantee a 6
bytes hole in the middle of the event.

-- Steve

2022-03-02 18:28:10

by Joseph, Jithu

Subject: Re: [RFC 10/10] trace: platform/x86/intel/ifs: Add trace point to track Intel IFS operations

On 3/1/2022 12:17 PM, Steven Rostedt wrote:
> On Tue, 1 Mar 2022 11:54:57 -0800
> Jithu Joseph <[email protected]> wrote:
>
>> + TP_STRUCT__entry(
>> + __field( u8, start )
>> + __field( u8, stop )
>> + __field( u64, status )
>> + ),
>
> I'd suggest swapping this to:
>
> __field( u64, status )
> __field( u8, start )
> __field( u8, stop )
>
> As trace events are usually aligned by 4 bytes (sometimes 8 for archs that
> require 8byte alignment for 8 byte words), but any event, putting the
> padding at the end of the event is better than in the middle of the event.
>
> Having the u64 come after two u8 (two byes) will pretty much guarantee a 6
> bytes hole in the middle of the event.

Will reorder the fields as you suggested. Appreciate the detailed comment.

Jithu