2022-03-01 12:59:11

by Sandeep Maheswaram

[permalink] [raw]
Subject: [PATCH v2 0/3] Refactor xhci quirks and plat private data

changes in v2:
Added a PATCH 2/3 to remove unwanted header inclusion.
Fixed minor nitpicks in PATCH 3/3.

Pavankumar Kondeti (1):
usb: xhci: refactor quirks and plat private data

Sandeep Maheswaram (2):
usb: xhci: Remove unwanted header inclusion
usb: dwc: host: add xhci_plat_priv quirk XHCI_SKIP_PHY_INIT

drivers/usb/cdns3/host.c | 2 +-
drivers/usb/dwc3/host.c | 13 ++++++++
drivers/usb/host/xhci-plat.c | 3 +-
drivers/usb/host/xhci-plat.h | 24 ---------------
drivers/usb/host/xhci-rcar.c | 3 +-
drivers/usb/host/xhci.h | 60 ++++--------------------------------
include/linux/usb/xhci-plat.h | 24 +++++++++++++++
include/linux/usb/xhci-quirks.h | 67 +++++++++++++++++++++++++++++++++++++++++
8 files changed, 115 insertions(+), 81 deletions(-)
delete mode 100644 drivers/usb/host/xhci-plat.h
create mode 100644 include/linux/usb/xhci-plat.h
create mode 100644 include/linux/usb/xhci-quirks.h

--
2.7.4


2022-03-01 19:04:58

by Sandeep Maheswaram

[permalink] [raw]
Subject: [PATCH v2 1/3] usb: xhci: refactor quirks and plat private data

From: Pavankumar Kondeti <[email protected]>

This refactoring allows drivers like dwc3 host glue driver to
specify their xhci quirks.

Signed-off-by: Pavankumar Kondeti <[email protected]>
Signed-off-by: Sandeep Maheswaram <[email protected]>
---
drivers/usb/cdns3/host.c | 2 +-
drivers/usb/host/xhci-plat.c | 3 +-
drivers/usb/host/xhci-plat.h | 24 ---------------
drivers/usb/host/xhci-rcar.c | 3 +-
drivers/usb/host/xhci.h | 60 ++++--------------------------------
include/linux/usb/xhci-plat.h | 23 ++++++++++++++
include/linux/usb/xhci-quirks.h | 67 +++++++++++++++++++++++++++++++++++++++++
7 files changed, 101 insertions(+), 81 deletions(-)
delete mode 100644 drivers/usb/host/xhci-plat.h
create mode 100644 include/linux/usb/xhci-plat.h
create mode 100644 include/linux/usb/xhci-quirks.h

diff --git a/drivers/usb/cdns3/host.c b/drivers/usb/cdns3/host.c
index 9643b90..7fb8049 100644
--- a/drivers/usb/cdns3/host.c
+++ b/drivers/usb/cdns3/host.c
@@ -15,8 +15,8 @@
#include "drd.h"
#include "host-export.h"
#include <linux/usb/hcd.h>
+#include <linux/usb/xhci-plat.h>
#include "../host/xhci.h"
-#include "../host/xhci-plat.h"

#define XECP_PORT_CAP_REG 0x8000
#define XECP_AUX_CTRL_REG1 0x8120
diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
index 649ffd8..601e656 100644
--- a/drivers/usb/host/xhci-plat.c
+++ b/drivers/usb/host/xhci-plat.c
@@ -19,9 +19,10 @@
#include <linux/slab.h>
#include <linux/acpi.h>
#include <linux/usb/of.h>
+#include <linux/usb/xhci-quirks.h>
+#include <linux/usb/xhci-plat.h>

#include "xhci.h"
-#include "xhci-plat.h"
#include "xhci-mvebu.h"
#include "xhci-rcar.h"

diff --git a/drivers/usb/host/xhci-plat.h b/drivers/usb/host/xhci-plat.h
deleted file mode 100644
index 1fb149d..0000000
--- a/drivers/usb/host/xhci-plat.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0 */
-/*
- * xhci-plat.h - xHCI host controller driver platform Bus Glue.
- *
- * Copyright (C) 2015 Renesas Electronics Corporation
- */
-
-#ifndef _XHCI_PLAT_H
-#define _XHCI_PLAT_H
-
-#include "xhci.h" /* for hcd_to_xhci() */
-
-struct xhci_plat_priv {
- const char *firmware_name;
- unsigned long long quirks;
- void (*plat_start)(struct usb_hcd *);
- int (*init_quirk)(struct usb_hcd *);
- int (*suspend_quirk)(struct usb_hcd *);
- int (*resume_quirk)(struct usb_hcd *);
-};
-
-#define hcd_to_xhci_priv(h) ((struct xhci_plat_priv *)hcd_to_xhci(h)->priv)
-#define xhci_to_priv(x) ((struct xhci_plat_priv *)(x)->priv)
-#endif /* _XHCI_PLAT_H */
diff --git a/drivers/usb/host/xhci-rcar.c b/drivers/usb/host/xhci-rcar.c
index 9888ba7..cbcb6ba 100644
--- a/drivers/usb/host/xhci-rcar.c
+++ b/drivers/usb/host/xhci-rcar.c
@@ -12,9 +12,10 @@
#include <linux/of.h>
#include <linux/usb/phy.h>
#include <linux/sys_soc.h>
+#include <linux/usb/xhci-quirks.h>
+#include <linux/usb/xhci-plat.h>

#include "xhci.h"
-#include "xhci-plat.h"
#include "xhci-rcar.h"

/*
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 8a0026e..cbd7d00 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -17,6 +17,8 @@
#include <linux/kernel.h>
#include <linux/usb/hcd.h>
#include <linux/io-64-nonatomic-lo-hi.h>
+#include <linux/usb/xhci-quirks.h>
+#include <linux/usb/xhci-plat.h>

/* Code sharing between pci-quirks and xhci hcd */
#include "xhci-ext-caps.h"
@@ -1844,60 +1846,6 @@ struct xhci_hcd {
#define XHCI_STATE_HALTED (1 << 1)
#define XHCI_STATE_REMOVING (1 << 2)
unsigned long long quirks;
-#define XHCI_LINK_TRB_QUIRK BIT_ULL(0)
-#define XHCI_RESET_EP_QUIRK BIT_ULL(1)
-#define XHCI_NEC_HOST BIT_ULL(2)
-#define XHCI_AMD_PLL_FIX BIT_ULL(3)
-#define XHCI_SPURIOUS_SUCCESS BIT_ULL(4)
-/*
- * Certain Intel host controllers have a limit to the number of endpoint
- * contexts they can handle. Ideally, they would signal that they can't handle
- * anymore endpoint contexts by returning a Resource Error for the Configure
- * Endpoint command, but they don't. Instead they expect software to keep track
- * of the number of active endpoints for them, across configure endpoint
- * commands, reset device commands, disable slot commands, and address device
- * commands.
- */
-#define XHCI_EP_LIMIT_QUIRK BIT_ULL(5)
-#define XHCI_BROKEN_MSI BIT_ULL(6)
-#define XHCI_RESET_ON_RESUME BIT_ULL(7)
-#define XHCI_SW_BW_CHECKING BIT_ULL(8)
-#define XHCI_AMD_0x96_HOST BIT_ULL(9)
-#define XHCI_TRUST_TX_LENGTH BIT_ULL(10)
-#define XHCI_LPM_SUPPORT BIT_ULL(11)
-#define XHCI_INTEL_HOST BIT_ULL(12)
-#define XHCI_SPURIOUS_REBOOT BIT_ULL(13)
-#define XHCI_COMP_MODE_QUIRK BIT_ULL(14)
-#define XHCI_AVOID_BEI BIT_ULL(15)
-#define XHCI_PLAT BIT_ULL(16)
-#define XHCI_SLOW_SUSPEND BIT_ULL(17)
-#define XHCI_SPURIOUS_WAKEUP BIT_ULL(18)
-/* For controllers with a broken beyond repair streams implementation */
-#define XHCI_BROKEN_STREAMS BIT_ULL(19)
-#define XHCI_PME_STUCK_QUIRK BIT_ULL(20)
-#define XHCI_MTK_HOST BIT_ULL(21)
-#define XHCI_SSIC_PORT_UNUSED BIT_ULL(22)
-#define XHCI_NO_64BIT_SUPPORT BIT_ULL(23)
-#define XHCI_MISSING_CAS BIT_ULL(24)
-/* For controller with a broken Port Disable implementation */
-#define XHCI_BROKEN_PORT_PED BIT_ULL(25)
-#define XHCI_LIMIT_ENDPOINT_INTERVAL_7 BIT_ULL(26)
-#define XHCI_U2_DISABLE_WAKE BIT_ULL(27)
-#define XHCI_ASMEDIA_MODIFY_FLOWCONTROL BIT_ULL(28)
-#define XHCI_HW_LPM_DISABLE BIT_ULL(29)
-#define XHCI_SUSPEND_DELAY BIT_ULL(30)
-#define XHCI_INTEL_USB_ROLE_SW BIT_ULL(31)
-#define XHCI_ZERO_64B_REGS BIT_ULL(32)
-#define XHCI_DEFAULT_PM_RUNTIME_ALLOW BIT_ULL(33)
-#define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(34)
-#define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35)
-#define XHCI_RENESAS_FW_QUIRK BIT_ULL(36)
-#define XHCI_SKIP_PHY_INIT BIT_ULL(37)
-#define XHCI_DISABLE_SPARSE BIT_ULL(38)
-#define XHCI_SG_TRB_CACHE_SIZE_QUIRK BIT_ULL(39)
-#define XHCI_NO_SOFT_RETRY BIT_ULL(40)
-#define XHCI_BROKEN_D3COLD BIT_ULL(41)
-#define XHCI_EP_CTX_BROKEN_DCS BIT_ULL(42)

unsigned int num_active_eps;
unsigned int limit_active_eps;
@@ -1963,6 +1911,10 @@ static inline struct usb_hcd *xhci_to_hcd(struct xhci_hcd *xhci)
return xhci->main_hcd;
}

+/* For xhci-plat drivers */
+#define hcd_to_xhci_priv(h) ((struct xhci_plat_priv *)hcd_to_xhci(h)->priv)
+#define xhci_to_priv(x) ((struct xhci_plat_priv *)(x)->priv)
+
#define xhci_dbg(xhci, fmt, args...) \
dev_dbg(xhci_to_hcd(xhci)->self.controller , fmt , ## args)
#define xhci_err(xhci, fmt, args...) \
diff --git a/include/linux/usb/xhci-plat.h b/include/linux/usb/xhci-plat.h
new file mode 100644
index 0000000..906e907
--- /dev/null
+++ b/include/linux/usb/xhci-plat.h
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * xhci-plat.h - xHCI host controller driver platform Bus Glue.
+ *
+ * Copyright (C) 2015 Renesas Electronics Corporation
+ */
+
+#ifndef _XHCI_PLAT_H
+#define _XHCI_PLAT_H
+
+#include <linux/types.h>
+#include <linux/usb/hcd.h>
+
+struct xhci_plat_priv {
+ const char *firmware_name;
+ unsigned long long quirks;
+ void (*plat_start)(struct usb_hcd *hcd);
+ int (*init_quirk)(struct usb_hcd *hcd);
+ int (*suspend_quirk)(struct usb_hcd *hcd);
+ int (*resume_quirk)(struct usb_hcd *hcd);
+};
+
+#endif /* _XHCI_PLAT_H */
diff --git a/include/linux/usb/xhci-quirks.h b/include/linux/usb/xhci-quirks.h
new file mode 100644
index 0000000..57ae0b1
--- /dev/null
+++ b/include/linux/usb/xhci-quirks.h
@@ -0,0 +1,67 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+/*
+ * xHCI host controller driver quirks
+ *
+ * Copyright (C) 2008 Intel Corp.
+ */
+
+#ifndef _XHCI_QUIRKS_H
+#define _XHCI_QUIRKS_H
+
+#define XHCI_LINK_TRB_QUIRK BIT_ULL(0)
+#define XHCI_RESET_EP_QUIRK BIT_ULL(1)
+#define XHCI_NEC_HOST BIT_ULL(2)
+#define XHCI_AMD_PLL_FIX BIT_ULL(3)
+#define XHCI_SPURIOUS_SUCCESS BIT_ULL(4)
+/*
+ * Certain Intel host controllers have a limit to the number of endpoint
+ * contexts they can handle. Ideally, they would signal that they can't handle
+ * anymore endpoint contexts by returning a Resource Error for the Configure
+ * Endpoint command, but they don't. Instead they expect software to keep track
+ * of the number of active endpoints for them, across configure endpoint
+ * commands, reset device commands, disable slot commands, and address device
+ * commands.
+ */
+#define XHCI_EP_LIMIT_QUIRK BIT_ULL(5)
+#define XHCI_BROKEN_MSI BIT_ULL(6)
+#define XHCI_RESET_ON_RESUME BIT_ULL(7)
+#define XHCI_SW_BW_CHECKING BIT_ULL(8)
+#define XHCI_AMD_0x96_HOST BIT_ULL(9)
+#define XHCI_TRUST_TX_LENGTH BIT_ULL(10)
+#define XHCI_LPM_SUPPORT BIT_ULL(11)
+#define XHCI_INTEL_HOST BIT_ULL(12)
+#define XHCI_SPURIOUS_REBOOT BIT_ULL(13)
+#define XHCI_COMP_MODE_QUIRK BIT_ULL(14)
+#define XHCI_AVOID_BEI BIT_ULL(15)
+#define XHCI_PLAT BIT_ULL(16)
+#define XHCI_SLOW_SUSPEND BIT_ULL(17)
+#define XHCI_SPURIOUS_WAKEUP BIT_ULL(18)
+/* For controllers with a broken beyond repair streams implementation */
+#define XHCI_BROKEN_STREAMS BIT_ULL(19)
+#define XHCI_PME_STUCK_QUIRK BIT_ULL(20)
+#define XHCI_MTK_HOST BIT_ULL(21)
+#define XHCI_SSIC_PORT_UNUSED BIT_ULL(22)
+#define XHCI_NO_64BIT_SUPPORT BIT_ULL(23)
+#define XHCI_MISSING_CAS BIT_ULL(24)
+/* For controller with a broken Port Disable implementation */
+#define XHCI_BROKEN_PORT_PED BIT_ULL(25)
+#define XHCI_LIMIT_ENDPOINT_INTERVAL_7 BIT_ULL(26)
+#define XHCI_U2_DISABLE_WAKE BIT_ULL(27)
+#define XHCI_ASMEDIA_MODIFY_FLOWCONTROL BIT_ULL(28)
+#define XHCI_HW_LPM_DISABLE BIT_ULL(29)
+#define XHCI_SUSPEND_DELAY BIT_ULL(30)
+#define XHCI_INTEL_USB_ROLE_SW BIT_ULL(31)
+#define XHCI_ZERO_64B_REGS BIT_ULL(32)
+#define XHCI_DEFAULT_PM_RUNTIME_ALLOW BIT_ULL(33)
+#define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(34)
+#define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35)
+#define XHCI_RENESAS_FW_QUIRK BIT_ULL(36)
+#define XHCI_SKIP_PHY_INIT BIT_ULL(37)
+#define XHCI_DISABLE_SPARSE BIT_ULL(38)
+#define XHCI_SG_TRB_CACHE_SIZE_QUIRK BIT_ULL(39)
+#define XHCI_NO_SOFT_RETRY BIT_ULL(40)
+#define XHCI_BROKEN_D3COLD BIT_ULL(41)
+#define XHCI_EP_CTX_BROKEN_DCS BIT_ULL(42)
+
+#endif /* _XHCI_QUIRKS_H */
--
2.7.4

2022-03-17 06:29:54

by Sandeep Maheswaram

[permalink] [raw]
Subject: Re: [PATCH v2 0/3] Refactor xhci quirks and plat private data

Hi Greg,

On 3/1/2022 3:58 PM, Sandeep Maheswaram wrote:
> changes in v2:
> Added a PATCH 2/3 to remove unwanted header inclusion.
> Fixed minor nitpicks in PATCH 3/3.
>
> Pavankumar Kondeti (1):
> usb: xhci: refactor quirks and plat private data
>
> Sandeep Maheswaram (2):
> usb: xhci: Remove unwanted header inclusion
> usb: dwc: host: add xhci_plat_priv quirk XHCI_SKIP_PHY_INIT
>
> drivers/usb/cdns3/host.c | 2 +-
> drivers/usb/dwc3/host.c | 13 ++++++++
> drivers/usb/host/xhci-plat.c | 3 +-
> drivers/usb/host/xhci-plat.h | 24 ---------------
> drivers/usb/host/xhci-rcar.c | 3 +-
> drivers/usb/host/xhci.h | 60 ++++--------------------------------
> include/linux/usb/xhci-plat.h | 24 +++++++++++++++
> include/linux/usb/xhci-quirks.h | 67 +++++++++++++++++++++++++++++++++++++++++
> 8 files changed, 115 insertions(+), 81 deletions(-)
> delete mode 100644 drivers/usb/host/xhci-plat.h
> create mode 100644 include/linux/usb/xhci-plat.h
> create mode 100644 include/linux/usb/xhci-quirks.h

Please let me know your opinion about this patch series.

Regards

Sandeep

2022-03-18 16:23:34

by Greg Kroah-Hartman

[permalink] [raw]
Subject: Re: [PATCH v2 0/3] Refactor xhci quirks and plat private data

On Thu, Mar 17, 2022 at 11:17:17AM +0530, Sandeep Maheswaram (Temp) wrote:
> Hi Greg,
>
> On 3/1/2022 3:58 PM, Sandeep Maheswaram wrote:
> > changes in v2:
> > Added a PATCH 2/3 to remove unwanted header inclusion.
> > Fixed minor nitpicks in PATCH 3/3.
> >
> > Pavankumar Kondeti (1):
> > usb: xhci: refactor quirks and plat private data
> >
> > Sandeep Maheswaram (2):
> > usb: xhci: Remove unwanted header inclusion
> > usb: dwc: host: add xhci_plat_priv quirk XHCI_SKIP_PHY_INIT
> >
> > drivers/usb/cdns3/host.c | 2 +-
> > drivers/usb/dwc3/host.c | 13 ++++++++
> > drivers/usb/host/xhci-plat.c | 3 +-
> > drivers/usb/host/xhci-plat.h | 24 ---------------
> > drivers/usb/host/xhci-rcar.c | 3 +-
> > drivers/usb/host/xhci.h | 60 ++++--------------------------------
> > include/linux/usb/xhci-plat.h | 24 +++++++++++++++
> > include/linux/usb/xhci-quirks.h | 67 +++++++++++++++++++++++++++++++++++++++++
> > 8 files changed, 115 insertions(+), 81 deletions(-)
> > delete mode 100644 drivers/usb/host/xhci-plat.h
> > create mode 100644 include/linux/usb/xhci-plat.h
> > create mode 100644 include/linux/usb/xhci-quirks.h
>
> Please let me know your opinion about this patch series.

I need the xhci maintainer to review it...

thanks,

greg k-h

2022-03-19 06:31:05

by Greg Kroah-Hartman

[permalink] [raw]
Subject: Re: [PATCH v2 1/3] usb: xhci: refactor quirks and plat private data

On Tue, Mar 01, 2022 at 03:58:25PM +0530, Sandeep Maheswaram wrote:
> From: Pavankumar Kondeti <[email protected]>
>
> This refactoring allows drivers like dwc3 host glue driver to
> specify their xhci quirks.

This text does not describe what you are doing here at all so I have no
idea how to review this :(

2022-03-21 22:16:26

by Sandeep Maheswaram

[permalink] [raw]
Subject: Re: [PATCH v2 0/3] Refactor xhci quirks and plat private data

Hi Mathias,

On 3/18/2022 5:29 PM, Greg Kroah-Hartman wrote:
> On Thu, Mar 17, 2022 at 11:17:17AM +0530, Sandeep Maheswaram (Temp) wrote:
>> Hi Greg,
>>
>> On 3/1/2022 3:58 PM, Sandeep Maheswaram wrote:
>>> changes in v2:
>>> Added a PATCH 2/3 to remove unwanted header inclusion.
>>> Fixed minor nitpicks in PATCH 3/3.
>>>
>>> Pavankumar Kondeti (1):
>>> usb: xhci: refactor quirks and plat private data
>>>
>>> Sandeep Maheswaram (2):
>>> usb: xhci: Remove unwanted header inclusion
>>> usb: dwc: host: add xhci_plat_priv quirk XHCI_SKIP_PHY_INIT
>>>
>>> drivers/usb/cdns3/host.c | 2 +-
>>> drivers/usb/dwc3/host.c | 13 ++++++++
>>> drivers/usb/host/xhci-plat.c | 3 +-
>>> drivers/usb/host/xhci-plat.h | 24 ---------------
>>> drivers/usb/host/xhci-rcar.c | 3 +-
>>> drivers/usb/host/xhci.h | 60 ++++--------------------------------
>>> include/linux/usb/xhci-plat.h | 24 +++++++++++++++
>>> include/linux/usb/xhci-quirks.h | 67 +++++++++++++++++++++++++++++++++++++++++
>>> 8 files changed, 115 insertions(+), 81 deletions(-)
>>> delete mode 100644 drivers/usb/host/xhci-plat.h
>>> create mode 100644 include/linux/usb/xhci-plat.h
>>> create mode 100644 include/linux/usb/xhci-quirks.h
>> Please let me know your opinion about this patch series.
> I need the xhci maintainer to review it...
>
> thanks,
>
> greg k-h


Can you please review this patch series.

Regards

Sandeep

2022-03-22 21:54:59

by Mathias Nyman

[permalink] [raw]
Subject: Re: [PATCH v2 0/3] Refactor xhci quirks and plat private data

On 21.3.2022 8.21, Sandeep Maheswaram (Temp) wrote:
> Hi Mathias,
>
> On 3/18/2022 5:29 PM, Greg Kroah-Hartman wrote:
>> On Thu, Mar 17, 2022 at 11:17:17AM +0530, Sandeep Maheswaram (Temp) wrote:
>>> Hi Greg,
>>>
>>> On 3/1/2022 3:58 PM, Sandeep Maheswaram wrote:
>>>> changes in v2:
>>>> Added a PATCH 2/3 to remove unwanted header inclusion.
>>>> Fixed minor nitpicks in PATCH 3/3.
>>>>
>>>> Pavankumar Kondeti (1):
>>>>     usb: xhci: refactor quirks and plat private data
>>>>
>>>> Sandeep Maheswaram (2):
>>>>     usb: xhci: Remove unwanted header inclusion
>>>>     usb: dwc: host: add xhci_plat_priv quirk XHCI_SKIP_PHY_INIT
>>>>
>>>>    drivers/usb/cdns3/host.c        |  2 +-
>>>>    drivers/usb/dwc3/host.c         | 13 ++++++++
>>>>    drivers/usb/host/xhci-plat.c    |  3 +-
>>>>    drivers/usb/host/xhci-plat.h    | 24 ---------------
>>>>    drivers/usb/host/xhci-rcar.c    |  3 +-
>>>>    drivers/usb/host/xhci.h         | 60 ++++--------------------------------
>>>>    include/linux/usb/xhci-plat.h   | 24 +++++++++++++++
>>>>    include/linux/usb/xhci-quirks.h | 67 +++++++++++++++++++++++++++++++++++++++++
>>>>    8 files changed, 115 insertions(+), 81 deletions(-)
>>>>    delete mode 100644 drivers/usb/host/xhci-plat.h
>>>>    create mode 100644 include/linux/usb/xhci-plat.h
>>>>    create mode 100644 include/linux/usb/xhci-quirks.h
>>> Please let me know your opinion about this patch series.
>> I need the xhci maintainer to review it...
>>
>> thanks,
>>
>> greg k-h
>
>
> Can you please review this patch series.
>

I don't have a better solution than this.

So neither devicetree or ACPI entries exists for the xHC part of this dwc3 controller?

A pure platform device is created, and it matches and binds to xhci-plat driver by "xhci-hcd" name.
I guess we have no way to identify this dwc3 xhci controller in xhci-plat.c, and set quirks there,
like all those devicetree xhci devices that we set quirks based on .compatibility.

Thanks
Mathias

2022-03-25 18:18:05

by Pavan Kondeti

[permalink] [raw]
Subject: Re: [PATCH v2 0/3] Refactor xhci quirks and plat private data

Hi Mathias,

On Tue, Mar 22, 2022 at 05:53:42PM +0200, Mathias Nyman wrote:
> On 21.3.2022 8.21, Sandeep Maheswaram (Temp) wrote:
> > Hi Mathias,
> >
> > On 3/18/2022 5:29 PM, Greg Kroah-Hartman wrote:
> >> On Thu, Mar 17, 2022 at 11:17:17AM +0530, Sandeep Maheswaram (Temp) wrote:
> >>> Hi Greg,
> >>>
> >>> On 3/1/2022 3:58 PM, Sandeep Maheswaram wrote:
> >>>> changes in v2:
> >>>> Added a PATCH 2/3 to remove unwanted header inclusion.
> >>>> Fixed minor nitpicks in PATCH 3/3.
> >>>>
> >>>> Pavankumar Kondeti (1):
> >>>> ??? usb: xhci: refactor quirks and plat private data
> >>>>
> >>>> Sandeep Maheswaram (2):
> >>>> ??? usb: xhci: Remove unwanted header inclusion
> >>>> ??? usb: dwc: host: add xhci_plat_priv quirk XHCI_SKIP_PHY_INIT
> >>>>
> >>>> ?? drivers/usb/cdns3/host.c??????? |? 2 +-
> >>>> ?? drivers/usb/dwc3/host.c???????? | 13 ++++++++
> >>>> ?? drivers/usb/host/xhci-plat.c??? |? 3 +-
> >>>> ?? drivers/usb/host/xhci-plat.h??? | 24 ---------------
> >>>> ?? drivers/usb/host/xhci-rcar.c??? |? 3 +-
> >>>> ?? drivers/usb/host/xhci.h???????? | 60 ++++--------------------------------
> >>>> ?? include/linux/usb/xhci-plat.h?? | 24 +++++++++++++++
> >>>> ?? include/linux/usb/xhci-quirks.h | 67 +++++++++++++++++++++++++++++++++++++++++
> >>>> ?? 8 files changed, 115 insertions(+), 81 deletions(-)
> >>>> ?? delete mode 100644 drivers/usb/host/xhci-plat.h
> >>>> ?? create mode 100644 include/linux/usb/xhci-plat.h
> >>>> ?? create mode 100644 include/linux/usb/xhci-quirks.h
> >>> Please let me know your opinion about this patch series.
> >> I need the xhci maintainer to review it...
> >>
> >> thanks,
> >>
> >> greg k-h
> >
> >
> > Can you please review this patch series.
> >
>
> I don't have a better solution than this.
>
> So neither devicetree or ACPI entries exists for the xHC part of this dwc3 controller?
>
> A pure platform device is created, and it matches and binds to xhci-plat driver by "xhci-hcd" name.
> I guess we have no way to identify this dwc3 xhci controller in xhci-plat.c, and set quirks there,
> like all those devicetree xhci devices that we set quirks based on .compatibility.
>
Thanks for the review. Yes, xhci-plat platform device is created by the DWC3
driver for the controllers that needs to be operated in the host.

Thanks,
Pavan