2022-12-12 09:34:34

by Patrice CHOTARD

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Subject: [PATCH 0/4] Fix qspi pinctrl phandle for stm3mp15 based boards

From: Patrice Chotard <[email protected]>

qspi_bk1_pins_a and qspi_bk2_pins_a pinctrl phandle has been splitted in
2 parts. Only stm32mp157c-ev1.dts has been updated properly.

Fix qspi pinctrl phandle for other boards which are based on stm32mp15x SoC.

Patrice Chotard (4):
ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcor-som
ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcom-som
ARM: dts: stm32: Fix qspi pinctrl phandle for
stm32mp157c-emstamp-argon
ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp151a-prtt1l

Cc: Marek Vasut <[email protected]>
Cc: Alexandre Torgue <[email protected]>
Cc: Reinhold Mueller <[email protected]>
Cc: Oleksij Rempel <[email protected]>
Cc: [email protected]
To: [email protected]

arch/arm/boot/dts/stm32mp151a-prtt1l.dtsi | 8 ++++++--
arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi | 8 ++++++--
arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi | 8 ++++++--
arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi | 8 ++++++--
4 files changed, 24 insertions(+), 8 deletions(-)

--
2.25.1


2022-12-12 09:46:55

by Patrice CHOTARD

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Subject: [PATCH 1/4] ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcor-som

From: Patrice Chotard <[email protected]>

Chip select pinctrl phandle was missing in several stm32mp15x based boards.

Fixes: ea99a5a02ebc ("ARM: dts: stm32: Create separate pinmux for qspi cs pin in stm32mp15-pinctrl.dtsi)

Signed-off-by: Patrice Chotard <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Alexandre Torgue <[email protected]>
Cc: [email protected]
To: [email protected]
---
arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
index 134a798ad3f2..bb40fb46da81 100644
--- a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
+++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
@@ -247,8 +247,12 @@ &pwr_regulators {

&qspi {
pinctrl-names = "default", "sleep";
- pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
- pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
+ pinctrl-0 = <&qspi_clk_pins_a
+ &qspi_bk1_pins_a
+ &qspi_cs1_pins_a>;
+ pinctrl-1 = <&qspi_clk_sleep_pins_a
+ &qspi_bk1_sleep_pins_a
+ &qspi_cs1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
#address-cells = <1>;
#size-cells = <0>;
--
2.25.1

2022-12-12 10:09:53

by Patrice CHOTARD

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Subject: [PATCH 2/4] ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcom-som

From: Patrice Chotard <[email protected]>

Chip select pinctrl phandle was missing in several stm32mp15x based boards.

Fixes: ea99a5a02ebc ("ARM: dts: stm32: Create separate pinmux for qspi cs pin in stm32mp15-pinctrl.dtsi)

Signed-off-by: Patrice Chotard <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Alexandre Torgue <[email protected]>
Cc: [email protected]
To: [email protected]
---
arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
index 238a611192e7..d3b85a8764d7 100644
--- a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
+++ b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
@@ -428,8 +428,12 @@ &pwr_regulators {

&qspi {
pinctrl-names = "default", "sleep";
- pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
- pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
+ pinctrl-0 = <&qspi_clk_pins_a
+ &qspi_bk1_pins_a
+ &qspi_cs1_pins_a>;
+ pinctrl-1 = <&qspi_clk_sleep_pins_a
+ &qspi_bk1_sleep_pins_a
+ &qspi_cs1_sleep_pins_a>;
reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
#address-cells = <1>;
#size-cells = <0>;
--
2.25.1

2022-12-12 13:14:21

by Marek Vasut

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Subject: Re: [PATCH 0/4] Fix qspi pinctrl phandle for stm3mp15 based boards

On 12/12/22 09:51, [email protected] wrote:
> From: Patrice Chotard <[email protected]>
>
> qspi_bk1_pins_a and qspi_bk2_pins_a pinctrl phandle has been splitted in
> 2 parts. Only stm32mp157c-ev1.dts has been updated properly.
>
> Fix qspi pinctrl phandle for other boards which are based on stm32mp15x SoC.

Typo in $SUBJECT, s@stm3mp@stm32mp@ . That's in all the patches.

2022-12-12 14:20:03

by Marek Vasut

[permalink] [raw]
Subject: Re: [PATCH 1/4] ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcor-som

On 12/12/22 09:51, [email protected] wrote:
> From: Patrice Chotard <[email protected]>
>
> Chip select pinctrl phandle was missing in several stm32mp15x based boards.
>
> Fixes: ea99a5a02ebc ("ARM: dts: stm32: Create separate pinmux for qspi cs pin in stm32mp15-pinctrl.dtsi)
>
> Signed-off-by: Patrice Chotard <[email protected]>
> Cc: Marek Vasut <[email protected]>
> Cc: Alexandre Torgue <[email protected]>
> Cc: [email protected]
> To: [email protected]
> ---
> arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
> index 134a798ad3f2..bb40fb46da81 100644
> --- a/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
> +++ b/arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
> @@ -247,8 +247,12 @@ &pwr_regulators {
>
> &qspi {
> pinctrl-names = "default", "sleep";
> - pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
> - pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
> + pinctrl-0 = <&qspi_clk_pins_a
> + &qspi_bk1_pins_a
> + &qspi_cs1_pins_a>;
> + pinctrl-1 = <&qspi_clk_sleep_pins_a
> + &qspi_bk1_sleep_pins_a
> + &qspi_cs1_sleep_pins_a>;
> reg = <0x58003000 0x1000>, <0x70000000 0x200000>;
> #address-cells = <1>;
> #size-cells = <0>;


Splitting the pins makes sense indeed.

Reviewed-by: Marek Vasut <[email protected]>

2022-12-12 14:30:57

by Marek Vasut

[permalink] [raw]
Subject: Re: [PATCH 2/4] ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcom-som

On 12/12/22 09:51, [email protected] wrote:
> From: Patrice Chotard <[email protected]>
>
> Chip select pinctrl phandle was missing in several stm32mp15x based boards.
>
> Fixes: ea99a5a02ebc ("ARM: dts: stm32: Create separate pinmux for qspi cs pin in stm32mp15-pinctrl.dtsi)
>
> Signed-off-by: Patrice Chotard <[email protected]>
> Cc: Marek Vasut <[email protected]>
> Cc: Alexandre Torgue <[email protected]>
> Cc: [email protected]
> To: [email protected]
> ---
> arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi | 8 ++++++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
> index 238a611192e7..d3b85a8764d7 100644
> --- a/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
> +++ b/arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
> @@ -428,8 +428,12 @@ &pwr_regulators {
>
> &qspi {
> pinctrl-names = "default", "sleep";
> - pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
> - pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
> + pinctrl-0 = <&qspi_clk_pins_a
> + &qspi_bk1_pins_a
> + &qspi_cs1_pins_a>;
> + pinctrl-1 = <&qspi_clk_sleep_pins_a
> + &qspi_bk1_sleep_pins_a
> + &qspi_cs1_sleep_pins_a>;
> reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
> #address-cells = <1>;
> #size-cells = <0>;

Splitting the pins makes sense indeed.

Reviewed-by: Marek Vasut <[email protected]>

2023-01-09 16:38:54

by Alexandre TORGUE

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Subject: Re: [PATCH 0/4] Fix qspi pinctrl phandle for stm3mp15 based boards

Hi Patrice

On 12/12/22 09:51, [email protected] wrote:
> From: Patrice Chotard <[email protected]>
>
> qspi_bk1_pins_a and qspi_bk2_pins_a pinctrl phandle has been splitted in
> 2 parts. Only stm32mp157c-ev1.dts has been updated properly.
>
> Fix qspi pinctrl phandle for other boards which are based on stm32mp15x SoC.
>
> Patrice Chotard (4):
> ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcor-som
> ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp15xx-dhcom-som
> ARM: dts: stm32: Fix qspi pinctrl phandle for
> stm32mp157c-emstamp-argon
> ARM: dts: stm32: Fix qspi pinctrl phandle for stm32mp151a-prtt1l
>
> Cc: Marek Vasut <[email protected]>
> Cc: Alexandre Torgue <[email protected]>
> Cc: Reinhold Mueller <[email protected]>
> Cc: Oleksij Rempel <[email protected]>
> Cc: [email protected]
> To: [email protected]
>
> arch/arm/boot/dts/stm32mp151a-prtt1l.dtsi | 8 ++++++--
> arch/arm/boot/dts/stm32mp157c-emstamp-argon.dtsi | 8 ++++++--
> arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi | 8 ++++++--
> arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi | 8 ++++++--
> 4 files changed, 24 insertions(+), 8 deletions(-)
>

Series applied on stm32-fixes.

Regards
Alex