From: Elad Nachman <[email protected]>
Add support for CN9130 and CN9131 COM Express Type 7 CPU
module boards by Marvell.
Define these COM Express CPU modules as dtsi, and
provide a dts file for a carrier board (Marvell AC5X RD
COM Express type 7 carrier board).
This Carrier board only utilizes the PCIe link, hence no
special device / driver support is provided by this dts file.
v3:
1) Remove acronym which creates warnings for checkpatch.pl
2) Correct compatibility string for ac5x rd board
3) Add above compatibility string to dt bindings
4) update MAINTAINERS file with ac5 series dts files
5) remove memory property from carrier dts
6) add comment explaining that OOB RGMII ethernet port
connector and PHY are both on CPU module
v2:
1) add compatibility string for the board
2) remove unneeded hard-coded PHY LED blinking mode initialization
3) Split the CPU portion of the carrier board to
dtsi files, and define a dts file for the AC5X RD
carrier board.
Elad Nachman (3):
arm64: dts: cn913x: add device trees for COM Express boards
dt-bindings: arm64: dts: add dt-bindings for ac5x rd carrier
MAINTAINERS: add ac5 to list of maintained Marvell dts files
.../bindings/arm/marvell/armada-7k-8k.yaml | 8 ++
MAINTAINERS | 1 +
arch/arm64/boot/dts/marvell/Makefile | 1 +
.../boot/dts/marvell/ac5x_rd_carrier.dts | 23 ++++
.../dts/marvell/cn9130-db-comexpress.dtsi | 101 ++++++++++++++++
.../dts/marvell/cn9131-db-comexpress.dtsi | 113 ++++++++++++++++++
6 files changed, 247 insertions(+)
create mode 100644 arch/arm64/boot/dts/marvell/ac5x_rd_carrier.dts
create mode 100644 arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi
--
2.25.1
From: Elad Nachman <[email protected]>
Add ac5 dts files to the list of maintained Marvell Armada dts files
Signed-off-by: Elad Nachman <[email protected]>
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2d13bbd69adb..0d9b8cace1de 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2323,6 +2323,7 @@ F: arch/arm/boot/dts/marvell/armada*
F: arch/arm/boot/dts/marvell/kirkwood*
F: arch/arm/configs/mvebu_*_defconfig
F: arch/arm/mach-mvebu/
+F: arch/arm64/boot/dts/marvell/ac5*
F: arch/arm64/boot/dts/marvell/armada*
F: arch/arm64/boot/dts/marvell/cn913*
F: drivers/clk/mvebu/
--
2.25.1
From: Elad Nachman <[email protected]>
Add dt bindings for AC5X RD COM Express Type 7 carrier board.
This board will Accept a CN9131 COM Express Type 7 CPU module.
Signed-off-by: Elad Nachman <[email protected]>
---
.../devicetree/bindings/arm/marvell/armada-7k-8k.yaml | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
index 52d78521e412..71bc94047d1b 100644
--- a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
+++ b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
@@ -60,4 +60,12 @@ properties:
- const: marvell,armada-ap807-quad
- const: marvell,armada-ap807
+ - description: AC5X RD COM Express Carrier for Armada CN9131 SoC with one external CP
+ items:
+ - const: marvell,ac5x_rd_carrier
+ - const: marvell,cn9131
+ - const: marvell,cn9130
+ - const: marvell,armada-ap807-quad
+ - const: marvell,armada-ap807
+
additionalProperties: true
--
2.25.1
From: Elad Nachman <[email protected]>
Add support for CN9130 and CN9131 COM Express Type 7 CPU
module boards by Marvell.
Define these COM Express CPU modules as dtsi, and
provide a dts file for a carrier board (Marvell AC5X RD
COM Express type 7 carrier board).
This Carrier board only utilizes the PCIe link, hence no
special device / driver support is provided by this dts file.
These boards differ from the existing CN913x DB boards by the type
of ethernet connection (RGMII), the type of voltage regulators
(not i2c expander based) and the USB phy (not UTMI based).
Note - PHY + RGMII connector is OOB on CPU module.
CN9131 COM Express board is basically CN9130 COM Express board
with an additional CP115 I/O co-processor, which in this case
provides an additional USB host controller on the board.
Signed-off-by: Elad Nachman <[email protected]>
---
arch/arm64/boot/dts/marvell/Makefile | 1 +
.../boot/dts/marvell/ac5x_rd_carrier.dts | 18 +++
.../dts/marvell/cn9130-db-comexpress.dtsi | 101 ++++++++++++++++
.../dts/marvell/cn9131-db-comexpress.dtsi | 113 ++++++++++++++++++
4 files changed, 233 insertions(+)
create mode 100644 arch/arm64/boot/dts/marvell/ac5x_rd_carrier.dts
create mode 100644 arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dtsi
create mode 100644 arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi
diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
index 79ac09b58a89..b0a2347200ef 100644
--- a/arch/arm64/boot/dts/marvell/Makefile
+++ b/arch/arm64/boot/dts/marvell/Makefile
@@ -26,4 +26,5 @@ dtb-$(CONFIG_ARCH_MVEBU) += cn9132-db.dtb
dtb-$(CONFIG_ARCH_MVEBU) += cn9132-db-B.dtb
dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-A.dtb
dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-B.dtb
+dtb-$(CONFIG_ARCH_MVEBU) += ac5x_rd_carrier.dtb
dtb-$(CONFIG_ARCH_MVEBU) += ac5-98dx35xx-rd.dtb
diff --git a/arch/arm64/boot/dts/marvell/ac5x_rd_carrier.dts b/arch/arm64/boot/dts/marvell/ac5x_rd_carrier.dts
new file mode 100644
index 000000000000..d88aed241bfa
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/ac5x_rd_carrier.dts
@@ -0,0 +1,18 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 Marvell International Ltd.
+ *
+ * Device tree for the AC5X RD Type 7 Com Express carrier board,
+ * Utilizing the CN913x COM Express CPU module board.
+ * This specific board only maintains a PCIe link with the CPU CPU module
+ * module, which does not require any special DTS definitions.
+ */
+
+#include "cn9131-db-comexpress.dtsi"
+
+/ {
+ model = "Marvell Armada AC5X RD COM EXPRESS type 7 carrier board";
+ compatible = "marvell,ac5x_rd_carrier", "marvell,cn9131", "marvell,cn9130",
+ "marvell,armada-ap807-quad", "marvell,armada-ap807";
+
+};
diff --git a/arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dtsi b/arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dtsi
new file mode 100644
index 000000000000..641116dc85df
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dtsi
@@ -0,0 +1,101 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 Marvell International Ltd.
+ *
+ * Device tree for the CN9130-DB Com Express CPU module board.
+ */
+
+#include "cn9130-db.dtsi"
+
+/ {
+ model = "Marvell Armada CN9130-DB COM EXPRESS type 7 CPU module board";
+ compatible = "marvell,cn9130",
+ "marvell,armada-ap807-quad", "marvell,armada-ap807";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x2 0x00000000>;
+ };
+
+};
+
+&ap0_reg_sd_vccq {
+ regulator-max-microvolt = <1800000>;
+ states = <1800000 0x1 1800000 0x0>;
+ /delete-property/ gpios;
+};
+
+&cp0_reg_usb3_vbus0 {
+ /delete-property/ gpio;
+};
+
+&cp0_reg_usb3_vbus1 {
+ /delete-property/ gpio;
+};
+
+&cp0_reg_sd_vcc {
+ status = "disabled";
+};
+
+&cp0_reg_sd_vccq {
+ status = "disabled";
+};
+
+&cp0_sdhci0 {
+ status = "disabled";
+};
+
+&cp0_eth0 {
+ status = "disabled";
+};
+
+&cp0_eth1 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+};
+
+&cp0_eth2 {
+ status = "disabled";
+};
+
+&cp0_mdio {
+ status = "okay";
+ pinctrl-0 = <&cp0_ge_mdio_pins>;
+ phy0: ethernet-phy@0 {
+ status = "okay";
+ };
+};
+
+&cp0_syscon0 {
+ cp0_pinctrl: pinctrl {
+ compatible = "marvell,cp115-standalone-pinctrl";
+
+ cp0_ge_mdio_pins: ge-mdio-pins {
+ marvell,pins = "mpp40", "mpp41";
+ marvell,function = "ge";
+ };
+ };
+};
+
+&cp0_sdhci0 {
+ status = "disabled";
+};
+
+&cp0_spi1 {
+ status = "okay";
+};
+
+&cp0_usb3_0 {
+ status = "okay";
+ usb-phy = <&cp0_usb3_0_phy0>;
+ phy-names = "usb";
+ /delete-property/ phys;
+};
+
+&cp0_usb3_1 {
+ status = "okay";
+ usb-phy = <&cp0_usb3_0_phy1>;
+ phy-names = "usb";
+ /delete-property/ phys;
+};
diff --git a/arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi b/arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi
new file mode 100644
index 000000000000..5e8312c58b47
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dtsi
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 Marvell International Ltd.
+ *
+ * Device tree for the CN9131-DB Com Express CPU module board.
+ */
+
+#include "cn9131-db.dtsi"
+
+/ {
+ model = "Marvell Armada CN9131-DB COM EXPRESS type 7 CPU module board";
+ compatible = "marvell,cn9131", "marvell,cn9130",
+ "marvell,armada-ap807-quad", "marvell,armada-ap807";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x2 0x00000000>;
+ };
+
+};
+
+&ap0_reg_sd_vccq {
+ regulator-max-microvolt = <1800000>;
+ states = <1800000 0x1 1800000 0x0>;
+ /delete-property/ gpios;
+};
+
+&cp0_reg_usb3_vbus0 {
+ /delete-property/ gpio;
+};
+
+&cp0_reg_usb3_vbus1 {
+ /delete-property/ gpio;
+};
+
+&cp1_reg_usb3_vbus0 {
+ /delete-property/ gpio;
+};
+
+&cp0_reg_sd_vcc {
+ status = "disabled";
+};
+
+&cp0_reg_sd_vccq {
+ status = "disabled";
+};
+
+&cp0_sdhci0 {
+ status = "disabled";
+};
+
+&cp0_eth0 {
+ status = "disabled";
+};
+
+&cp0_eth1 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+};
+
+&cp0_eth2 {
+ status = "disabled";
+};
+
+&cp0_mdio {
+ status = "okay";
+ pinctrl-0 = <&cp0_ge_mdio_pins>;
+ phy0: ethernet-phy@0 {
+ status = "okay";
+ };
+};
+
+&cp0_syscon0 {
+ cp0_pinctrl: pinctrl {
+ compatible = "marvell,cp115-standalone-pinctrl";
+
+ cp0_ge_mdio_pins: ge-mdio-pins {
+ marvell,pins = "mpp40", "mpp41";
+ marvell,function = "ge";
+ };
+ };
+};
+
+&cp0_sdhci0 {
+ status = "disabled";
+};
+
+&cp0_spi1 {
+ status = "okay";
+};
+
+&cp0_usb3_0 {
+ status = "okay";
+ usb-phy = <&cp0_usb3_0_phy0>;
+ phy-names = "usb";
+ /delete-property/ phys;
+};
+
+&cp0_usb3_1 {
+ status = "okay";
+ usb-phy = <&cp0_usb3_0_phy1>;
+ phy-names = "usb";
+ /delete-property/ phys;
+};
+
+&cp1_usb3_1 {
+ status = "okay";
+ usb-phy = <&cp1_usb3_0_phy0>;
+ /* Generic PHY, providing serdes lanes */
+ phys = <&cp1_comphy3 1>;
+ phy-names = "usb";
+};
--
2.25.1
On Thu, Oct 26, 2023 at 11:47:34AM +0300, Elad Nachman wrote:
> From: Elad Nachman <[email protected]>
>
> Add dt bindings for AC5X RD COM Express Type 7 carrier board.
> This board will Accept a CN9131 COM Express Type 7 CPU module.
>
> Signed-off-by: Elad Nachman <[email protected]>
Acked-by: Conor Dooley <[email protected]>
Thanks,
Conor.
> ---
> .../devicetree/bindings/arm/marvell/armada-7k-8k.yaml | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
> index 52d78521e412..71bc94047d1b 100644
> --- a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
> +++ b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
> @@ -60,4 +60,12 @@ properties:
> - const: marvell,armada-ap807-quad
> - const: marvell,armada-ap807
>
> + - description: AC5X RD COM Express Carrier for Armada CN9131 SoC with one external CP
> + items:
> + - const: marvell,ac5x_rd_carrier
> + - const: marvell,cn9131
> + - const: marvell,cn9130
> + - const: marvell,armada-ap807-quad
> + - const: marvell,armada-ap807
> +
> additionalProperties: true
> --
> 2.25.1
>
> +#include "cn9131-db-comexpress.dtsi"
> +
> +/ {
> + model = "Marvell Armada AC5X RD COM EXPRESS type 7 carrier board";
> + compatible = "marvell,ac5x_rd_carrier", "marvell,cn9131", "marvell,cn9130",
> + "marvell,armada-ap807-quad", "marvell,armada-ap807";
This is really a question to the DT Maintainers. This is a carrier
board for a standardised Com express type 7 board. In theory, you
should be able to plug any Com Express module into it, not just
Marvells. So should the compatible list just have a compatible for the
carrier itself? Not the module which would normally be mounted in it?
Should the carrier have a .dtsi file describing it? And then we have a
.dts file which combines the module .dtsi and the carrier .dtsi?
Sorry i did not ask this earlier, i was thinking more about SolidRuns
systems, which tend to have custom SOMs and customs carriers, so you
can only really mount one particular SOM into one particular
carrier. But that is not true here.
Andrew
On Thu, Oct 26, 2023 at 11:47:34AM +0300, Elad Nachman wrote:
> From: Elad Nachman <[email protected]>
>
> Add dt bindings for AC5X RD COM Express Type 7 carrier board.
> This board will Accept a CN9131 COM Express Type 7 CPU module.
>
> Signed-off-by: Elad Nachman <[email protected]>
> ---
> .../devicetree/bindings/arm/marvell/armada-7k-8k.yaml | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
> index 52d78521e412..71bc94047d1b 100644
> --- a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
> +++ b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
> @@ -60,4 +60,12 @@ properties:
> - const: marvell,armada-ap807-quad
> - const: marvell,armada-ap807
>
> + - description: AC5X RD COM Express Carrier for Armada CN9131 SoC with one external CP
This description is i think technically wrong. You have the
combination of the carrier and the module.
> + items:
> + - const: marvell,ac5x_rd_carrier
> + - const: marvell,cn9131
> + - const: marvell,cn9130
> + - const: marvell,armada-ap807-quad
> + - const: marvell,armada-ap807
Andrew
On 26/10/2023 10:47, Elad Nachman wrote:
> From: Elad Nachman <[email protected]>
>
> Add dt bindings for AC5X RD COM Express Type 7 carrier board.
> This board will Accept a CN9131 COM Express Type 7 CPU module.
>
> Signed-off-by: Elad Nachman <[email protected]>
> ---
> .../devicetree/bindings/arm/marvell/armada-7k-8k.yaml | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
> index 52d78521e412..71bc94047d1b 100644
> --- a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
> +++ b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
> @@ -60,4 +60,12 @@ properties:
> - const: marvell,armada-ap807-quad
> - const: marvell,armada-ap807
>
> + - description: AC5X RD COM Express Carrier for Armada CN9131 SoC with one external CP
> + items:
> + - const: marvell,ac5x_rd_carrier
No underscores in compatibles. Do you see them anywhere? Please use
existing, recent code as start of your contributions, not something
buggy 5 years old.
Best regards,
Krzysztof
On 26/10/2023 19:32, Andrew Lunn wrote:
>> +#include "cn9131-db-comexpress.dtsi"
>> +
>> +/ {
>> + model = "Marvell Armada AC5X RD COM EXPRESS type 7 carrier board";
>> + compatible = "marvell,ac5x_rd_carrier", "marvell,cn9131", "marvell,cn9130",
Except wrong naming for compatible, I really do not understand what you
want to add here. If AC5X is the carrier, what is the model name of
entire product? If AC5X is not the carrier, where it the carrier?
>> + "marvell,armada-ap807-quad", "marvell,armada-ap807";
>
> This is really a question to the DT Maintainers. This is a carrier
> board for a standardised Com express type 7 board. In theory, you
> should be able to plug any Com Express module into it, not just
> Marvells. So should the compatible list just have a compatible for the
> carrier itself? Not the module which would normally be mounted in it?
Yes, because there are some common parts of the carrier board.
>
> Should the carrier have a .dtsi file describing it? And then we have a
> .dts file which combines the module .dtsi and the carrier .dtsi?
Depends, how this is organized depends on possible re-usage etc. Usually
answer is: yes, carrier board should have DTSI.
>
> Sorry i did not ask this earlier, i was thinking more about SolidRuns
> systems, which tend to have custom SOMs and customs carriers, so you
> can only really mount one particular SOM into one particular
> carrier. But that is not true here.
Best regards,
Krzysztof
On 26/10/2023 10:47, Elad Nachman wrote:
> From: Elad Nachman <[email protected]>
>
> Add dt bindings for AC5X RD COM Express Type 7 carrier board.
> This board will Accept a CN9131 COM Express Type 7 CPU module.
>
> Signed-off-by: Elad Nachman <[email protected]>
Please order your patches correctly, so bindings come before their
users. You cannot have other way.
> ---
> .../devicetree/bindings/arm/marvell/armada-7k-8k.yaml | 8 ++++++++
> 1 file changed, 8 insertions(+)
Best regards,
Krzysztof
On Fri, Oct 27, 2023 at 01:09:58PM +0200, Krzysztof Kozlowski wrote:
> On 26/10/2023 10:47, Elad Nachman wrote:
> > From: Elad Nachman <[email protected]>
> >
> > Add dt bindings for AC5X RD COM Express Type 7 carrier board.
> > This board will Accept a CN9131 COM Express Type 7 CPU module.
> >
> > Signed-off-by: Elad Nachman <[email protected]>
> > ---
> > .../devicetree/bindings/arm/marvell/armada-7k-8k.yaml | 8 ++++++++
> > 1 file changed, 8 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
> > index 52d78521e412..71bc94047d1b 100644
> > --- a/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
> > +++ b/Documentation/devicetree/bindings/arm/marvell/armada-7k-8k.yaml
> > @@ -60,4 +60,12 @@ properties:
> > - const: marvell,armada-ap807-quad
> > - const: marvell,armada-ap807
> >
> > + - description: AC5X RD COM Express Carrier for Armada CN9131 SoC with one external CP
> > + items:
> > + - const: marvell,ac5x_rd_carrier
>
> No underscores in compatibles.
Oh shit, I didn't notice that somehow. Un-acked until that's removed.
> Do you see them anywhere? Please use
> existing, recent code as start of your contributions, not something
> buggy 5 years old.
>
> Best regards,
> Krzysztof
>
> > No underscores in compatibles.
>
> Oh shit, I didn't notice that somehow. Un-acked until that's removed.
Not a problem. Its way too late for this merge window. The pull
request for Marvell stuff has already been sent to arm-soc. There is
plenty of time to fix this, and there are other problems to address as
well.
Andrew