This set of patches was created with the intention of cleaning up
arch/mips/boot/dts/ralink/mt7621.dtsi so that it is aligned with
the Devicetree Sources (DTS) Coding Style [1] [2] guide.
[1] Documentation/devicetree/bindings/dts-coding-style.rst
[2] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
Justin Swartz (14):
mips: dts: ralink: mt7621: reorder cpu node attributes
mips: dts: ralink: mt7621: reorder cpuintc node attributes
mips: dts: ralink: mt7621: reorder mmc regulator attributes
mips: dts: ralink: mt7621: reorder sysc node attributes
mips: dts: ralink: mt7621: reorder gpio node attributes
mips: dts: ralink: mt7621: reorder i2c node attributes
mips: dts: ralink: mt7621: reorder spi0 node attributes
mips: dts: ralink: mt7621: move pinctrl and sort its children
mips: dts: ralink: mt7621: reorder mmc node attributes
mips: dts: ralink: mt7621: reorder gic node attributes
mips: dts: ralink: mt7621: reorder ethernet node attributes and kids
mips: dts: ralink: mt7621: reorder pcie node attributes and children
mips: dts: ralink: mt7621: reorder pci?_phy attributes
mips: dts: ralink: mt7621: reorder the attributes of the root node
arch/mips/boot/dts/ralink/mt7621.dtsi | 430 ++++++++++++++------------
1 file changed, 239 insertions(+), 191 deletions(-)
--
Reorder cpu node attributes to fit the DTS Coding Style.
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 6e95e6f19..73dad64e1 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -14,15 +14,15 @@ cpus {
#size-cells = <0>;
cpu@0 {
- device_type = "cpu";
compatible = "mips,mips1004Kc";
reg = <0>;
+ device_type = "cpu";
};
cpu@1 {
- device_type = "cpu";
compatible = "mips,mips1004Kc";
reg = <1>;
+ device_type = "cpu";
};
};
--
Reorder the CPU Interrupt Controller node's attributes to follow
what the DTS Coding Style dictates.
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 73dad64e1..ec87e46ba 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -27,10 +27,12 @@ cpu@1 {
};
cpuintc: cpuintc {
+ compatible = "mti,cpu-interrupt-controller";
+
#address-cells = <0>;
#interrupt-cells = <1>;
+
interrupt-controller;
- compatible = "mti,cpu-interrupt-controller";
};
mmc_fixed_3v3: regulator-3v3 {
--
Reorder the attributes of the sysc node so that the
ralink prefixed attribute is placed after those which lack
prefixes.
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 696460b2d..d1d4399d7 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -68,12 +68,15 @@ palmbus: palmbus@1e000000 {
sysc: syscon@0 {
compatible = "mediatek,mt7621-sysc", "syscon";
reg = <0x0 0x100>;
+
#clock-cells = <1>;
#reset-cells = <1>;
- ralink,memctl = <&memc>;
+
clock-output-names = "xtal", "cpu", "bus",
"50m", "125m", "150m",
"250m", "270m";
+
+ ralink,memctl = <&memc>;
};
wdt: watchdog@100 {
--
Reorder the attributes of MMC fixed voltage regulator nodes
for the sake of compliance with the DTS style guide.
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 16 ++++++++++------
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index ec87e46ba..696460b2d 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -37,20 +37,24 @@ cpuintc: cpuintc {
mmc_fixed_3v3: regulator-3v3 {
compatible = "regulator-fixed";
- regulator-name = "mmc_power";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
+
enable-active-high;
+
regulator-always-on;
+ regulator-max-microvolt = <3300000>;
+ regulator-min-microvolt = <3300000>;
+ regulator-name = "mmc_power";
};
mmc_fixed_1v8_io: regulator-1v8 {
compatible = "regulator-fixed";
- regulator-name = "mmc_io";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
+
enable-active-high;
+
regulator-always-on;
+ regulator-max-microvolt = <1800000>;
+ regulator-min-microvolt = <1800000>;
+ regulator-name = "mmc_io";
};
palmbus: palmbus@1e000000 {
--
Shuffle the attributes of the gpio node to appease the DTS
style guide.
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index d1d4399d7..99d47f286 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -86,13 +86,16 @@ wdt: watchdog@100 {
};
gpio: gpio@600 {
+ compatible = "mediatek,mt7621-gpio";
+ reg = <0x600 0x100>;
+
#gpio-cells = <2>;
#interrupt-cells = <2>;
- compatible = "mediatek,mt7621-gpio";
+
gpio-controller;
gpio-ranges = <&pinctrl 0 0 95>;
+
interrupt-controller;
- reg = <0x600 0x100>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 12 IRQ_TYPE_LEVEL_HIGH>;
};
--
Rearrange the order of the i2c node's attributes so that they
are inline with the DTS style guide.
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 99d47f286..87a3bcbc0 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -104,18 +104,19 @@ i2c: i2c@900 {
compatible = "mediatek,mt7621-i2c";
reg = <0x900 0x100>;
- clocks = <&sysc MT7621_CLK_I2C>;
- clock-names = "i2c";
- resets = <&sysc MT7621_RST_I2C>;
- reset-names = "i2c";
-
#address-cells = <1>;
#size-cells = <0>;
- status = "disabled";
+ clocks = <&sysc MT7621_CLK_I2C>;
+ clock-names = "i2c";
pinctrl-names = "default";
pinctrl-0 = <&i2c_pins>;
+
+ resets = <&sysc MT7621_RST_I2C>;
+ reset-names = "i2c";
+
+ status = "disabled";
};
memc: memory-controller@5000 {
--
Reorder the attributes of the SPI controller node so that
they're aligned with the DTS style guide.
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 87a3bcbc0..60dfbae53 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -183,22 +183,22 @@ serial2: serial@e00 {
};
spi0: spi@b00 {
- status = "disabled";
-
compatible = "ralink,mt7621-spi";
reg = <0xb00 0x100>;
- clocks = <&sysc MT7621_CLK_SPI>;
- clock-names = "spi";
-
- resets = <&sysc MT7621_RST_SPI>;
- reset-names = "spi";
-
#address-cells = <1>;
#size-cells = <0>;
+ clock-names = "spi";
+ clocks = <&sysc MT7621_CLK_SPI>;
+
pinctrl-names = "default";
pinctrl-0 = <&spi_pins>;
+
+ reset-names = "spi";
+ resets = <&sysc MT7621_RST_SPI>;
+
+ status = "disabled";
};
};
--
Move the pinctrl node prior to the nodes that feature unit
addresses.
Sort pinctrl's child nodes into alphabetical order.
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 172 +++++++++++++-------------
1 file changed, 86 insertions(+), 86 deletions(-)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 60dfbae53..b28aee1e4 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -57,6 +57,92 @@ mmc_fixed_1v8_io: regulator-1v8 {
regulator-name = "mmc_io";
};
+ pinctrl: pinctrl {
+ compatible = "ralink,mt7621-pinctrl";
+
+ i2c_pins: i2c0-pins {
+ pinmux {
+ groups = "i2c";
+ function = "i2c";
+ };
+ };
+
+ mdio_pins: mdio0-pins {
+ pinmux {
+ groups = "mdio";
+ function = "mdio";
+ };
+ };
+
+ nand_pins: nand0-pins {
+ sdhci-pinmux {
+ groups = "sdhci";
+ function = "nand2";
+ };
+
+ spi-pinmux {
+ groups = "spi";
+ function = "nand1";
+ };
+ };
+
+ pcie_pins: pcie0-pins {
+ pinmux {
+ groups = "pcie";
+ function = "gpio";
+ };
+ };
+
+ rgmii1_pins: rgmii1-pins {
+ pinmux {
+ groups = "rgmii1";
+ function = "rgmii1";
+ };
+ };
+
+ rgmii2_pins: rgmii2-pins {
+ pinmux {
+ groups = "rgmii2";
+ function = "rgmii2";
+ };
+ };
+
+ sdhci_pins: sdhci0-pins {
+ pinmux {
+ groups = "sdhci";
+ function = "sdhci";
+ };
+ };
+
+ spi_pins: spi0-pins {
+ pinmux {
+ groups = "spi";
+ function = "spi";
+ };
+ };
+
+ uart1_pins: uart1-pins {
+ pinmux {
+ groups = "uart1";
+ function = "uart1";
+ };
+ };
+
+ uart2_pins: uart2-pins {
+ pinmux {
+ groups = "uart2";
+ function = "uart2";
+ };
+ };
+
+ uart3_pins: uart3-pins {
+ pinmux {
+ groups = "uart3";
+ function = "uart3";
+ };
+ };
+ };
+
palmbus: palmbus@1e000000 {
compatible = "palmbus";
reg = <0x1e000000 0x100000>;
@@ -202,92 +288,6 @@ spi0: spi@b00 {
};
};
- pinctrl: pinctrl {
- compatible = "ralink,mt7621-pinctrl";
-
- i2c_pins: i2c0-pins {
- pinmux {
- groups = "i2c";
- function = "i2c";
- };
- };
-
- spi_pins: spi0-pins {
- pinmux {
- groups = "spi";
- function = "spi";
- };
- };
-
- uart1_pins: uart1-pins {
- pinmux {
- groups = "uart1";
- function = "uart1";
- };
- };
-
- uart2_pins: uart2-pins {
- pinmux {
- groups = "uart2";
- function = "uart2";
- };
- };
-
- uart3_pins: uart3-pins {
- pinmux {
- groups = "uart3";
- function = "uart3";
- };
- };
-
- rgmii1_pins: rgmii1-pins {
- pinmux {
- groups = "rgmii1";
- function = "rgmii1";
- };
- };
-
- rgmii2_pins: rgmii2-pins {
- pinmux {
- groups = "rgmii2";
- function = "rgmii2";
- };
- };
-
- mdio_pins: mdio0-pins {
- pinmux {
- groups = "mdio";
- function = "mdio";
- };
- };
-
- pcie_pins: pcie0-pins {
- pinmux {
- groups = "pcie";
- function = "gpio";
- };
- };
-
- nand_pins: nand0-pins {
- spi-pinmux {
- groups = "spi";
- function = "nand1";
- };
-
- sdhci-pinmux {
- groups = "sdhci";
- function = "nand2";
- };
- };
-
- sdhci_pins: sdhci0-pins {
- pinmux {
- groups = "sdhci";
- function = "sdhci";
- };
- };
- };
-
mmc: mmc@1e130000 {
status = "disabled";
--
Reorder the attributes and child nodes of the PCIe Controller
node to meet the DTS style guidelines.
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 68 +++++++++++++++++----------
1 file changed, 43 insertions(+), 25 deletions(-)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index f6418201b..aa06d12ac 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -495,70 +495,88 @@ pcie: pcie@1e140000 {
<0x1e142000 0x100>, /* pcie port 0 RC control registers */
<0x1e143000 0x100>, /* pcie port 1 RC control registers */
<0x1e144000 0x100>; /* pcie port 2 RC control registers */
+ ranges = <0x02000000 0 0x60000000 0x60000000 0 0x10000000>, /* pci memory */
+ <0x01000000 0 0x00000000 0x1e160000 0 0x00010000>; /* io space */
+
#address-cells = <3>;
+ #interrupt-cells = <1>;
#size-cells = <2>;
- pinctrl-names = "default";
- pinctrl-0 = <&pcie_pins>;
-
device_type = "pci";
- ranges = <0x02000000 0 0x60000000 0x60000000 0 0x10000000>, /* pci memory */
- <0x01000000 0 0x00000000 0x1e160000 0 0x00010000>; /* io space */
-
- #interrupt-cells = <1>;
- interrupt-map-mask = <0xF800 0 0 0>;
- interrupt-map = <0x0000 0 0 0 &gic GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>,
+ interrupt-map-mask = <0xf800 0 0 0>;
+ interrupt-map = <0x0000 0 0 0 &gic GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>,
<0x0800 0 0 0 &gic GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>,
<0x1000 0 0 0 &gic GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_pins>;
reset-gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+ status = "disabled";
+
pcie@0,0 {
reg = <0x0000 0 0 0 0>;
+ ranges;
+
#address-cells = <3>;
+ #interrupt-cells = <1>;
#size-cells = <2>;
+
+ clocks = <&sysc MT7621_CLK_PCIE0>;
+
device_type = "pci";
- #interrupt-cells = <1>;
+
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>;
- resets = <&sysc MT7621_RST_PCIE0>;
- clocks = <&sysc MT7621_CLK_PCIE0>;
- phys = <&pcie0_phy 1>;
+
phy-names = "pcie-phy0";
- ranges;
+ phys = <&pcie0_phy 1>;
+
+ resets = <&sysc MT7621_RST_PCIE0>;
};
pcie@1,0 {
reg = <0x0800 0 0 0 0>;
+ ranges;
+
#address-cells = <3>;
+ #interrupt-cells = <1>;
#size-cells = <2>;
+
+ clocks = <&sysc MT7621_CLK_PCIE1>;
+
device_type = "pci";
- #interrupt-cells = <1>;
+
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>;
- resets = <&sysc MT7621_RST_PCIE1>;
- clocks = <&sysc MT7621_CLK_PCIE1>;
- phys = <&pcie0_phy 1>;
+
phy-names = "pcie-phy1";
- ranges;
+ phys = <&pcie0_phy 1>;
+
+ resets = <&sysc MT7621_RST_PCIE1>;
};
pcie@2,0 {
reg = <0x1000 0 0 0 0>;
+ ranges;
+
#address-cells = <3>;
+ #interrupt-cells = <1>;
#size-cells = <2>;
+
+ clocks = <&sysc MT7621_CLK_PCIE2>;
+
device_type = "pci";
- #interrupt-cells = <1>;
+
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
- resets = <&sysc MT7621_RST_PCIE2>;
- clocks = <&sysc MT7621_CLK_PCIE2>;
- phys = <&pcie2_phy 0>;
+
phy-names = "pcie-phy2";
- ranges;
+ phys = <&pcie2_phy 0>;
+
+ resets = <&sysc MT7621_RST_PCIE2>;
};
};
--
Reorder the attributes of the PCIe PHY nodes node to match
what the DTS style guide recommends.
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index aa06d12ac..284811f32 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -583,14 +583,18 @@ pcie@2,0 {
pcie0_phy: pcie-phy@1e149000 {
compatible = "mediatek,mt7621-pci-phy";
reg = <0x1e149000 0x0700>;
- clocks = <&sysc MT7621_CLK_XTAL>;
+
#phy-cells = <1>;
+
+ clocks = <&sysc MT7621_CLK_XTAL>;
};
pcie2_phy: pcie-phy@1e14a000 {
compatible = "mediatek,mt7621-pci-phy";
reg = <0x1e14a000 0x0700>;
- clocks = <&sysc MT7621_CLK_XTAL>;
+
#phy-cells = <1>;
+
+ clocks = <&sysc MT7621_CLK_XTAL>;
};
};
--
Rearrange attributes and descendents declared under the
ethernet node, recursively, to follow the DTS style guide.
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 88 +++++++++++++++------------
1 file changed, 48 insertions(+), 40 deletions(-)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 8aa9eba68..f6418201b 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -364,46 +364,22 @@ ethernet: ethernet@1e100000 {
compatible = "mediatek,mt7621-eth";
reg = <0x1e100000 0x10000>;
- clocks = <&sysc MT7621_CLK_FE>, <&sysc MT7621_CLK_ETH>;
- clock-names = "fe", "ethif";
-
#address-cells = <1>;
#size-cells = <0>;
- resets = <&sysc MT7621_RST_FE>, <&sysc MT7621_RST_ETH>;
- reset-names = "fe", "eth";
+ clock-names = "fe", "ethif";
+ clocks = <&sysc MT7621_CLK_FE>, <&sysc MT7621_CLK_ETH>;
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
- mediatek,ethsys = <&sysc>;
-
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>, <&rgmii2_pins>;
- gmac0: mac@0 {
- compatible = "mediatek,eth-mac";
- reg = <0>;
- phy-mode = "trgmii";
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- pause;
- };
- };
-
- gmac1: mac@1 {
- compatible = "mediatek,eth-mac";
- reg = <1>;
- phy-mode = "rgmii";
+ reset-names = "fe", "eth";
+ resets = <&sysc MT7621_RST_FE>, <&sysc MT7621_RST_ETH>;
- fixed-link {
- speed = <1000>;
- full-duplex;
- pause;
- };
- };
+ mediatek,ethsys = <&sysc>;
mdio: mdio-bus {
#address-cells = <1>;
@@ -412,73 +388,105 @@ mdio: mdio-bus {
switch0: switch@1f {
compatible = "mediatek,mt7621";
reg = <0x1f>;
- mediatek,mcm;
- resets = <&sysc MT7621_RST_MCM>;
- reset-names = "mcm";
- interrupt-controller;
+
#interrupt-cells = <1>;
+ interrupt-controller;
interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
+ reset-names = "mcm";
+ resets = <&sysc MT7621_RST_MCM>;
+
+ mediatek,mcm;
+
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
- status = "disabled";
reg = <0>;
label = "swp0";
+ status = "disabled";
};
port@1 {
- status = "disabled";
reg = <1>;
label = "swp1";
+ status = "disabled";
};
port@2 {
- status = "disabled";
reg = <2>;
label = "swp2";
+ status = "disabled";
};
port@3 {
- status = "disabled";
reg = <3>;
label = "swp3";
+ status = "disabled";
};
port@4 {
- status = "disabled";
reg = <4>;
label = "swp4";
+ status = "disabled";
};
port@5 {
reg = <5>;
+
ethernet = <&gmac1>;
phy-mode = "rgmii";
fixed-link {
- speed = <1000>;
full-duplex;
pause;
+ speed = <1000>;
};
};
port@6 {
reg = <6>;
+
ethernet = <&gmac0>;
phy-mode = "trgmii";
fixed-link {
- speed = <1000>;
full-duplex;
pause;
+ speed = <1000>;
};
};
};
};
};
+
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+
+ phy-mode = "trgmii";
+
+ fixed-link {
+ full-duplex;
+ pause;
+ speed = <1000>;
+ };
+ };
+
+ gmac1: mac@1 {
+ compatible = "mediatek,eth-mac";
+ reg = <1>;
+
+ phy-mode = "rgmii";
+
+ fixed-link {
+ full-duplex;
+ pause;
+ speed = <1000>;
+ };
+ };
+
};
pcie: pcie@1e140000 {
--
Reorder the attributes of the Global Interrupt Controller
node to fit DTS style guidelines.
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 1fbe345bd..8aa9eba68 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -338,15 +338,15 @@ gic: interrupt-controller@1fbc0000 {
compatible = "mti,gic";
reg = <0x1fbc0000 0x2000>;
- interrupt-controller;
#interrupt-cells = <3>;
+ interrupt-controller;
mti,reserved-cpu-vectors = <7>;
timer {
compatible = "mti,gic-timer";
- interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
clocks = <&sysc MT7621_CLK_CPU>;
+ interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
};
};
--
Shuffle the attributes of the MMC node to meet the guidelines
provided by the DTS style guide.
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 26 +++++++++++++++-----------
1 file changed, 15 insertions(+), 11 deletions(-)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index b28aee1e4..1fbe345bd 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -289,29 +289,33 @@ spi0: spi@b00 {
};
mmc: mmc@1e130000 {
- status = "disabled";
-
compatible = "mediatek,mt7620-mmc";
reg = <0x1e130000 0x4000>;
bus-width = <4>;
- max-frequency = <48000000>;
- cap-sd-highspeed;
- cap-mmc-highspeed;
- vmmc-supply = <&mmc_fixed_3v3>;
- vqmmc-supply = <&mmc_fixed_1v8_io>;
- disable-wp;
- pinctrl-names = "default", "state_uhs";
- pinctrl-0 = <&sdhci_pins>;
- pinctrl-1 = <&sdhci_pins>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
clocks = <&sysc MT7621_CLK_SHXC>,
<&sysc MT7621_CLK_50M>;
clock-names = "source", "hclk";
+ disable-wp;
+
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
+
+ max-frequency = <48000000>;
+
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&sdhci_pins>;
+ pinctrl-1 = <&sdhci_pins>;
+
+ vmmc-supply = <&mmc_fixed_3v3>;
+ vqmmc-supply = <&mmc_fixed_1v8_io>;
+
+ status = "disabled";
};
usb: usb@1e1c0000 {
--
Move the compatible attribute of the DTS root node to first place.
Signed-off-by: Justin Swartz <[email protected]>
---
arch/mips/boot/dts/ralink/mt7621.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
index 284811f32..0704eab4a 100644
--- a/arch/mips/boot/dts/ralink/mt7621.dtsi
+++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
@@ -5,9 +5,10 @@
#include <dt-bindings/reset/mt7621-reset.h>
/ {
+ compatible = "mediatek,mt7621-soc";
+
#address-cells = <1>;
#size-cells = <1>;
- compatible = "mediatek,mt7621-soc";
cpus {
#address-cells = <1>;
--
On 16.03.2024 07:54, Justin Swartz wrote:
> Reorder cpu node attributes to fit the DTS Coding Style.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Arınç
On 16.03.2024 07:54, Justin Swartz wrote:
> Reorder the CPU Interrupt Controller node's attributes to follow
> what the DTS Coding Style dictates.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Arınç
On 16.03.2024 07:54, Justin Swartz wrote:
> Reorder the attributes of MMC fixed voltage regulator nodes
> for the sake of compliance with the DTS style guide.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Arınç
On 16.03.2024 07:54, Justin Swartz wrote:
> Reorder the attributes of the sysc node so that the
> ralink prefixed attribute is placed after those which lack
> prefixes.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Arınç
On 16.03.2024 07:54, Justin Swartz wrote:
> Shuffle the attributes of the gpio node to appease the DTS
> style guide.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Arınç
On 16.03.2024 07:54, Justin Swartz wrote:
> Rearrange the order of the i2c node's attributes so that they
> are inline with the DTS style guide.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Arınç
On 16.03.2024 07:54, Justin Swartz wrote:
> Move the pinctrl node prior to the nodes that feature unit
> addresses.
>
> Sort pinctrl's child nodes into alphabetical order.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Arınç
On 16.03.2024 07:54, Justin Swartz wrote:
> Reorder the attributes of the SPI controller node so that
> they're aligned with the DTS style guide.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Arınç
On 16.03.2024 07:54, Justin Swartz wrote:
> Shuffle the attributes of the MMC node to meet the guidelines
> provided by the DTS style guide.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Arınç
On 16.03.2024 07:54, Justin Swartz wrote:
> Reorder the attributes of the Global Interrupt Controller
> node to fit DTS style guidelines.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Arınç
On 16.03.2024 07:54, Justin Swartz wrote:
> Reorder the attributes and child nodes of the PCIe Controller
> node to meet the DTS style guidelines.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Arınç
On 16.03.2024 07:54, Justin Swartz wrote:
> Rearrange attributes and descendents declared under the
> ethernet node, recursively, to follow the DTS style guide.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Arınç
On 16.03.2024 07:54, Justin Swartz wrote:
> Reorder the attributes of the PCIe PHY nodes node to match
> what the DTS style guide recommends.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Arınç
On 16.03.2024 07:54, Justin Swartz wrote:
> Move the compatible attribute of the DTS root node to first place.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: Arınç ÜNAL <[email protected]>
Arınç
On 16.03.2024 07:54, Justin Swartz wrote:
> This set of patches was created with the intention of cleaning up
> arch/mips/boot/dts/ralink/mt7621.dtsi so that it is aligned with
> the Devicetree Sources (DTS) Coding Style [1] [2] guide.
>
> [1] Documentation/devicetree/bindings/dts-coding-style.rst
>
> [2] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
>
> Justin Swartz (14):
> mips: dts: ralink: mt7621: reorder cpu node attributes
> mips: dts: ralink: mt7621: reorder cpuintc node attributes
> mips: dts: ralink: mt7621: reorder mmc regulator attributes
> mips: dts: ralink: mt7621: reorder sysc node attributes
> mips: dts: ralink: mt7621: reorder gpio node attributes
> mips: dts: ralink: mt7621: reorder i2c node attributes
> mips: dts: ralink: mt7621: reorder spi0 node attributes
> mips: dts: ralink: mt7621: move pinctrl and sort its children
> mips: dts: ralink: mt7621: reorder mmc node attributes
> mips: dts: ralink: mt7621: reorder gic node attributes
> mips: dts: ralink: mt7621: reorder ethernet node attributes and kids
> mips: dts: ralink: mt7621: reorder pcie node attributes and children
> mips: dts: ralink: mt7621: reorder pci?_phy attributes
> mips: dts: ralink: mt7621: reorder the attributes of the root node
>
> arch/mips/boot/dts/ralink/mt7621.dtsi | 430 ++++++++++++++------------
> 1 file changed, 239 insertions(+), 191 deletions(-)
A well done patch series. Thank you very much for doing this!
Arınç
On 2024-03-16 11:24, Arınç ÜNAL wrote:
> On 16.03.2024 07:54, Justin Swartz wrote:
>> This set of patches was created with the intention of cleaning up
>> arch/mips/boot/dts/ralink/mt7621.dtsi so that it is aligned with
>> the Devicetree Sources (DTS) Coding Style [1] [2] guide.
>>
>> [1] Documentation/devicetree/bindings/dts-coding-style.rst
>>
>> [2] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
>>
>> Justin Swartz (14):
>> mips: dts: ralink: mt7621: reorder cpu node attributes
>> mips: dts: ralink: mt7621: reorder cpuintc node attributes
>> mips: dts: ralink: mt7621: reorder mmc regulator attributes
>> mips: dts: ralink: mt7621: reorder sysc node attributes
>> mips: dts: ralink: mt7621: reorder gpio node attributes
>> mips: dts: ralink: mt7621: reorder i2c node attributes
>> mips: dts: ralink: mt7621: reorder spi0 node attributes
>> mips: dts: ralink: mt7621: move pinctrl and sort its children
>> mips: dts: ralink: mt7621: reorder mmc node attributes
>> mips: dts: ralink: mt7621: reorder gic node attributes
>> mips: dts: ralink: mt7621: reorder ethernet node attributes and
>> kids
>> mips: dts: ralink: mt7621: reorder pcie node attributes and
>> children
>> mips: dts: ralink: mt7621: reorder pci?_phy attributes
>> mips: dts: ralink: mt7621: reorder the attributes of the root node
>>
>> arch/mips/boot/dts/ralink/mt7621.dtsi | 430
>> ++++++++++++++------------
>> 1 file changed, 239 insertions(+), 191 deletions(-)
>
> A well done patch series. Thank you very much for doing this!
>
> Arınç
++ for reviewing them all.
As you have at least one board that features an MT7621 SoC,
please may you (and anyone else willing) take a look at a
patch [1] that I've submitted for spi-mt7621.c which allows
GPIO chip select lines to be used as well as the native chip
selects.
There's already been some back and forth with Mark Brown about
the initial version of the patch (the linked patch is v2) and,
of course I messed up how I send v2, as you'll read in the thread.
It seems you weren't included because I rely on [2] to determine
which people to address as maintainers when sending patches.
Is there a better approach for populating git send's --to argument?
Regards
Justin
[1]
https://lore.kernel.org/linux-mediatek/[email protected]/
[2] scripts/get_maintainer.pl --nogit --nogit-fallback --norolestats
--nol
On 16.03.2024 17:03, Justin Swartz wrote:
> On 2024-03-16 11:24, Arınç ÜNAL wrote:
>> On 16.03.2024 07:54, Justin Swartz wrote:
>>> This set of patches was created with the intention of cleaning up
>>> arch/mips/boot/dts/ralink/mt7621.dtsi so that it is aligned with
>>> the Devicetree Sources (DTS) Coding Style [1] [2] guide.
>>>
>>> [1] Documentation/devicetree/bindings/dts-coding-style.rst
>>>
>>> [2] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
>>>
>>> Justin Swartz (14):
>>> mips: dts: ralink: mt7621: reorder cpu node attributes
>>> mips: dts: ralink: mt7621: reorder cpuintc node attributes
>>> mips: dts: ralink: mt7621: reorder mmc regulator attributes
>>> mips: dts: ralink: mt7621: reorder sysc node attributes
>>> mips: dts: ralink: mt7621: reorder gpio node attributes
>>> mips: dts: ralink: mt7621: reorder i2c node attributes
>>> mips: dts: ralink: mt7621: reorder spi0 node attributes
>>> mips: dts: ralink: mt7621: move pinctrl and sort its children
>>> mips: dts: ralink: mt7621: reorder mmc node attributes
>>> mips: dts: ralink: mt7621: reorder gic node attributes
>>> mips: dts: ralink: mt7621: reorder ethernet node attributes and kids
>>> mips: dts: ralink: mt7621: reorder pcie node attributes and children
>>> mips: dts: ralink: mt7621: reorder pci?_phy attributes
>>> mips: dts: ralink: mt7621: reorder the attributes of the root node
>>>
>>> arch/mips/boot/dts/ralink/mt7621.dtsi | 430 ++++++++++++++------------
>>> 1 file changed, 239 insertions(+), 191 deletions(-)
>>
>> A well done patch series. Thank you very much for doing this!
>>
>> Arınç
>
> ++ for reviewing them all.
>
> As you have at least one board that features an MT7621 SoC,
> please may you (and anyone else willing) take a look at a
> patch [1] that I've submitted for spi-mt7621.c which allows
> GPIO chip select lines to be used as well as the native chip
> selects.
>
> There's already been some back and forth with Mark Brown about
> the initial version of the patch (the linked patch is v2) and,
> of course I messed up how I send v2, as you'll read in the thread.
>
> It seems you weren't included because I rely on [2] to determine
> which people to address as maintainers when sending patches.
I'd prefer not to be involved. It's not my area of expertise.
>
> Is there a better approach for populating git send's --to argument?
This is how I used to submit patches before I started using b4 [1].
git format-patch HEAD~X --subject-prefix "PATCH (RFC) (tree) (vX)" --cover-letter
/scripts/get_maintainer.pl --norolestats --nol --nor 00* > to.txt
/scripts/get_maintainer.pl --norolestats --nom 00* > cc.txt
git send-email --no-chain-reply-to \
--to-cmd="cat to.txt && cat > /dev/null" \
--cc-cmd="cat cc.txt && cat > /dev/null" \
00*
[1] https://b4.docs.kernel.org/en/latest/index.html
Arınç
On Sat, Mar 16, 2024 at 5:54 AM Justin Swartz
<[email protected]> wrote:
>
> This set of patches was created with the intention of cleaning up
> arch/mips/boot/dts/ralink/mt7621.dtsi so that it is aligned with
> the Devicetree Sources (DTS) Coding Style [1] [2] guide.
>
> [1] Documentation/devicetree/bindings/dts-coding-style.rst
>
> [2] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
>
> Justin Swartz (14):
> mips: dts: ralink: mt7621: reorder cpu node attributes
> mips: dts: ralink: mt7621: reorder cpuintc node attributes
> mips: dts: ralink: mt7621: reorder mmc regulator attributes
> mips: dts: ralink: mt7621: reorder sysc node attributes
> mips: dts: ralink: mt7621: reorder gpio node attributes
> mips: dts: ralink: mt7621: reorder i2c node attributes
> mips: dts: ralink: mt7621: reorder spi0 node attributes
> mips: dts: ralink: mt7621: move pinctrl and sort its children
> mips: dts: ralink: mt7621: reorder mmc node attributes
> mips: dts: ralink: mt7621: reorder gic node attributes
> mips: dts: ralink: mt7621: reorder ethernet node attributes and kids
> mips: dts: ralink: mt7621: reorder pcie node attributes and children
> mips: dts: ralink: mt7621: reorder pci?_phy attributes
> mips: dts: ralink: mt7621: reorder the attributes of the root node
>
> arch/mips/boot/dts/ralink/mt7621.dtsi | 430 ++++++++++++++------------
> 1 file changed, 239 insertions(+), 191 deletions(-)
For the whole series:
Reviewed-by: Sergio Paracuellos <[email protected]>
Thanks for doing this.
Best regards,
Sergio Paracuellos
On 16/03/2024 05:54, Justin Swartz wrote:
> Reorder the attributes of the sysc node so that the
> ralink prefixed attribute is placed after those which lack
> prefixes.
>
> Signed-off-by: Justin Swartz <[email protected]>
> ---
> arch/mips/boot/dts/ralink/mt7621.dtsi | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/arch/mips/boot/dts/ralink/mt7621.dtsi b/arch/mips/boot/dts/ralink/mt7621.dtsi
> index 696460b2d..d1d4399d7 100644
> --- a/arch/mips/boot/dts/ralink/mt7621.dtsi
> +++ b/arch/mips/boot/dts/ralink/mt7621.dtsi
> @@ -68,12 +68,15 @@ palmbus: palmbus@1e000000 {
> sysc: syscon@0 {
> compatible = "mediatek,mt7621-sysc", "syscon";
> reg = <0x0 0x100>;
> +
> #clock-cells = <1>;
> #reset-cells = <1>;
> - ralink,memctl = <&memc>;
> +
Why do you move properties one-by-one? This is a lot of churn. Fixup
entire file in one pass.
Best regards,
Krzysztof
On 16/03/2024 16:49, Sergio Paracuellos wrote:
> On Sat, Mar 16, 2024 at 5:54 AM Justin Swartz
> <[email protected]> wrote:
>>
>> This set of patches was created with the intention of cleaning up
>> arch/mips/boot/dts/ralink/mt7621.dtsi so that it is aligned with
>> the Devicetree Sources (DTS) Coding Style [1] [2] guide.
>>
>> [1] Documentation/devicetree/bindings/dts-coding-style.rst
>>
>> [2] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
>>
>> Justin Swartz (14):
>> mips: dts: ralink: mt7621: reorder cpu node attributes
>> mips: dts: ralink: mt7621: reorder cpuintc node attributes
>> mips: dts: ralink: mt7621: reorder mmc regulator attributes
>> mips: dts: ralink: mt7621: reorder sysc node attributes
>> mips: dts: ralink: mt7621: reorder gpio node attributes
>> mips: dts: ralink: mt7621: reorder i2c node attributes
>> mips: dts: ralink: mt7621: reorder spi0 node attributes
>> mips: dts: ralink: mt7621: move pinctrl and sort its children
>> mips: dts: ralink: mt7621: reorder mmc node attributes
>> mips: dts: ralink: mt7621: reorder gic node attributes
>> mips: dts: ralink: mt7621: reorder ethernet node attributes and kids
>> mips: dts: ralink: mt7621: reorder pcie node attributes and children
>> mips: dts: ralink: mt7621: reorder pci?_phy attributes
These are all simple cleanups for the same file. It's one patch, not 15.
Best regards,
Krzysztof
On 2024-03-17 17:10, Krzysztof Kozlowski wrote:
> On 16/03/2024 16:49, Sergio Paracuellos wrote:
>> On Sat, Mar 16, 2024 at 5:54 AM Justin Swartz
>> <[email protected]> wrote:
>>>
>>> This set of patches was created with the intention of cleaning up
>>> arch/mips/boot/dts/ralink/mt7621.dtsi so that it is aligned with
>>> the Devicetree Sources (DTS) Coding Style [1] [2] guide.
>>>
>>> [1] Documentation/devicetree/bindings/dts-coding-style.rst
>>>
>>> [2] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
>>>
>>> Justin Swartz (14):
>>> mips: dts: ralink: mt7621: reorder cpu node attributes
>>> mips: dts: ralink: mt7621: reorder cpuintc node attributes
>>> mips: dts: ralink: mt7621: reorder mmc regulator attributes
>>> mips: dts: ralink: mt7621: reorder sysc node attributes
>>> mips: dts: ralink: mt7621: reorder gpio node attributes
>>> mips: dts: ralink: mt7621: reorder i2c node attributes
>>> mips: dts: ralink: mt7621: reorder spi0 node attributes
>>> mips: dts: ralink: mt7621: move pinctrl and sort its children
>>> mips: dts: ralink: mt7621: reorder mmc node attributes
>>> mips: dts: ralink: mt7621: reorder gic node attributes
>>> mips: dts: ralink: mt7621: reorder ethernet node attributes and
>>> kids
>>> mips: dts: ralink: mt7621: reorder pcie node attributes and
>>> children
>>> mips: dts: ralink: mt7621: reorder pci?_phy attributes
>
> These are all simple cleanups for the same file. It's one patch, not
> 15.
I agree these are all simple cleanups.
Even though the cleanup pattern was the same, or very similar,
for each node affected, the intention was to isolate each change
to a single node (or a grouping of nodes of that seemed logical
to me) so that if anyone had any objections, the discussion would
be easier to follow in subthreads identifiable by patch names (and
thus subject lines) that clearly indicate the context.
But if there're no objections and it lessens the burden on
maintainers upstream to have less patches to apply, then I have no
problem combining them into a single patch.
Regards
Justin
On 17/03/2024 16:22, Justin Swartz wrote:
> On 2024-03-17 17:10, Krzysztof Kozlowski wrote:
>> On 16/03/2024 16:49, Sergio Paracuellos wrote:
>>> On Sat, Mar 16, 2024 at 5:54 AM Justin Swartz
>>> <[email protected]> wrote:
>>>>
>>>> This set of patches was created with the intention of cleaning up
>>>> arch/mips/boot/dts/ralink/mt7621.dtsi so that it is aligned with
>>>> the Devicetree Sources (DTS) Coding Style [1] [2] guide.
>>>>
>>>> [1] Documentation/devicetree/bindings/dts-coding-style.rst
>>>>
>>>> [2] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
>>>>
>>>> Justin Swartz (14):
>>>> mips: dts: ralink: mt7621: reorder cpu node attributes
>>>> mips: dts: ralink: mt7621: reorder cpuintc node attributes
>>>> mips: dts: ralink: mt7621: reorder mmc regulator attributes
>>>> mips: dts: ralink: mt7621: reorder sysc node attributes
>>>> mips: dts: ralink: mt7621: reorder gpio node attributes
>>>> mips: dts: ralink: mt7621: reorder i2c node attributes
>>>> mips: dts: ralink: mt7621: reorder spi0 node attributes
>>>> mips: dts: ralink: mt7621: move pinctrl and sort its children
>>>> mips: dts: ralink: mt7621: reorder mmc node attributes
>>>> mips: dts: ralink: mt7621: reorder gic node attributes
>>>> mips: dts: ralink: mt7621: reorder ethernet node attributes and
>>>> kids
>>>> mips: dts: ralink: mt7621: reorder pcie node attributes and
>>>> children
>>>> mips: dts: ralink: mt7621: reorder pci?_phy attributes
>>
>> These are all simple cleanups for the same file. It's one patch, not
>> 15.
>
> I agree these are all simple cleanups.
>
> Even though the cleanup pattern was the same, or very similar,
> for each node affected, the intention was to isolate each change
> to a single node (or a grouping of nodes of that seemed logical
> to me) so that if anyone had any objections, the discussion would
> be easier to follow in subthreads identifiable by patch names (and
Objections to what? Coding style? Coding style is defined so you either
implement it or not... and even if someone disagrees with one line swap,
why it cannot be done like for every contribution: inline?
Organize your patches how described in submitting patches: one per
logical change. Logical change is to reorder all properties in one file,
without functional impact.
> thus subject lines) that clearly indicate the context.
>
> But if there're no objections and it lessens the burden on
> maintainers upstream to have less patches to apply, then I have no
> problem combining them into a single patch.
>
Yeah, one review response instead of 14 responses... One commit in the
history instead of 14.
Best regards,
Krzysztof
On 2024-03-17 17:29, Krzysztof Kozlowski wrote:
> On 17/03/2024 16:22, Justin Swartz wrote:
>> On 2024-03-17 17:10, Krzysztof Kozlowski wrote:
>>> On 16/03/2024 16:49, Sergio Paracuellos wrote:
>>>> On Sat, Mar 16, 2024 at 5:54 AM Justin Swartz
>>>> <[email protected]> wrote:
>>>>>
>>>>> This set of patches was created with the intention of cleaning up
>>>>> arch/mips/boot/dts/ralink/mt7621.dtsi so that it is aligned with
>>>>> the Devicetree Sources (DTS) Coding Style [1] [2] guide.
>>>>>
>>>>> [1] Documentation/devicetree/bindings/dts-coding-style.rst
>>>>>
>>>>> [2]
>>>>> https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
>>>>>
>>>>> Justin Swartz (14):
>>>>> mips: dts: ralink: mt7621: reorder cpu node attributes
>>>>> mips: dts: ralink: mt7621: reorder cpuintc node attributes
>>>>> mips: dts: ralink: mt7621: reorder mmc regulator attributes
>>>>> mips: dts: ralink: mt7621: reorder sysc node attributes
>>>>> mips: dts: ralink: mt7621: reorder gpio node attributes
>>>>> mips: dts: ralink: mt7621: reorder i2c node attributes
>>>>> mips: dts: ralink: mt7621: reorder spi0 node attributes
>>>>> mips: dts: ralink: mt7621: move pinctrl and sort its children
>>>>> mips: dts: ralink: mt7621: reorder mmc node attributes
>>>>> mips: dts: ralink: mt7621: reorder gic node attributes
>>>>> mips: dts: ralink: mt7621: reorder ethernet node attributes and
>>>>> kids
>>>>> mips: dts: ralink: mt7621: reorder pcie node attributes and
>>>>> children
>>>>> mips: dts: ralink: mt7621: reorder pci?_phy attributes
>>>
>>> These are all simple cleanups for the same file. It's one patch, not
>>> 15.
>>
>> I agree these are all simple cleanups.
>>
>> Even though the cleanup pattern was the same, or very similar,
>> for each node affected, the intention was to isolate each change
>> to a single node (or a grouping of nodes of that seemed logical
>> to me) so that if anyone had any objections, the discussion would
>> be easier to follow in subthreads identifiable by patch names (and
>
> Objections to what? Coding style? Coding style is defined so you either
> implement it or not... and even if someone disagrees with one line
> swap,
> why it cannot be done like for every contribution: inline?
I had been asked to include empty lines when I had left them out when
I had contributed a patch regarding the serial nodes, which resulted in
a second version of that patch.
> Organize your patches how described in submitting patches: one per
> logical change. Logical change is to reorder all properties in one
> file,
> without functional impact.
If I had accidentally deleted or modified an attribute in the process
of cleanup, this could have had a functional impact. It's easier to
notice this sort of omission when the wall of text you're confronted
with is as small as possible, and not multiple pages long.
>> But if there're no objections and it lessens the burden on
>> maintainers upstream to have less patches to apply, then I have no
>> problem combining them into a single patch.
>>
>
> Yeah, one review response instead of 14 responses... One commit in the
> history instead of 14.
I agree that 1 commit vs 14 is better.
But for future reference: is it not enough for the Reviewed-by: trailer
to be sent in response to the cover letter of a patch set if a reviewer
has looked at the entire set?
Regards
Justin
On Sun, Mar 17, 2024 at 4:43 PM Justin Swartz
<[email protected]> wrote:
>
> On 2024-03-17 17:29, Krzysztof Kozlowski wrote:
> > On 17/03/2024 16:22, Justin Swartz wrote:
> >> On 2024-03-17 17:10, Krzysztof Kozlowski wrote:
> >>> On 16/03/2024 16:49, Sergio Paracuellos wrote:
> >>>> On Sat, Mar 16, 2024 at 5:54 AM Justin Swartz
> >>>> <[email protected]> wrote:
> >>>>>
> >>>>> This set of patches was created with the intention of cleaning up
> >>>>> arch/mips/boot/dts/ralink/mt7621.dtsi so that it is aligned with
> >>>>> the Devicetree Sources (DTS) Coding Style [1] [2] guide.
> >>>>>
> >>>>> [1] Documentation/devicetree/bindings/dts-coding-style.rst
> >>>>>
> >>>>> [2]
> >>>>> https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
> >>>>>
> >>>>> Justin Swartz (14):
> >>>>> mips: dts: ralink: mt7621: reorder cpu node attributes
> >>>>> mips: dts: ralink: mt7621: reorder cpuintc node attributes
> >>>>> mips: dts: ralink: mt7621: reorder mmc regulator attributes
> >>>>> mips: dts: ralink: mt7621: reorder sysc node attributes
> >>>>> mips: dts: ralink: mt7621: reorder gpio node attributes
> >>>>> mips: dts: ralink: mt7621: reorder i2c node attributes
> >>>>> mips: dts: ralink: mt7621: reorder spi0 node attributes
> >>>>> mips: dts: ralink: mt7621: move pinctrl and sort its children
> >>>>> mips: dts: ralink: mt7621: reorder mmc node attributes
> >>>>> mips: dts: ralink: mt7621: reorder gic node attributes
> >>>>> mips: dts: ralink: mt7621: reorder ethernet node attributes and
> >>>>> kids
> >>>>> mips: dts: ralink: mt7621: reorder pcie node attributes and
> >>>>> children
> >>>>> mips: dts: ralink: mt7621: reorder pci?_phy attributes
> >>>
> >>> These are all simple cleanups for the same file. It's one patch, not
> >>> 15.
> >>
> >> I agree these are all simple cleanups.
> >>
> >> Even though the cleanup pattern was the same, or very similar,
> >> for each node affected, the intention was to isolate each change
> >> to a single node (or a grouping of nodes of that seemed logical
> >> to me) so that if anyone had any objections, the discussion would
> >> be easier to follow in subthreads identifiable by patch names (and
> >
> > Objections to what? Coding style? Coding style is defined so you either
> > implement it or not... and even if someone disagrees with one line
> > swap,
> > why it cannot be done like for every contribution: inline?
>
> I had been asked to include empty lines when I had left them out when
> I had contributed a patch regarding the serial nodes, which resulted in
> a second version of that patch.
>
>
> > Organize your patches how described in submitting patches: one per
> > logical change. Logical change is to reorder all properties in one
> > file,
> > without functional impact.
>
> If I had accidentally deleted or modified an attribute in the process
> of cleanup, this could have had a functional impact. It's easier to
> notice this sort of omission when the wall of text you're confronted
> with is as small as possible, and not multiple pages long.
>
>
> >> But if there're no objections and it lessens the burden on
> >> maintainers upstream to have less patches to apply, then I have no
> >> problem combining them into a single patch.
> >>
> >
> > Yeah, one review response instead of 14 responses... One commit in the
> > history instead of 14.
>
> I agree that 1 commit vs 14 is better.
>
> But for future reference: is it not enough for the Reviewed-by: trailer
> to be sent in response to the cover letter of a patch set if a reviewer
> has looked at the entire set?
It is enough, AFAICT. I found your patchset very easy to review so I
am ok with the patchset as it is. However, at the end this will be
through the mips tree, so let's do what Thomas prefers: add all
patches as they are or squash all of them in one commit.
Thanks,
Sergio Paracuellos
On 18/03/2024 09:48, Sergio Paracuellos wrote:
>>
>>
>>>> But if there're no objections and it lessens the burden on
>>>> maintainers upstream to have less patches to apply, then I have no
>>>> problem combining them into a single patch.
>>>>
>>>
>>> Yeah, one review response instead of 14 responses... One commit in the
>>> history instead of 14.
>>
>> I agree that 1 commit vs 14 is better.
>>
>> But for future reference: is it not enough for the Reviewed-by: trailer
>> to be sent in response to the cover letter of a patch set if a reviewer
>> has looked at the entire set?
>
> It is enough, AFAICT. I found your patchset very easy to review so I
> am ok with the patchset as it is. However, at the end this will be
> through the mips tree, so let's do what Thomas prefers: add all
> patches as they are or squash all of them in one commit.
Yeah, like fixing language typos in comments: one typo per patch.
Best regards,
Krzysztof
On 17/03/2024 16:43, Justin Swartz wrote:
> On 2024-03-17 17:29, Krzysztof Kozlowski wrote:
>> On 17/03/2024 16:22, Justin Swartz wrote:
>>> On 2024-03-17 17:10, Krzysztof Kozlowski wrote:
>>>> On 16/03/2024 16:49, Sergio Paracuellos wrote:
>>>>> On Sat, Mar 16, 2024 at 5:54 AM Justin Swartz
>>>>> <[email protected]> wrote:
>>>>>>
>>>>>> This set of patches was created with the intention of cleaning up
>>>>>> arch/mips/boot/dts/ralink/mt7621.dtsi so that it is aligned with
>>>>>> the Devicetree Sources (DTS) Coding Style [1] [2] guide.
>>>>>>
>>>>>> [1] Documentation/devicetree/bindings/dts-coding-style.rst
>>>>>>
>>>>>> [2]
>>>>>> https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
>>>>>>
>>>>>> Justin Swartz (14):
>>>>>> mips: dts: ralink: mt7621: reorder cpu node attributes
>>>>>> mips: dts: ralink: mt7621: reorder cpuintc node attributes
>>>>>> mips: dts: ralink: mt7621: reorder mmc regulator attributes
>>>>>> mips: dts: ralink: mt7621: reorder sysc node attributes
>>>>>> mips: dts: ralink: mt7621: reorder gpio node attributes
>>>>>> mips: dts: ralink: mt7621: reorder i2c node attributes
>>>>>> mips: dts: ralink: mt7621: reorder spi0 node attributes
>>>>>> mips: dts: ralink: mt7621: move pinctrl and sort its children
>>>>>> mips: dts: ralink: mt7621: reorder mmc node attributes
>>>>>> mips: dts: ralink: mt7621: reorder gic node attributes
>>>>>> mips: dts: ralink: mt7621: reorder ethernet node attributes and
>>>>>> kids
>>>>>> mips: dts: ralink: mt7621: reorder pcie node attributes and
>>>>>> children
>>>>>> mips: dts: ralink: mt7621: reorder pci?_phy attributes
>>>>
>>>> These are all simple cleanups for the same file. It's one patch, not
>>>> 15.
>>>
>>> I agree these are all simple cleanups.
>>>
>>> Even though the cleanup pattern was the same, or very similar,
>>> for each node affected, the intention was to isolate each change
>>> to a single node (or a grouping of nodes of that seemed logical
>>> to me) so that if anyone had any objections, the discussion would
>>> be easier to follow in subthreads identifiable by patch names (and
>>
>> Objections to what? Coding style? Coding style is defined so you either
>> implement it or not... and even if someone disagrees with one line
>> swap,
>> why it cannot be done like for every contribution: inline?
>
> I had been asked to include empty lines when I had left them out when
> I had contributed a patch regarding the serial nodes, which resulted in
> a second version of that patch.
I don't understand why would that matter. It's expected Linux
development process to receive comments inline in the patch.
>
>
>> Organize your patches how described in submitting patches: one per
>> logical change. Logical change is to reorder all properties in one
>> file,
>> without functional impact.
>
> If I had accidentally deleted or modified an attribute in the process
> of cleanup, this could have had a functional impact. It's easier to
How is it relevant? But you did not and splitting simple cleanup
one-line-per-patch is not affecting this. Just because you could make
mistake it does not affect patch readability at all.
Nothing improved with your patch split.
> notice this sort of omission when the wall of text you're confronted
> with is as small as possible, and not multiple pages long.
We are used to handle some length of patches. Multiple scrolls for
obvious cleanups are not problems. Why aren't you applying this approach
to everything? Add a new driver with one function per patch and then
finally Makefile? It would be bisectable and "easy to read" plus
absolutely unmanageable.
>
>
>>> But if there're no objections and it lessens the burden on
>>> maintainers upstream to have less patches to apply, then I have no
>>> problem combining them into a single patch.
>>>
>>
>> Yeah, one review response instead of 14 responses... One commit in the
>> history instead of 14.
>
> I agree that 1 commit vs 14 is better.
>
> But for future reference: is it not enough for the Reviewed-by: trailer
> to be sent in response to the cover letter of a patch set if a reviewer
> has looked at the entire set?
Sure, one can. I still need to open and download 14 patches.
Best regards,
Krzysztof
Il 16/03/24 05:54, Justin Swartz ha scritto:
> Move the compatible attribute of the DTS root node to first place.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Il 16/03/24 05:54, Justin Swartz ha scritto:
> Reorder the attributes of the PCIe PHY nodes node to match
> what the DTS style guide recommends.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Il 16/03/24 05:54, Justin Swartz ha scritto:
> Reorder the attributes and child nodes of the PCIe Controller
> node to meet the DTS style guidelines.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Il 16/03/24 05:54, Justin Swartz ha scritto:
> Rearrange attributes and descendents declared under the
> ethernet node, recursively, to follow the DTS style guide.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Il 16/03/24 05:54, Justin Swartz ha scritto:
> Shuffle the attributes of the MMC node to meet the guidelines
> provided by the DTS style guide.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Il 16/03/24 05:54, Justin Swartz ha scritto:
> Rearrange the order of the i2c node's attributes so that they
> are inline with the DTS style guide.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Il 16/03/24 05:54, Justin Swartz ha scritto:
> Reorder the attributes of MMC fixed voltage regulator nodes
> for the sake of compliance with the DTS style guide.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Il 16/03/24 05:54, Justin Swartz ha scritto:
> Reorder cpu node attributes to fit the DTS Coding Style.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Il 16/03/24 05:54, Justin Swartz ha scritto:
> Reorder the CPU Interrupt Controller node's attributes to follow
> what the DTS Coding Style dictates.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Il 16/03/24 05:54, Justin Swartz ha scritto:
> Shuffle the attributes of the gpio node to appease the DTS
> style guide.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Il 16/03/24 05:54, Justin Swartz ha scritto:
> Reorder the attributes of the Global Interrupt Controller
> node to fit DTS style guidelines.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Il 16/03/24 05:54, Justin Swartz ha scritto:
> Reorder the attributes of the sysc node so that the
> ralink prefixed attribute is placed after those which lack
> prefixes.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Il 16/03/24 05:54, Justin Swartz ha scritto:
> Reorder the attributes of the SPI controller node so that
> they're aligned with the DTS style guide.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Il 16/03/24 05:54, Justin Swartz ha scritto:
> Move the pinctrl node prior to the nodes that feature unit
> addresses.
>
> Sort pinctrl's child nodes into alphabetical order.
>
> Signed-off-by: Justin Swartz <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
On 2024-03-18 10:48, Sergio Paracuellos wrote:
> On Sun, Mar 17, 2024 at 4:43 PM Justin Swartz
> <[email protected]> wrote:
>> But for future reference: is it not enough for the Reviewed-by:
>> trailer
>> to be sent in response to the cover letter of a patch set if a
>> reviewer
>> has looked at the entire set?
>
> It is enough, AFAICT. I found your patchset very easy to review so I
> am ok with the patchset as it is. However, at the end this will be
> through the mips tree, so let's do what Thomas prefers: add all
> patches as they are or squash all of them in one commit.
>
> Thanks,
> Sergio Paracuellos
Thank you for the review. I'm glad to squash them if need be.
On 2024-03-18 11:23, Krzysztof Kozlowski wrote:
> On 17/03/2024 16:43, Justin Swartz wrote:
>> On 2024-03-17 17:29, Krzysztof Kozlowski wrote:
>>> Objections to what? Coding style? Coding style is defined so you
>>> either
>>> implement it or not... and even if someone disagrees with one line
>>> swap,
>>> why it cannot be done like for every contribution: inline?
>>
>> I had been asked to include empty lines when I had left them out when
>> I had contributed a patch regarding the serial nodes, which resulted
>> in
>> a second version of that patch.
>
> I don't understand why would that matter. It's expected Linux
> development process to receive comments inline in the patch.
>>> Organize your patches how described in submitting patches: one per
>>> logical change. Logical change is to reorder all properties in one
>>> file,
>>> without functional impact.
>>
>> If I had accidentally deleted or modified an attribute in the process
>> of cleanup, this could have had a functional impact. It's easier to
>
> How is it relevant? But you did not and splitting simple cleanup
> one-line-per-patch is not affecting this. Just because you could make
> mistake it does not affect patch readability at all.
>
> Nothing improved with your patch split.
>> notice this sort of omission when the wall of text you're confronted
>> with is as small as possible, and not multiple pages long.
>
> We are used to handle some length of patches. Multiple scrolls for
> obvious cleanups are not problems. Why aren't you applying this
> approach
> to everything? Add a new driver with one function per patch and then
> finally Makefile? It would be bisectable and "easy to read" plus
> absolutely unmanageable.
>> But for future reference: is it not enough for the Reviewed-by:
>> trailer
>> to be sent in response to the cover letter of a patch set if a
>> reviewer
>> has looked at the entire set?
>
> Sure, one can. I still need to open and download 14 patches.
Thanks for your input.
I can imagine how these sets of very minor changes might greatly reduce
your signal-to-noise ratio as an upstream maintainer.
I'll try your suggested approach next time.
On 16.03.2024 07:54, Justin Swartz wrote:
> This set of patches was created with the intention of cleaning up
> arch/mips/boot/dts/ralink/mt7621.dtsi so that it is aligned with
> the Devicetree Sources (DTS) Coding Style [1] [2] guide.
>
> [1] Documentation/devicetree/bindings/dts-coding-style.rst
>
> [2] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
>
> Justin Swartz (14):
> mips: dts: ralink: mt7621: reorder cpu node attributes
> mips: dts: ralink: mt7621: reorder cpuintc node attributes
> mips: dts: ralink: mt7621: reorder mmc regulator attributes
> mips: dts: ralink: mt7621: reorder sysc node attributes
> mips: dts: ralink: mt7621: reorder gpio node attributes
> mips: dts: ralink: mt7621: reorder i2c node attributes
> mips: dts: ralink: mt7621: reorder spi0 node attributes
> mips: dts: ralink: mt7621: move pinctrl and sort its children
> mips: dts: ralink: mt7621: reorder mmc node attributes
> mips: dts: ralink: mt7621: reorder gic node attributes
> mips: dts: ralink: mt7621: reorder ethernet node attributes and kids
> mips: dts: ralink: mt7621: reorder pcie node attributes and children
> mips: dts: ralink: mt7621: reorder pci?_phy attributes
> mips: dts: ralink: mt7621: reorder the attributes of the root node
>
> arch/mips/boot/dts/ralink/mt7621.dtsi | 430 ++++++++++++++------------
> 1 file changed, 239 insertions(+), 191 deletions(-)
Thomas, will you apply this patch series as is or should we squash it to
one patch?
Arınç
On Sat, Mar 16, 2024 at 06:54:28AM +0200, Justin Swartz wrote:
> This set of patches was created with the intention of cleaning up
> arch/mips/boot/dts/ralink/mt7621.dtsi so that it is aligned with
> the Devicetree Sources (DTS) Coding Style [1] [2] guide.
>
> [1] Documentation/devicetree/bindings/dts-coding-style.rst
>
> [2] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
>
> Justin Swartz (14):
> mips: dts: ralink: mt7621: reorder cpu node attributes
> mips: dts: ralink: mt7621: reorder cpuintc node attributes
> mips: dts: ralink: mt7621: reorder mmc regulator attributes
> mips: dts: ralink: mt7621: reorder sysc node attributes
> mips: dts: ralink: mt7621: reorder gpio node attributes
> mips: dts: ralink: mt7621: reorder i2c node attributes
> mips: dts: ralink: mt7621: reorder spi0 node attributes
> mips: dts: ralink: mt7621: move pinctrl and sort its children
> mips: dts: ralink: mt7621: reorder mmc node attributes
> mips: dts: ralink: mt7621: reorder gic node attributes
> mips: dts: ralink: mt7621: reorder ethernet node attributes and kids
> mips: dts: ralink: mt7621: reorder pcie node attributes and children
> mips: dts: ralink: mt7621: reorder pci?_phy attributes
> mips: dts: ralink: mt7621: reorder the attributes of the root node
>
> arch/mips/boot/dts/ralink/mt7621.dtsi | 430 ++++++++++++++------------
> 1 file changed, 239 insertions(+), 191 deletions(-)
series applied to mips-next.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]
On Mon, Apr 08, 2024 at 10:35:07AM +0300, Arınç ÜNAL wrote:
> On 16.03.2024 07:54, Justin Swartz wrote:
> > This set of patches was created with the intention of cleaning up
> > arch/mips/boot/dts/ralink/mt7621.dtsi so that it is aligned with
> > the Devicetree Sources (DTS) Coding Style [1] [2] guide.
> >
> > [1] Documentation/devicetree/bindings/dts-coding-style.rst
> >
> > [2] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
> >
> > Justin Swartz (14):
> > mips: dts: ralink: mt7621: reorder cpu node attributes
> > mips: dts: ralink: mt7621: reorder cpuintc node attributes
> > mips: dts: ralink: mt7621: reorder mmc regulator attributes
> > mips: dts: ralink: mt7621: reorder sysc node attributes
> > mips: dts: ralink: mt7621: reorder gpio node attributes
> > mips: dts: ralink: mt7621: reorder i2c node attributes
> > mips: dts: ralink: mt7621: reorder spi0 node attributes
> > mips: dts: ralink: mt7621: move pinctrl and sort its children
> > mips: dts: ralink: mt7621: reorder mmc node attributes
> > mips: dts: ralink: mt7621: reorder gic node attributes
> > mips: dts: ralink: mt7621: reorder ethernet node attributes and kids
> > mips: dts: ralink: mt7621: reorder pcie node attributes and children
> > mips: dts: ralink: mt7621: reorder pci?_phy attributes
> > mips: dts: ralink: mt7621: reorder the attributes of the root node
> >
> > arch/mips/boot/dts/ralink/mt7621.dtsi | 430 ++++++++++++++------------
> > 1 file changed, 239 insertions(+), 191 deletions(-)
>
> Thomas, will you apply this patch series as is or should we squash it to
> one patch?
I've applied them, no need to squash.
Thomas.
--
Crap can work. Given enough thrust pigs will fly, but it's not necessarily a
good idea. [ RFC1925, 2.3 ]