2022-02-15 07:31:23

by Bjorn Andersson

Subject: [PATCH v2 1/2] drm/msm/dpu: Add INTF_5 interrupts

SC8180x has the eDP controller wired up to INTF_5, so add the interrupt
register block for this interface to the list.

Signed-off-by: Bjorn Andersson <[email protected]>
---

Changes since v1:
- None

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 6 ++++++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 1 +
2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
index a77a5eaa78ad..dd2161e7bdb6 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
@@ -23,6 +23,7 @@
#define MDP_INTF_2_OFF 0x6B000
#define MDP_INTF_3_OFF 0x6B800
#define MDP_INTF_4_OFF 0x6C000
+#define MDP_INTF_5_OFF 0x6C800
#define MDP_AD4_0_OFF 0x7C000
#define MDP_AD4_1_OFF 0x7D000
#define MDP_AD4_INTR_EN_OFF 0x41c
@@ -93,6 +94,11 @@ static const struct dpu_intr_reg dpu_intr_set[] = {
MDP_INTF_4_OFF+INTF_INTR_EN,
MDP_INTF_4_OFF+INTF_INTR_STATUS
},
+ {
+ MDP_INTF_5_OFF+INTF_INTR_CLEAR,
+ MDP_INTF_5_OFF+INTF_INTR_EN,
+ MDP_INTF_5_OFF+INTF_INTR_STATUS
+ },
{
MDP_AD4_0_OFF + MDP_AD4_INTR_CLEAR_OFF,
MDP_AD4_0_OFF + MDP_AD4_INTR_EN_OFF,
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
index 1ab75cccd145..37379966d8ec 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
@@ -22,6 +22,7 @@ enum dpu_hw_intr_reg {
MDP_INTF2_INTR,
MDP_INTF3_INTR,
MDP_INTF4_INTR,
+ MDP_INTF5_INTR,
MDP_AD4_0_INTR,
MDP_AD4_1_INTR,
MDP_INTF0_7xxx_INTR,
--
2.33.1

2022-02-15 14:43:55

by Dmitry Baryshkov

Subject: Re: [PATCH v2 1/2] drm/msm/dpu: Add INTF_5 interrupts

On 15/02/2022 07:33, Bjorn Andersson wrote:
> SC8180x has the eDP controller wired up to INTF_5, so add the interrupt
> register block for this interface to the list.
>
> Signed-off-by: Bjorn Andersson <[email protected]>

Reviewed-by: Dmitry Baryshkov <[email protected]>

> ---
>
> Changes since v1:
> - None
>
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 6 ++++++
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 1 +
> 2 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
> index a77a5eaa78ad..dd2161e7bdb6 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
> @@ -23,6 +23,7 @@
> #define MDP_INTF_2_OFF 0x6B000
> #define MDP_INTF_3_OFF 0x6B800
> #define MDP_INTF_4_OFF 0x6C000
> +#define MDP_INTF_5_OFF 0x6C800
> #define MDP_AD4_0_OFF 0x7C000
> #define MDP_AD4_1_OFF 0x7D000
> #define MDP_AD4_INTR_EN_OFF 0x41c
> @@ -93,6 +94,11 @@ static const struct dpu_intr_reg dpu_intr_set[] = {
> MDP_INTF_4_OFF+INTF_INTR_EN,
> MDP_INTF_4_OFF+INTF_INTR_STATUS
> },
> + {
> + MDP_INTF_5_OFF+INTF_INTR_CLEAR,
> + MDP_INTF_5_OFF+INTF_INTR_EN,
> + MDP_INTF_5_OFF+INTF_INTR_STATUS
> + },
> {
> MDP_AD4_0_OFF + MDP_AD4_INTR_CLEAR_OFF,
> MDP_AD4_0_OFF + MDP_AD4_INTR_EN_OFF,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
> index 1ab75cccd145..37379966d8ec 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
> @@ -22,6 +22,7 @@ enum dpu_hw_intr_reg {
> MDP_INTF2_INTR,
> MDP_INTF3_INTR,
> MDP_INTF4_INTR,
> + MDP_INTF5_INTR,
> MDP_AD4_0_INTR,
> MDP_AD4_1_INTR,
> MDP_INTF0_7xxx_INTR,


--
With best wishes
Dmitry

2022-02-16 06:20:38

by Abhinav Kumar

Subject: Re: [PATCH v2 1/2] drm/msm/dpu: Add INTF_5 interrupts

On 2/14/2022 8:33 PM, Bjorn Andersson wrote:
> SC8180x has the eDP controller wired up to INTF_5, so add the interrupt
> register block for this interface to the list.
>
> Signed-off-by: Bjorn Andersson <[email protected]>
Reviewed-by: Abhinav Kumar <[email protected]>
> ---
>
> Changes since v1:
> - None
>
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c | 6 ++++++
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h | 1 +
> 2 files changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
> index a77a5eaa78ad..dd2161e7bdb6 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c
> @@ -23,6 +23,7 @@
> #define MDP_INTF_2_OFF 0x6B000
> #define MDP_INTF_3_OFF 0x6B800
> #define MDP_INTF_4_OFF 0x6C000
> +#define MDP_INTF_5_OFF 0x6C800
> #define MDP_AD4_0_OFF 0x7C000
> #define MDP_AD4_1_OFF 0x7D000
> #define MDP_AD4_INTR_EN_OFF 0x41c
> @@ -93,6 +94,11 @@ static const struct dpu_intr_reg dpu_intr_set[] = {
> MDP_INTF_4_OFF+INTF_INTR_EN,
> MDP_INTF_4_OFF+INTF_INTR_STATUS
> },
> + {
> + MDP_INTF_5_OFF+INTF_INTR_CLEAR,
> + MDP_INTF_5_OFF+INTF_INTR_EN,
> + MDP_INTF_5_OFF+INTF_INTR_STATUS
> + },
> {
> MDP_AD4_0_OFF + MDP_AD4_INTR_CLEAR_OFF,
> MDP_AD4_0_OFF + MDP_AD4_INTR_EN_OFF,
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
> index 1ab75cccd145..37379966d8ec 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
> @@ -22,6 +22,7 @@ enum dpu_hw_intr_reg {
> MDP_INTF2_INTR,
> MDP_INTF3_INTR,
> MDP_INTF4_INTR,
> + MDP_INTF5_INTR,
> MDP_AD4_0_INTR,
> MDP_AD4_1_INTR,
> MDP_INTF0_7xxx_INTR,