LinuxLists.cc - [PATCH v2 net 0/2] net: dsa: mv88e6xxx: fix marvell 6320/21 switch probing

2024-05-08 07:30:34

Subject: [PATCH v2 net 0/2] net: dsa: mv88e6xxx: fix marvell 6320/21 switch probing

2024-05-08 07:30:43

Subject: [PATCH v2 net 1/2] net: dsa: mv88e6xxx: add phylink_get_caps for the mv88e6320/21 family

As of commit de5c9bf40c45 ("net: phylink: require supported_interfaces to
be filled")
Marvell 88e6320/21 switches fail to be probed:

..
mv88e6085 30be0000.ethernet-1:00: phylink: error: empty supported_interfaces
error creating PHYLINK: -22
..

The problem stems from the use of mv88e6185_phylink_get_caps() to get
the device capabilities.
Since there are serdes only ports 0/1 included, create a new dedicated
phylink_get_caps for the 6320 and 6321 to properly support their
set of capabilities.

Fixes: de5c9bf40c45 ("net: phylink: require supported_interfaces to be filled")

Signed-off-by: Steffen Bätz <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>

Changes since v1:
- Removed unused variables.
- Collected Reviewed-by tags from Andrew and Fabio
---
drivers/net/dsa/mv88e6xxx/chip.c | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)

diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 32416d8802ca..bd58190853c7 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -697,6 +697,18 @@ static void mv88e6352_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
}
}

+static void mv88e632x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
+ struct phylink_config *config)
+{
+ unsigned long *supported = config->supported_interfaces;
+
+ /* Translate the default cmode */
+ mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported);
+
+ config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 |
+ MAC_1000FD;
+}
+
static void mv88e6341_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
struct phylink_config *config)
{
@@ -5090,7 +5102,7 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {
.gpio_ops = &mv88e6352_gpio_ops,
.avb_ops = &mv88e6352_avb_ops,
.ptp_ops = &mv88e6352_ptp_ops,
- .phylink_get_caps = mv88e6185_phylink_get_caps,
+ .phylink_get_caps = mv88e632x_phylink_get_caps,
};

static const struct mv88e6xxx_ops mv88e6321_ops = {
@@ -5136,7 +5148,7 @@ static const struct mv88e6xxx_ops mv88e6321_ops = {
.gpio_ops = &mv88e6352_gpio_ops,
.avb_ops = &mv88e6352_avb_ops,
.ptp_ops = &mv88e6352_ptp_ops,
- .phylink_get_caps = mv88e6185_phylink_get_caps,
+ .phylink_get_caps = mv88e632x_phylink_get_caps,
};

static const struct mv88e6xxx_ops mv88e6341_ops = {
--
2.34.1

--

*innosonix GmbH*
Hauptstr. 35
96482 Ahorn
central: +49 9561 7459980
http://www.innosonix.de <http://www.innosonix.de>

innosonix GmbH
Geschäftsführer:
Markus Bätz, Steffen Bätz
USt.-IdNr / VAT-Nr.: DE266020313
EORI-Nr.:
DE240121536680271
HRB 5192 Coburg
WEEE-Reg.-Nr. DE88021242

--

2024-05-08 07:31:09

by Steffen Bätz

[permalink] [raw]

Subject: [PATCH v2 net 2/2] net: dsa: mv88e6xxx: read cmode on mv88e6320/21 serdes only ports

On the mv88e6320 and 6321 switch family, port 0/1 are serdes only ports.
Modified the mv88e6352_get_port4_serdes_cmode function to pass a port
number since the register set of the 6352 is equal on the 6320/21.

Signed-off-by: Steffen Bätz <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
Reviewed-by: Fabio Estevam <[email protected]>

Changes since v1:
- Collected Reviewed-by tags from Andrew and Fabio
---
drivers/net/dsa/mv88e6xxx/chip.c | 23 +++++++++++++++++------
1 file changed, 17 insertions(+), 6 deletions(-)

diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index bd58190853c7..6780e8c36b1f 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -637,12 +637,12 @@ static void mv88e6351_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
MAC_1000FD;
}

-static int mv88e6352_get_port4_serdes_cmode(struct mv88e6xxx_chip *chip)
+static int mv88e63xx_get_port_serdes_cmode(struct mv88e6xxx_chip *chip, int port)
{
u16 reg, val;
int err;

- err = mv88e6xxx_port_read(chip, 4, MV88E6XXX_PORT_STS, &reg);
+ err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &reg);
if (err)
return err;

@@ -651,16 +651,16 @@ static int mv88e6352_get_port4_serdes_cmode(struct mv88e6xxx_chip *chip)
return 0xf;

val = reg & ~MV88E6XXX_PORT_STS_PHY_DETECT;
- err = mv88e6xxx_port_write(chip, 4, MV88E6XXX_PORT_STS, val);
+ err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_STS, val);
if (err)
return err;

- err = mv88e6xxx_port_read(chip, 4, MV88E6XXX_PORT_STS, &val);
+ err = mv88e6xxx_port_read(chip, port, MV88E6XXX_PORT_STS, &val);
if (err)
return err;

/* Restore PHY_DETECT value */
- err = mv88e6xxx_port_write(chip, 4, MV88E6XXX_PORT_STS, reg);
+ err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_STS, reg);
if (err)
return err;

@@ -688,7 +688,7 @@ static void mv88e6352_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
if (err <= 0)
return;

- cmode = mv88e6352_get_port4_serdes_cmode(chip);
+ cmode = mv88e63xx_get_port_serdes_cmode(chip, port);
if (cmode < 0)
dev_err(chip->dev, "p%d: failed to read serdes cmode\n",
port);
@@ -701,12 +701,23 @@ static void mv88e632x_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
struct phylink_config *config)
{
unsigned long *supported = config->supported_interfaces;
+ int cmode;

/* Translate the default cmode */
mv88e6xxx_translate_cmode(chip->ports[port].cmode, supported);

config->mac_capabilities = MAC_SYM_PAUSE | MAC_10 | MAC_100 |
MAC_1000FD;
+
+ /* Port 0/1 are serdes only ports */
+ if (port == 0 || port == 1) {
+ cmode = mv88e63xx_get_port_serdes_cmode(chip, port);
+ if (cmode < 0)
+ dev_err(chip->dev, "p%d: failed to read serdes cmode\n",
+ port);
+ else
+ mv88e6xxx_translate_cmode(cmode, supported);
+ }
}

static void mv88e6341_phylink_get_caps(struct mv88e6xxx_chip *chip, int port,
--
2.34.1

--

*innosonix GmbH*
Hauptstr. 35
96482 Ahorn
central: +49 9561 7459980
http://www.innosonix.de <http://www.innosonix.de>

innosonix GmbH
Geschäftsführer:
Markus Bätz, Steffen Bätz
USt.-IdNr / VAT-Nr.: DE266020313
EORI-Nr.:
DE240121536680271
HRB 5192 Coburg
WEEE-Reg.-Nr. DE88021242

--

2024-05-09 09:52:55

by Paolo Abeni

[permalink] [raw]

Subject: Re: [PATCH v2 net 1/2] net: dsa: mv88e6xxx: add phylink_get_caps for the mv88e6320/21 family

On Wed, 2024-05-08 at 09:29 +0200, Steffen Bätz wrote:
> As of commit de5c9bf40c45 ("net: phylink: require supported_interfaces to
> be filled")
> Marvell 88e6320/21 switches fail to be probed:
>
> ...
> mv88e6085 30be0000.ethernet-1:00: phylink: error: empty supported_interfaces
> error creating PHYLINK: -22
> ...
>
> The problem stems from the use of mv88e6185_phylink_get_caps() to get
> the device capabilities.
> Since there are serdes only ports 0/1 included, create a new dedicated
> phylink_get_caps for the 6320 and 6321 to properly support their
> set of capabilities.
>
> Fixes: de5c9bf40c45 ("net: phylink: require supported_interfaces to be filled")
>
> Signed-off-by: Steffen Bätz <[email protected]>
> Reviewed-by: Andrew Lunn <[email protected]>
> Reviewed-by: Fabio Estevam <[email protected]>
>
> Changes since v1:
> - Removed unused variables.
> - Collected Reviewed-by tags from Andrew and Fabio

The changelog should come after a '---' separator, so it will not be
included into the commit message, and you must avoid the empty line
after the fixes tag.

I made the above changes while applying the patch, but this is really
an exception, please take care for the next submissions.

Cheers,

Paolo

2024-05-09 10:11:02

by patchwork-bot+netdevbpf

[permalink] [raw]

Subject: Re: [PATCH v2 net 0/2] net: dsa: mv88e6xxx: fix marvell 6320/21 switch probing

Hello:

This series was applied to netdev/net.git (main)
by Paolo Abeni <[email protected]>:

On Wed, 8 May 2024 09:29:42 +0200 you wrote:
> As of commit de5c9bf40c45 ("net: phylink: require supported_interfaces to
> be filled")
> Marvell 88e6320/21 switches fail to be probed:
>
> ...
> mv88e6085 30be0000.ethernet-1:00: phylink: error: empty supported_interfaces
> error creating PHYLINK: -22
> ...
>
> [...]

Here is the summary with links:
- [v2,net,1/2] net: dsa: mv88e6xxx: add phylink_get_caps for the mv88e6320/21 family
https://git.kernel.org/netdev/net/c/f39bf3cf08a4
- [v2,net,2/2] net: dsa: mv88e6xxx: read cmode on mv88e6320/21 serdes only ports
https://git.kernel.org/netdev/net/c/6e7ffa180a53

You are awesome, thank you!
--
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