The patches are based in Kukjin's for-next branch.
Sachin Kamat (2):
ARM: dts: exynos4210: Add LCD related pinctrl entries
ARM: dts: Add FIMD node to Origen4210 board
Tushar Behera (1):
ARM: dts: Set BUCK7 as always on for Origen board
arch/arm/boot/dts/exynos4210-origen.dts | 22 +++++++++
arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 75 +++++++++++++++++++++++++++++
2 files changed, 97 insertions(+)
--
1.7.9.5
From: Sachin Kamat <[email protected]>
Adds pinctrl entries required by FIMD.
Signed-off-by: Sachin Kamat <[email protected]>
Signed-off-by: Tushar Behera <[email protected]>
---
arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 75 +++++++++++++++++++++++++++++
1 file changed, 75 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
index 55a2efb..d241726 100644
--- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
+++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
@@ -330,6 +330,81 @@
samsung,pin-pud = <3>;
samsung,pin-drv = <0>;
};
+
+ pwm0_out: pwm0-out {
+ samsung,pins = "gpd0-0";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ pwm1_out: pwm1-out {
+ samsung,pins = "gpd0-1";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ lcd_ctrl: lcd-ctrl {
+ samsung,pins = "gpd0-0", "gpd0-1";
+ samsung,pin-function = <3>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ lcd_sync: lcd-sync {
+ samsung,pins = "gpf0-0", "gpf0-1";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ lcd_en: lcd-en {
+ samsung,pins = "gpe3-4";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ lcd_clk: lcd-clk {
+ samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2", "gpf0-3";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ lcd_data16: lcd-data-width16 {
+ samsung,pins = "gpf0-7", "gpf1-0", "gpf1-1", "gpf1-2",
+ "gpf1-3", "gpf1-6", "gpf1-7", "gpf2-0",
+ "gpf2-1", "gpf2-2", "gpf2-3", "gpf2-7",
+ "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ lcd_data18: lcd-data-width18 {
+ samsung,pins = "gpf0-6", "gpf0-7", "gpf1-0", "gpf1-1",
+ "gpf1-2", "gpf1-3", "gpf1-6", "gpf1-7",
+ "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
+ "gpf2-6", "gpf2-7", "gpf3-0", "gpf3-1",
+ "gpf3-2", "gpf3-3";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
+
+ lcd_data24: lcd-data-width24 {
+ samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6", "gpf0-7",
+ "gpf1-0", "gpf1-1", "gpf1-2", "gpf1-3",
+ "gpf1-4", "gpf1-5", "gpf1-6", "gpf1-7",
+ "gpf2-0", "gpf2-1", "gpf2-2", "gpf2-3",
+ "gpf2-4", "gpf2-5", "gpf2-6", "gpf2-7",
+ "gpf3-0", "gpf3-1", "gpf3-2", "gpf3-3";
+ samsung,pin-function = <2>;
+ samsung,pin-pud = <0>;
+ samsung,pin-drv = <0>;
+ };
};
pinctrl@11000000 {
--
1.7.9.5
The LDO for LCD driver is currently not handled by any of the drivers.
This disables the LDO during booting time. To fix this, the LDO
is forced to enabled always.
Signed-off-by: Tushar Behera <[email protected]>
---
arch/arm/boot/dts/exynos4210-origen.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index 4c6c3cd..08609b8 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -225,6 +225,7 @@
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
+ regulator-always-on;
};
};
};
--
1.7.9.5
From: Sachin Kamat <[email protected]>
Added FIMD and display timing node to Origen4210 board.
Signed-off-by: Sachin Kamat <[email protected]>
Signed-off-by: Tushar Behera <[email protected]>
---
arch/arm/boot/dts/exynos4210-origen.dts | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4210-origen.dts b/arch/arm/boot/dts/exynos4210-origen.dts
index bcf8079..4c6c3cd 100644
--- a/arch/arm/boot/dts/exynos4210-origen.dts
+++ b/arch/arm/boot/dts/exynos4210-origen.dts
@@ -290,4 +290,25 @@
clock-frequency = <24000000>;
};
};
+
+ fimd@11c00000 {
+ pinctrl-0 = <&lcd_en &lcd_clk &lcd_data24 &pwm0_out>;
+ pinctrl-names = "default";
+ status = "okay";
+ };
+
+ display-timings {
+ native-mode = <&timing0>;
+ timing0: timing {
+ clock-frequency = <50000>;
+ hactive = <1024>;
+ vactive = <600>;
+ hfront-porch = <64>;
+ hback-porch = <16>;
+ hsync-len = <48>;
+ vback-porch = <64>;
+ vfront-porch = <16>;
+ vsync-len = <3>;
+ };
+ };
};
--
1.7.9.5
Hi Tushar, Sachin,
On Friday 07 of June 2013 16:37:13 Tushar Behera wrote:
> From: Sachin Kamat <[email protected]>
>
> Adds pinctrl entries required by FIMD.
>
> Signed-off-by: Sachin Kamat <[email protected]>
> Signed-off-by: Tushar Behera <[email protected]>
> ---
> arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 75
> +++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
> b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi index 55a2efb..d241726
> 100644
> --- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
> +++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
> @@ -330,6 +330,81 @@
> samsung,pin-pud = <3>;
> samsung,pin-drv = <0>;
> };
> +
> + pwm0_out: pwm0-out {
> + samsung,pins = "gpd0-0";
> + samsung,pin-function = <2>;
> + samsung,pin-pud = <0>;
> + samsung,pin-drv = <0>;
> + };
> +
> + pwm1_out: pwm1-out {
> + samsung,pins = "gpd0-1";
> + samsung,pin-function = <2>;
> + samsung,pin-pud = <0>;
> + samsung,pin-drv = <0>;
> + };
Hmm, these two seem to be unrelated. Rebase error? :)
> + lcd_ctrl: lcd-ctrl {
> + samsung,pins = "gpd0-0", "gpd0-1";
> + samsung,pin-function = <3>;
> + samsung,pin-pud = <0>;
> + samsung,pin-drv = <0>;
> + };
> +
> + lcd_sync: lcd-sync {
> + samsung,pins = "gpf0-0", "gpf0-1";
> + samsung,pin-function = <2>;
> + samsung,pin-pud = <0>;
> + samsung,pin-drv = <0>;
> + };
> +
> + lcd_en: lcd-en {
> + samsung,pins = "gpe3-4";
> + samsung,pin-function = <2>;
> + samsung,pin-pud = <0>;
> + samsung,pin-drv = <0>;
> + };
> +
> + lcd_clk: lcd-clk {
> + samsung,pins = "gpf0-0", "gpf0-1", "gpf0-2",
"gpf0-3";
> + samsung,pin-function = <2>;
> + samsung,pin-pud = <0>;
> + samsung,pin-drv = <0>;
> + };
> +
> + lcd_data16: lcd-data-width16 {
> + samsung,pins = "gpf0-7", "gpf1-0", "gpf1-1",
"gpf1-2",
> + "gpf1-3", "gpf1-6", "gpf1-7",
"gpf2-0",
> + "gpf2-1", "gpf2-2", "gpf2-3",
"gpf2-7",
> + "gpf3-0", "gpf3-1", "gpf3-2",
"gpf3-3";
> + samsung,pin-function = <2>;
> + samsung,pin-pud = <0>;
> + samsung,pin-drv = <0>;
> + };
> +
> + lcd_data18: lcd-data-width18 {
> + samsung,pins = "gpf0-6", "gpf0-7", "gpf1-0",
"gpf1-1",
> + "gpf1-2", "gpf1-3", "gpf1-6",
"gpf1-7",
> + "gpf2-0", "gpf2-1", "gpf2-2",
"gpf2-3",
> + "gpf2-6", "gpf2-7", "gpf3-0",
"gpf3-1",
> + "gpf3-2", "gpf3-3";
> + samsung,pin-function = <2>;
> + samsung,pin-pud = <0>;
> + samsung,pin-drv = <0>;
> + };
> +
> + lcd_data24: lcd-data-width24 {
> + samsung,pins = "gpf0-4", "gpf0-5", "gpf0-6",
"gpf0-7",
> + "gpf1-0", "gpf1-1", "gpf1-2",
"gpf1-3",
> + "gpf1-4", "gpf1-5", "gpf1-6",
"gpf1-7",
> + "gpf2-0", "gpf2-1", "gpf2-2",
"gpf2-3",
> + "gpf2-4", "gpf2-5", "gpf2-6",
"gpf2-7",
> + "gpf3-0", "gpf3-1", "gpf3-2",
"gpf3-3";
> + samsung,pin-function = <2>;
> + samsung,pin-pud = <0>;
> + samsung,pin-drv = <0>;
> + };
> };
>
> pinctrl@11000000 {
Otherwise looks good to me.
Best regards,
Tomasz
On Friday 07 of June 2013 16:37:14 Tushar Behera wrote:
> From: Sachin Kamat <[email protected]>
>
> Added FIMD and display timing node to Origen4210 board.
>
> Signed-off-by: Sachin Kamat <[email protected]>
> Signed-off-by: Tushar Behera <[email protected]>
> ---
> arch/arm/boot/dts/exynos4210-origen.dts | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos4210-origen.dts
> b/arch/arm/boot/dts/exynos4210-origen.dts index bcf8079..4c6c3cd 100644
> --- a/arch/arm/boot/dts/exynos4210-origen.dts
> +++ b/arch/arm/boot/dts/exynos4210-origen.dts
> @@ -290,4 +290,25 @@
> clock-frequency = <24000000>;
> };
> };
> +
> + fimd@11c00000 {
> + pinctrl-0 = <&lcd_en &lcd_clk &lcd_data24 &pwm0_out>;
Ahh, this would explain the two pwm pin groups from previous patch.
This seems somehow incorrect, though. AFAIK PWM outputs are not managed by
FIMD in any way.
> + pinctrl-names = "default";
> + status = "okay";
> + };
> +
> + display-timings {
> + native-mode = <&timing0>;
> + timing0: timing {
> + clock-frequency = <50000>;
Hmm, 50 KHz for pixel clock? Isn't it a bit too low? Or am I missing
something?
Best regards,
Tomasz
> + hactive = <1024>;
> + vactive = <600>;
> + hfront-porch = <64>;
> + hback-porch = <16>;
> + hsync-len = <48>;
> + vback-porch = <64>;
> + vfront-porch = <16>;
> + vsync-len = <3>;
> + };
> + };
> };
On 06/08/2013 04:16 PM, Tomasz Figa wrote:
> Hi Tushar, Sachin,
>
> On Friday 07 of June 2013 16:37:13 Tushar Behera wrote:
>> From: Sachin Kamat <[email protected]>
>>
>> Adds pinctrl entries required by FIMD.
>>
>> Signed-off-by: Sachin Kamat <[email protected]>
>> Signed-off-by: Tushar Behera <[email protected]>
>> ---
>> arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 75
>> +++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
>> b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi index 55a2efb..d241726
>> 100644
>> --- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
>> +++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
>> @@ -330,6 +330,81 @@
>> samsung,pin-pud = <3>;
>> samsung,pin-drv = <0>;
>> };
>> +
>> + pwm0_out: pwm0-out {
>> + samsung,pins = "gpd0-0";
>> + samsung,pin-function = <2>;
>> + samsung,pin-pud = <0>;
>> + samsung,pin-drv = <0>;
>> + };
>> +
>> + pwm1_out: pwm1-out {
>> + samsung,pins = "gpd0-1";
>> + samsung,pin-function = <2>;
>> + samsung,pin-pud = <0>;
>> + samsung,pin-drv = <0>;
>> + };
>
> Hmm, these two seem to be unrelated. Rebase error? :)
>
Not a rebase error. pwm0_out needs to configured to get display on LCD.
--
Tushar Behera
On 06/08/2013 04:19 PM, Tomasz Figa wrote:
> On Friday 07 of June 2013 16:37:14 Tushar Behera wrote:
>> From: Sachin Kamat <[email protected]>
>>
>> Added FIMD and display timing node to Origen4210 board.
>>
>> Signed-off-by: Sachin Kamat <[email protected]>
>> Signed-off-by: Tushar Behera <[email protected]>
>> ---
>> arch/arm/boot/dts/exynos4210-origen.dts | 21 +++++++++++++++++++++
>> 1 file changed, 21 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/exynos4210-origen.dts
>> b/arch/arm/boot/dts/exynos4210-origen.dts index bcf8079..4c6c3cd 100644
>> --- a/arch/arm/boot/dts/exynos4210-origen.dts
>> +++ b/arch/arm/boot/dts/exynos4210-origen.dts
>> @@ -290,4 +290,25 @@
>> clock-frequency = <24000000>;
>> };
>> };
>> +
>> + fimd@11c00000 {
>> + pinctrl-0 = <&lcd_en &lcd_clk &lcd_data24 &pwm0_out>;
>
> Ahh, this would explain the two pwm pin groups from previous patch.
>
> This seems somehow incorrect, though. AFAIK PWM outputs are not managed by
> FIMD in any way.
>
I couldn't find any better place to put the pwm0_out pin configurations.
Without configuring pwm0_out pins, display doesn't come up on the LCD.
Any suggestions?
>> + pinctrl-names = "default";
>> + status = "okay";
>> + };
>> +
>> + display-timings {
>> + native-mode = <&timing0>;
>> + timing0: timing {
>> + clock-frequency = <50000>;
>
> Hmm, 50 KHz for pixel clock? Isn't it a bit too low? Or am I missing
> something?
>
Actually clock-frequency value is not used by DRM-FIMD, but instead
required by the framework.
Still it would be better to provide the actual pixel clock value here.
So I would update this with 40MHz which is actual pixel clock used on my
board.
> Best regards,
> Tomasz
>
>> + hactive = <1024>;
>> + vactive = <600>;
>> + hfront-porch = <64>;
>> + hback-porch = <16>;
>> + hsync-len = <48>;
>> + vback-porch = <64>;
>> + vfront-porch = <16>;
>> + vsync-len = <3>;
>> + };
>> + };
>> };
Thanks for your review.
--
Tushar Behera
On Monday 10 of June 2013 09:40:43 Tushar Behera wrote:
> On 06/08/2013 04:16 PM, Tomasz Figa wrote:
> > Hi Tushar, Sachin,
> >
> > On Friday 07 of June 2013 16:37:13 Tushar Behera wrote:
> >> From: Sachin Kamat <[email protected]>
> >>
> >> Adds pinctrl entries required by FIMD.
> >>
> >> Signed-off-by: Sachin Kamat <[email protected]>
> >> Signed-off-by: Tushar Behera <[email protected]>
> >> ---
> >>
> >> arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 75
> >>
> >> +++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+)
> >>
> >> diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
> >> b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi index 55a2efb..d241726
> >> 100644
> >> --- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
> >> +++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
> >> @@ -330,6 +330,81 @@
> >>
> >> samsung,pin-pud = <3>;
> >> samsung,pin-drv = <0>;
> >>
> >> };
> >>
> >> +
> >> + pwm0_out: pwm0-out {
> >> + samsung,pins = "gpd0-0";
> >> + samsung,pin-function = <2>;
> >> + samsung,pin-pud = <0>;
> >> + samsung,pin-drv = <0>;
> >> + };
> >> +
> >> + pwm1_out: pwm1-out {
> >> + samsung,pins = "gpd0-1";
> >> + samsung,pin-function = <2>;
> >> + samsung,pin-pud = <0>;
> >> + samsung,pin-drv = <0>;
> >> + };
> >
> > Hmm, these two seem to be unrelated. Rebase error? :)
>
> Not a rebase error. pwm0_out needs to configured to get display on LCD.
Please split this into two separate patches than, one adding LCD pin
configuration nodes and one adding PWM pin configuration nodes.
Also I think it would be better to just define all available PWM outputs
not only first two. if you are already at adding PWM pin configurations.
Thanks,
Tomasz
On Monday 10 of June 2013 09:44:14 Tushar Behera wrote:
> On 06/08/2013 04:19 PM, Tomasz Figa wrote:
> > On Friday 07 of June 2013 16:37:14 Tushar Behera wrote:
> >> From: Sachin Kamat <[email protected]>
> >>
> >> Added FIMD and display timing node to Origen4210 board.
> >>
> >> Signed-off-by: Sachin Kamat <[email protected]>
> >> Signed-off-by: Tushar Behera <[email protected]>
> >> ---
> >>
> >> arch/arm/boot/dts/exynos4210-origen.dts | 21 +++++++++++++++++++++
> >> 1 file changed, 21 insertions(+)
> >>
> >> diff --git a/arch/arm/boot/dts/exynos4210-origen.dts
> >> b/arch/arm/boot/dts/exynos4210-origen.dts index bcf8079..4c6c3cd
> >> 100644
> >> --- a/arch/arm/boot/dts/exynos4210-origen.dts
> >> +++ b/arch/arm/boot/dts/exynos4210-origen.dts
> >> @@ -290,4 +290,25 @@
> >>
> >> clock-frequency = <24000000>;
> >>
> >> };
> >>
> >> };
> >>
> >> +
> >> + fimd@11c00000 {
> >> + pinctrl-0 = <&lcd_en &lcd_clk &lcd_data24 &pwm0_out>;
> >
> > Ahh, this would explain the two pwm pin groups from previous patch.
> >
> > This seems somehow incorrect, though. AFAIK PWM outputs are not
> > managed by FIMD in any way.
>
> I couldn't find any better place to put the pwm0_out pin configurations.
> Without configuring pwm0_out pins, display doesn't come up on the LCD.
> Any suggestions?
Isn't there a PWM backlight driver? With my [PATCH 00/15] Final Samsung
PWM support cleanup patches, a DT-compatible PWM driver is being added, so
it should be possible to use it in your case.
> >> + pinctrl-names = "default";
> >> + status = "okay";
> >> + };
> >> +
> >> + display-timings {
> >> + native-mode = <&timing0>;
> >> + timing0: timing {
> >> + clock-frequency = <50000>;
> >
> > Hmm, 50 KHz for pixel clock? Isn't it a bit too low? Or am I missing
> > something?
>
> Actually clock-frequency value is not used by DRM-FIMD, but instead
> required by the framework.
>
> Still it would be better to provide the actual pixel clock value here.
> So I would update this with 40MHz which is actual pixel clock used on my
> board.
Yes, I think this is a much better idea.
Thanks,
Tomasz
> > Best regards,
> > Tomasz
> >
> >> + hactive = <1024>;
> >> + vactive = <600>;
> >> + hfront-porch = <64>;
> >> + hback-porch = <16>;
> >> + hsync-len = <48>;
> >> + vback-porch = <64>;
> >> + vfront-porch = <16>;
> >> + vsync-len = <3>;
> >> + };
> >> + };
> >>
> >> };
>
> Thanks for your review.
On 06/11/2013 12:00 AM, Tomasz Figa wrote:
> On Monday 10 of June 2013 09:40:43 Tushar Behera wrote:
>> On 06/08/2013 04:16 PM, Tomasz Figa wrote:
>>> Hi Tushar, Sachin,
>>>
>>> On Friday 07 of June 2013 16:37:13 Tushar Behera wrote:
>>>> From: Sachin Kamat <[email protected]>
>>>>
>>>> Adds pinctrl entries required by FIMD.
>>>>
>>>> Signed-off-by: Sachin Kamat <[email protected]>
>>>> Signed-off-by: Tushar Behera <[email protected]>
>>>> ---
>>>>
>>>> arch/arm/boot/dts/exynos4210-pinctrl.dtsi | 75
>>>>
>>>> +++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+)
>>>>
>>>> diff --git a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
>>>> b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi index 55a2efb..d241726
>>>> 100644
>>>> --- a/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
>>>> +++ b/arch/arm/boot/dts/exynos4210-pinctrl.dtsi
>>>> @@ -330,6 +330,81 @@
>>>>
>>>> samsung,pin-pud = <3>;
>>>> samsung,pin-drv = <0>;
>>>>
>>>> };
>>>>
>>>> +
>>>> + pwm0_out: pwm0-out {
>>>> + samsung,pins = "gpd0-0";
>>>> + samsung,pin-function = <2>;
>>>> + samsung,pin-pud = <0>;
>>>> + samsung,pin-drv = <0>;
>>>> + };
>>>> +
>>>> + pwm1_out: pwm1-out {
>>>> + samsung,pins = "gpd0-1";
>>>> + samsung,pin-function = <2>;
>>>> + samsung,pin-pud = <0>;
>>>> + samsung,pin-drv = <0>;
>>>> + };
>>>
>>> Hmm, these two seem to be unrelated. Rebase error? :)
>>
>> Not a rebase error. pwm0_out needs to configured to get display on LCD.
>
> Please split this into two separate patches than, one adding LCD pin
> configuration nodes and one adding PWM pin configuration nodes.
>
> Also I think it would be better to just define all available PWM outputs
> not only first two. if you are already at adding PWM pin configurations.
>
Sure.
> Thanks,
> Tomasz
>
Thanks.
--
Tushar Behera