According to spec, microcode should only be applied to actual cores. As
things are currently structured, looks like the fix would be in
microcode_core.c. I don't think changing the loop to look for cores vs.
cpu's would affect anything adversely, but honestly am not familiar
enough with this code or other cpu types to be sure.
As far as I can tell, the only adverse impact of this issue is boot
performance in the event that microcode is applied to a large number of
processors in a hyper-threaded environment. I've only got one chip, so
no real issues here. Just happened to notice.
On Wed, 02 Dec 2009 23:06:19 -0500
Michael Breuer <[email protected]> wrote:
> According to spec, microcode should only be applied to actual cores.
> As things are currently structured, looks like the fix would be in
> microcode_core.c. I don't think changing the loop to look for cores
> vs. cpu's would affect anything adversely, but honestly am not
> familiar enough with this code or other cpu types to be sure.
>
isn't this
for each (logical) cpu
check microcode version of the cpu
if too old, apply microcode
the 2nd pair of a hyperthreading pair will never see the 'too old' case
happen...
--
Arjan van de Ven Intel Open Source Technology Centre
For development, discussion and tips for power savings,
visit http://www.lesswatts.org
Fair point - guess it's a different bug. Looks like the mechanism sets
up the requests first for all cpus, then loads them. apply_microcode
doesn't recheck.
CPU is a core i7 920; ht enabled. cpuinfo shows 4 cores; 8 cpus, as
expected.
From my log:
Dec 2 16:53:47 mail kernel: microcode: CPU0 sig=0x106a5, pf=0x2,
revision=0xf
Dec 2 16:53:47 mail kernel: platform microcode: firmware: requesting
intel-ucode/06-1a-05
Dec 2 16:53:47 mail kernel: microcode: CPU1 sig=0x106a5, pf=0x2,
revision=0xf
Dec 2 16:53:47 mail kernel: platform microcode: firmware: requesting
intel-ucode/06-1a-05
Dec 2 16:53:47 mail kernel: microcode: CPU2 sig=0x106a5, pf=0x2,
revision=0xf
Dec 2 16:53:47 mail kernel: platform microcode: firmware: requesting
intel-ucode/06-1a-05
Dec 2 16:53:47 mail kernel: microcode: CPU3 sig=0x106a5, pf=0x2,
revision=0xf
Dec 2 16:53:47 mail kernel: platform microcode: firmware: requesting
intel-ucode/06-1a-05
Dec 2 16:53:47 mail kernel: microcode: CPU4 sig=0x106a5, pf=0x2,
revision=0xf
Dec 2 16:53:47 mail kernel: platform microcode: firmware: requesting
intel-ucode/06-1a-05
Dec 2 16:53:47 mail kernel: microcode: CPU5 sig=0x106a5, pf=0x2,
revision=0xf
Dec 2 16:53:47 mail kernel: platform microcode: firmware: requesting
intel-ucode/06-1a-05
Dec 2 16:53:47 mail kernel: microcode: CPU6 sig=0x106a5, pf=0x2,
revision=0xf
Dec 2 16:53:47 mail kernel: platform microcode: firmware: requesting
intel-ucode/06-1a-05
Dec 2 16:53:47 mail kernel: microcode: CPU7 sig=0x106a5, pf=0x2,
revision=0xf
Dec 2 16:53:47 mail kernel: platform microcode: firmware: requesting
intel-ucode/06-1a-05
Dec 2 16:53:47 mail kernel: microcode: CPU0 updated to revision 0x11,
date = 2009-04-14
Dec 2 16:53:47 mail kernel: microcode: CPU1 updated to revision 0x11,
date = 2009-04-14
Dec 2 16:53:47 mail kernel: microcode: CPU2 updated to revision 0x11,
date = 2009-04-14
Dec 2 16:53:47 mail kernel: microcode: CPU3 updated to revision 0x11,
date = 2009-04-14
Dec 2 16:53:47 mail kernel: microcode: CPU4 updated to revision 0x11,
date = 2009-04-14
Dec 2 16:53:47 mail kernel: microcode: CPU5 updated to revision 0x11,
date = 2009-04-14
Dec 2 16:53:47 mail kernel: microcode: CPU6 updated to revision 0x11,
date = 2009-04-14
Dec 2 16:53:47 mail kernel: microcode: CPU7 updated to revision 0x11,
date = 2009-04-14
On 12/02/2009 11:20 PM, Arjan van de Ven wrote:
> On Wed, 02 Dec 2009 23:06:19 -0500
> Michael Breuer<[email protected]> wrote:
>
>
>> According to spec, microcode should only be applied to actual cores.
>> As things are currently structured, looks like the fix would be in
>> microcode_core.c. I don't think changing the loop to look for cores
>> vs. cpu's would affect anything adversely, but honestly am not
>> familiar enough with this code or other cpu types to be sure.
>>
>>
> isn't this
>
> for each (logical) cpu
> check microcode version of the cpu
> if too old, apply microcode
>
> the 2nd pair of a hyperthreading pair will never see the 'too old' case
> happen...
>
>
>
On Wed, 02 Dec 2009 23:34:40 -0500
Michael Breuer <[email protected]> wrote:
> Fair point - guess it's a different bug. Looks like the mechanism
> sets up the requests first for all cpus, then loads them.
> apply_microcode doesn't recheck.
>
ok that's likely the real bug ...
--
Arjan van de Ven Intel Open Source Technology Centre
For development, discussion and tips for power savings,
visit http://www.lesswatts.org