Some hosts (e.g. as found in CNS3xxx SOCs) report wrong value in
CLOCK_BASE capability field, and currently there is no way to
force the SDHCI core to use the platform-provided base clock value.
This patch implements CAP_CLOCK_BASE_BROKEN quirk. When enabled,
the SDHCI core will always use base clock frequency provided by
the platform.
Signed-off-by: Anton Vorontsov <[email protected]>
---
drivers/mmc/host/sdhci.c | 3 ++-
drivers/mmc/host/sdhci.h | 2 ++
2 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index c279fbc..aedf4a1 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -1745,7 +1745,8 @@ int sdhci_add_host(struct sdhci_host *host)
host->max_clk =
(caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
host->max_clk *= 1000000;
- if (host->max_clk == 0) {
+ if (host->max_clk == 0 || host->quirks &
+ SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN) {
if (!host->ops->get_max_clock) {
printk(KERN_ERR
"%s: Hardware doesn't specify base clock "
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 842f46f..831bf7f 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -236,6 +236,8 @@ struct sdhci_host {
#define SDHCI_QUIRK_DELAY_AFTER_POWER (1<<23)
/* Controller uses SDCLK instead of TMCLK for data timeouts */
#define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK (1<<24)
+/* Controller reports wrong base clock capability */
+#define SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN (1<<25)
int irq; /* Device IRQ */
void __iomem * ioaddr; /* Mapped address */
--
1.7.0
Anton Vorontsov wrote:
> Some hosts (e.g. as found in CNS3xxx SOCs) report wrong value in
> CLOCK_BASE capability field, and currently there is no way to
> force the SDHCI core to use the platform-provided base clock value.
I don't think this needs a new quirk. Change the sdhci driver to check
if the platform provides a value before reading the standard register.
David
--
David Vrabel, Senior Software Engineer, Drivers
CSR, Churchill House, Cambridge Business Park, Tel: +44 (0)1223 692562
Cowley Road, Cambridge, CB4 0WZ http://www.csr.com/
Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom
On Fri, Feb 19, 2010 at 07:55:30PM +0000, David Vrabel wrote:
> Anton Vorontsov wrote:
> > Some hosts (e.g. as found in CNS3xxx SOCs) report wrong value in
> > CLOCK_BASE capability field, and currently there is no way to
> > force the SDHCI core to use the platform-provided base clock value.
>
> I don't think this needs a new quirk. Change the sdhci driver to check
> if the platform provides a value before reading the standard register.
Well, Pierre once said that by default we should conform to the
SDHCI spec, and any diviations from the spec should be handled by
the quirks:
http://linux.derkeiler.com/Mailing-Lists/Kernel/2009-02/msg03385.html
Spec clearly states that base clock == 0 is the case when we should
fall back to the platform-provided clocks.
So, for controllers that conform to the spec, following might be
true:
- Platform provides its own (alternate) clock, but
- SDHCI block choose not to use it, and doesn't clear bits in the
capability register
- Then the driver should not use the platform provided clock.
Thanks,
--
Anton Vorontsov
email: [email protected]
irc://irc.freenode.net/bd2