2024-01-24 09:25:52

by Philipp Zabel

Subject: [PATCH 2/2] drm/etnaviv: Disable SH_EU clock gating on VIPNano-Si+

Disable SH_EU clock gating for the VIPNano-Si+ NPU on i.MX8MP.
Taken from linux-imx lf-6.1.36-2.1.0, specifically [1].

[1] https://github.com/nxp-imx/linux-imx/blob/lf-6.1.36-2.1.0/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c#L2747-L2761

Signed-off-by: Philipp Zabel <[email protected]>
---
drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
index 9b8445d2a128..e28332a2560d 100644
--- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
+++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
@@ -641,6 +641,10 @@ static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu)
pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SE |
VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA;

+ /* Disable SH_EU clock gating on affected core revisions. */
+ if (etnaviv_is_model_rev(gpu, GC8000, 0x8002))
+ pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SH_EU;
+
pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_HZ;
pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_EZ;


--
2.39.2

2024-01-24 16:10:28

by Lucas Stach

Subject: Re: [PATCH 2/2] drm/etnaviv: Disable SH_EU clock gating on VIPNano-Si+

Am Mittwoch, dem 24.01.2024 um 10:22 +0100 schrieb Philipp Zabel:
> Disable SH_EU clock gating for the VIPNano-Si+ NPU on i.MX8MP.
> Taken from linux-imx lf-6.1.36-2.1.0, specifically [1].
>
> [1] https://github.com/nxp-imx/linux-imx/blob/lf-6.1.36-2.1.0/drivers/mxc/gpu-viv/hal/kernel/arch/gc_hal_kernel_hardware.c#L2747-L2761
>
> Signed-off-by: Philipp Zabel <[email protected]>
> ---
> drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> index 9b8445d2a128..e28332a2560d 100644
> --- a/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> +++ b/drivers/gpu/drm/etnaviv/etnaviv_gpu.c
> @@ -641,6 +641,10 @@ static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu)
> pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SE |
> VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA;
>
> + /* Disable SH_EU clock gating on affected core revisions. */
> + if (etnaviv_is_model_rev(gpu, GC8000, 0x8002))
> + pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_SH_EU;
> +
With the other clock gate disables in the driver we match on all chip
revisions found in downstream drivers, even if etnaviv hasn't been
tested with the specific GPU. To stay consistent, this workaround
should also match GC8000r7200 and GC9200r6304, same as the downstream
driver.

Regards,
Lucas