The series add the ESM & main domain watchdog nodes for j721s2,
j784s4 SOCs.
Changes in v5/v6:
* Updated commit log and added comments for MCU & non-A72 watchdog
instances disabling.
Changes in v4:
* Added bootph-pre-ram for all the ESM instances needed for SPL.
Changes in v3:
* Added all the RTI events for MAIN_ESM for j784s4 as 8 instances
are enabled.
* Rebased on top of 6.6-rc1
* Tested for the watchdog reset
RESEND series - corrected [email protected] ID
Changes in v2:
* Added all the instances of watchdog on j784s4/j721s2
* Fixed all 0x0 in dts to 0x00
* Fixed couple of ESM event numbers for j721s2
* Rebased to linux-next branch
Keerthy (7):
arm64: dts: ti: k3-j721s2: Add ESM instances
arm64: dts: ti: k3-j784s4: Add ESM instances
arm64: dts: ti: k3-j7200: Add MCU domain ESM instance
arm64: dts: ti: k3-j784s4-main: Add the main domain watchdog instances
arm64: dts: ti: k3-j784s4-mcu: Add the mcu domain watchdog instances
arm64: dts: ti: k3-j721s2-main: Add the main domain watchdog instances
dts: ti: k3-j712s2-mcu: Add the mcu domain watchdog instances
.../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 7 +
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 100 +++++++++
.../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 38 ++++
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 195 ++++++++++++++++++
.../boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 38 ++++
5 files changed, 378 insertions(+)
--
2.17.1
There are totally 19 instances of watchdog module. One each for the
8 A72 cores, one each for the 4 C7x cores, 1 for the GPU, 1 each
for the 6 R5F cores in the main domain. The non-A72 instances are
coupled with the R5Fs, C7x & GPU instances. Disabling them as they are
not used by Linux & will be used by their respective firmware.
Signed-off-by: Keerthy <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 187 +++++++++++++++++++++
1 file changed, 187 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index 26dc3776f911..852f4ef64fd8 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -1576,4 +1576,191 @@
<695>;
bootph-pre-ram;
};
+
+ watchdog0: watchdog@2200000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2200000 0x00 0x100>;
+ clocks = <&k3_clks 348 1>;
+ power-domains = <&k3_pds 348 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 348 0>;
+ assigned-clock-parents = <&k3_clks 348 4>;
+ };
+
+ watchdog1: watchdog@2210000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2210000 0x00 0x100>;
+ clocks = <&k3_clks 349 1>;
+ power-domains = <&k3_pds 349 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 349 0>;
+ assigned-clock-parents = <&k3_clks 349 4>;
+ };
+
+ watchdog2: watchdog@2220000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2220000 0x00 0x100>;
+ clocks = <&k3_clks 350 1>;
+ power-domains = <&k3_pds 350 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 350 0>;
+ assigned-clock-parents = <&k3_clks 350 4>;
+ };
+
+ watchdog3: watchdog@2230000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2230000 0x00 0x100>;
+ clocks = <&k3_clks 351 1>;
+ power-domains = <&k3_pds 351 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 351 0>;
+ assigned-clock-parents = <&k3_clks 351 4>;
+ };
+
+ watchdog4: watchdog@2240000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2240000 0x00 0x100>;
+ clocks = <&k3_clks 352 1>;
+ power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 352 0>;
+ assigned-clock-parents = <&k3_clks 352 4>;
+ };
+
+ watchdog5: watchdog@2250000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2250000 0x00 0x100>;
+ clocks = <&k3_clks 353 1>;
+ power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 353 0>;
+ assigned-clock-parents = <&k3_clks 353 4>;
+ };
+
+ watchdog6: watchdog@2260000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2260000 0x00 0x100>;
+ clocks = <&k3_clks 354 1>;
+ power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 354 0>;
+ assigned-clock-parents = <&k3_clks 354 4>;
+ };
+
+ watchdog7: watchdog@2270000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2270000 0x00 0x100>;
+ clocks = <&k3_clks 355 1>;
+ power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 355 0>;
+ assigned-clock-parents = <&k3_clks 355 4>;
+ };
+
+ /*
+ * The following RTI instances are coupled with MCU R5Fs, c7x and
+ * GPU so keeping them disabled as these will be used by their
+ * respective firmware
+ */
+ watchdog16: watchdog@2300000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2300000 0x00 0x100>;
+ clocks = <&k3_clks 356 1>;
+ power-domains = <&k3_pds 356 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 356 0>;
+ assigned-clock-parents = <&k3_clks 356 4>;
+ status = "disabled";
+ };
+
+ watchdog17: watchdog@2310000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2310000 0x00 0x100>;
+ clocks = <&k3_clks 357 1>;
+ power-domains = <&k3_pds 357 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 357 0>;
+ assigned-clock-parents = <&k3_clks 357 4>;
+ status = "disabled";
+ };
+
+ watchdog18: watchdog@2320000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2320000 0x00 0x100>;
+ clocks = <&k3_clks 358 1>;
+ power-domains = <&k3_pds 358 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 358 0>;
+ assigned-clock-parents = <&k3_clks 358 4>;
+ status = "disabled";
+ };
+
+ watchdog19: watchdog@2330000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2330000 0x00 0x100>;
+ clocks = <&k3_clks 359 1>;
+ power-domains = <&k3_pds 359 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 359 0>;
+ assigned-clock-parents = <&k3_clks 359 4>;
+ status = "disabled";
+ };
+
+ watchdog15: watchdog@22f0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x22f0000 0x00 0x100>;
+ clocks = <&k3_clks 360 1>;
+ power-domains = <&k3_pds 360 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 360 0>;
+ assigned-clock-parents = <&k3_clks 360 4>;
+ status = "disabled";
+ };
+
+ watchdog28: watchdog@23c0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23c0000 0x00 0x100>;
+ clocks = <&k3_clks 361 1>;
+ power-domains = <&k3_pds 361 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 361 0>;
+ assigned-clock-parents = <&k3_clks 361 4>;
+ status = "disabled";
+ };
+
+ watchdog29: watchdog@23d0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23d0000 0x00 0x100>;
+ clocks = <&k3_clks 362 1>;
+ power-domains = <&k3_pds 362 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 362 0>;
+ assigned-clock-parents = <&k3_clks 362 4>;
+ status = "disabled";
+ };
+
+ watchdog30: watchdog@23e0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23e0000 0x00 0x100>;
+ clocks = <&k3_clks 363 1>;
+ power-domains = <&k3_pds 363 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 363 0>;
+ assigned-clock-parents = <&k3_clks 363 4>;
+ status = "disabled";
+ };
+
+ watchdog31: watchdog@23f0000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x23f0000 0x00 0x100>;
+ clocks = <&k3_clks 364 1>;
+ power-domains = <&k3_pds 364 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 364 0>;
+ assigned-clock-parents = <&k3_clks 364 4>;
+ status = "disabled";
+ };
+
+ watchdog32: watchdog@2540000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2540000 0x00 0x100>;
+ clocks = <&k3_clks 365 1>;
+ power-domains = <&k3_pds 365 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 365 0>;
+ assigned-clock-parents = <&k3_clks 366 4>;
+ status = "disabled";
+ };
+
+ watchdog33: watchdog@2550000 {
+ compatible = "ti,j7-rti-wdt";
+ reg = <0x00 0x2550000 0x00 0x100>;
+ clocks = <&k3_clks 366 1>;
+ power-domains = <&k3_pds 366 TI_SCI_PD_EXCLUSIVE>;
+ assigned-clocks = <&k3_clks 366 0>;
+ assigned-clock-parents = <&k3_clks 366 4>;
+ status = "disabled";
+ };
};
--
2.17.1
Patch adds the ESM instances for j784s4. It has 3 instances.
One in the main domain and two in the mcu-wakeup domian.
Signed-off-by: Keerthy <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 8 ++++++++
arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 14 ++++++++++++++
2 files changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
index efed2d683f63..26dc3776f911 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
@@ -1568,4 +1568,12 @@
firmware-name = "j784s4-c71_3-fw";
status = "disabled";
};
+
+ main_esm: esm@700000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x700000 0x00 0x1000>;
+ ti,esm-pins = <688>, <689>, <690>, <691>, <692>, <693>, <694>,
+ <695>;
+ bootph-pre-ram;
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
index 4ab4018d3695..a7b5c4cb7d3e 100644
--- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
@@ -700,4 +700,18 @@
status = "disabled";
};
};
+
+ mcu_esm: esm@40800000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x40800000 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
+
+ wkup_esm: esm@42080000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x42080000 0x00 0x1000>;
+ ti,esm-pins = <63>;
+ bootph-pre-ram;
+ };
};
--
2.17.1
Patch adds the ESM instances for j721s2. It has 3 instances.
One in the main domain and two in the mcu-wakeup domian.
Signed-off-by: Keerthy <[email protected]>
---
arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 7 +++++++
arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 14 ++++++++++++++
2 files changed, 21 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 084f8f5b6699..8a717b592238 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -1695,4 +1695,11 @@
dss_ports: ports {
};
};
+
+ main_esm: esm@700000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x700000 0x00 0x1000>;
+ ti,esm-pins = <688>, <689>;
+ bootph-pre-ram;
+ };
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
index 2ddad9318554..4b29418a6076 100644
--- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
@@ -655,4 +655,18 @@
power-domains = <&k3_pds 154 TI_SCI_PD_SHARED>;
#thermal-sensor-cells = <1>;
};
+
+ mcu_esm: esm@40800000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x40800000 0x00 0x1000>;
+ ti,esm-pins = <95>;
+ bootph-pre-ram;
+ };
+
+ wkup_esm: esm@42080000 {
+ compatible = "ti,j721e-esm";
+ reg = <0x00 0x42080000 0x00 0x1000>;
+ ti,esm-pins = <63>;
+ bootph-pre-ram;
+ };
};
--
2.17.1
On 27/09/23 08:03, Keerthy wrote:
> + /*
> + * The following RTI instances are coupled with MCU R5Fs, c7x and
> + * GPU so keeping them disabled as these will be used by their
> + * respective firmware
> + */
> + watchdog16: watchdog@2300000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2300000 0x00 0x100>;
> + clocks = <&k3_clks 356 1>;
> + power-domains = <&k3_pds 356 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 356 0>;
> + assigned-clock-parents = <&k3_clks 356 4>;
> + status = "disabled";
> + };
> +
> + watchdog17: watchdog@2310000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2310000 0x00 0x100>;
> + clocks = <&k3_clks 357 1>;
> + power-domains = <&k3_pds 357 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 357 0>;
> + assigned-clock-parents = <&k3_clks 357 4>;
> + status = "disabled";
> + };
> +
> + watchdog18: watchdog@2320000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2320000 0x00 0x100>;
> + clocks = <&k3_clks 358 1>;
> + power-domains = <&k3_pds 358 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 358 0>;
> + assigned-clock-parents = <&k3_clks 358 4>;
> + status = "disabled";
> + };
> +
> + watchdog19: watchdog@2330000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2330000 0x00 0x100>;
> + clocks = <&k3_clks 359 1>;
> + power-domains = <&k3_pds 359 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 359 0>;
> + assigned-clock-parents = <&k3_clks 359 4>;
> + status = "disabled";
> + };
> +
> + watchdog15: watchdog@22f0000 {
I understand you are arranging based on Firmware Device ID. But these
numbers don't have much meaning when user maps to TRM. So, I suggest
nodes to be arranged by TRM numbering or ascending order of register
address so that its easier for end user to map the nodes to IP instance
in TRM.
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x22f0000 0x00 0x100>;
> + clocks = <&k3_clks 360 1>;
> + power-domains = <&k3_pds 360 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 360 0>;
> + assigned-clock-parents = <&k3_clks 360 4>;
> + status = "disabled";
> + };
> +
> + watchdog28: watchdog@23c0000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23c0000 0x00 0x100>;
> + clocks = <&k3_clks 361 1>;
> + power-domains = <&k3_pds 361 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 361 0>;
> + assigned-clock-parents = <&k3_clks 361 4>;
> + status = "disabled";
> + };
> +
> + watchdog29: watchdog@23d0000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23d0000 0x00 0x100>;
> + clocks = <&k3_clks 362 1>;
> + power-domains = <&k3_pds 362 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 362 0>;
> + assigned-clock-parents = <&k3_clks 362 4>;
> + status = "disabled";
> + };
> +
> + watchdog30: watchdog@23e0000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23e0000 0x00 0x100>;
> + clocks = <&k3_clks 363 1>;
> + power-domains = <&k3_pds 363 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 363 0>;
> + assigned-clock-parents = <&k3_clks 363 4>;
> + status = "disabled";
> + };
> +
> + watchdog31: watchdog@23f0000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x23f0000 0x00 0x100>;
> + clocks = <&k3_clks 364 1>;
> + power-domains = <&k3_pds 364 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 364 0>;
> + assigned-clock-parents = <&k3_clks 364 4>;
> + status = "disabled";
> + };
> +
> + watchdog32: watchdog@2540000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2540000 0x00 0x100>;
> + clocks = <&k3_clks 365 1>;
> + power-domains = <&k3_pds 365 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 365 0>;
> + assigned-clock-parents = <&k3_clks 366 4>;
> + status = "disabled";
> + };
> +
> + watchdog33: watchdog@2550000 {
> + compatible = "ti,j7-rti-wdt";
> + reg = <0x00 0x2550000 0x00 0x100>;
> + clocks = <&k3_clks 366 1>;
> + power-domains = <&k3_pds 366 TI_SCI_PD_EXCLUSIVE>;
> + assigned-clocks = <&k3_clks 366 0>;
> + assigned-clock-parents = <&k3_clks 366 4>;
> + status = "disabled";
> + };
> };
> -- 2.17.1
--
Regards
Vignesh
On 27/09/23 08:03, Keerthy wrote:
> Patch adds the ESM instances for j784s4. It has 3 instances.
> One in the main domain and two in the mcu-wakeup domian.
>
> Signed-off-by: Keerthy <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 8 ++++++++
> arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 14 ++++++++++++++
> 2 files changed, 22 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> index efed2d683f63..26dc3776f911 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -1568,4 +1568,12 @@
> firmware-name = "j784s4-c71_3-fw";
> status = "disabled";
> };
> +
> + main_esm: esm@700000 {
> + compatible = "ti,j721e-esm";
> + reg = <0x00 0x700000 0x00 0x1000>;
> + ti,esm-pins = <688>, <689>, <690>, <691>, <692>, <693>, <694>,
> + <695>;
> + bootph-pre-ram;
Similar to other nodes in this file, here and elsewhere use
bootph-all
> + };
> };
> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> index 4ab4018d3695..a7b5c4cb7d3e 100644
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> @@ -700,4 +700,18 @@
> status = "disabled";
> };
> };
> +
> + mcu_esm: esm@40800000 {
> + compatible = "ti,j721e-esm";
> + reg = <0x00 0x40800000 0x00 0x1000>;
> + ti,esm-pins = <95>;
> + bootph-pre-ram;
> + };
> +
> + wkup_esm: esm@42080000 {
> + compatible = "ti,j721e-esm";
> + reg = <0x00 0x42080000 0x00 0x1000>;
> + ti,esm-pins = <63>;
> + bootph-pre-ram;
> + };
> };
--
Regards
Vignesh
On 27/09/23 08:03, Keerthy wrote:
> Patch adds the ESM instances for j721s2. It has 3 instances.
> One in the main domain and two in the mcu-wakeup domian.
>
> Signed-off-by: Keerthy <[email protected]>
> ---
> arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 7 +++++++
> arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 14 ++++++++++++++
> 2 files changed, 21 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> index 084f8f5b6699..8a717b592238 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> @@ -1695,4 +1695,11 @@
> dss_ports: ports {
> };
> };
> +
> + main_esm: esm@700000 {
> + compatible = "ti,j721e-esm";
> + reg = <0x00 0x700000 0x00 0x1000>;
> + ti,esm-pins = <688>, <689>;
> + bootph-pre-ram;
Similar to other k3-*.dts here and elsewhere
bootph-all
Better drop them altogether, and lets have a single patch for the j721s2
platform to add bootph* flags as necessary.
> + };
> };
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
> index 2ddad9318554..4b29418a6076 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
> @@ -655,4 +655,18 @@
> power-domains = <&k3_pds 154 TI_SCI_PD_SHARED>;
> #thermal-sensor-cells = <1>;
> };
> +
> + mcu_esm: esm@40800000 {
> + compatible = "ti,j721e-esm";
> + reg = <0x00 0x40800000 0x00 0x1000>;
> + ti,esm-pins = <95>;
> + bootph-pre-ram;
> + };
> +
> + wkup_esm: esm@42080000 {
> + compatible = "ti,j721e-esm";
> + reg = <0x00 0x42080000 0x00 0x1000>;
> + ti,esm-pins = <63>;
> + bootph-pre-ram;
> + };
> };
--
Regards
Vignesh
On 10/3/2023 12:20 PM, Vignesh Raghavendra wrote:
>
>
> On 27/09/23 08:03, Keerthy wrote:
>> Patch adds the ESM instances for j784s4. It has 3 instances.
>> One in the main domain and two in the mcu-wakeup domian.
>>
>> Signed-off-by: Keerthy <[email protected]>
>> ---
>> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 8 ++++++++
>> arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 14 ++++++++++++++
>> 2 files changed, 22 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> index efed2d683f63..26dc3776f911 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>> @@ -1568,4 +1568,12 @@
>> firmware-name = "j784s4-c71_3-fw";
>> status = "disabled";
>> };
>> +
>> + main_esm: esm@700000 {
>> + compatible = "ti,j721e-esm";
>> + reg = <0x00 0x700000 0x00 0x1000>;
>> + ti,esm-pins = <688>, <689>, <690>, <691>, <692>, <693>, <694>,
>> + <695>;
>> + bootph-pre-ram;
>
> Similar to other nodes in this file, here and elsewhere use
> bootph-all
Okay. I will switch to bootph-all
>
>
>> + };
>> };
>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
>> index 4ab4018d3695..a7b5c4cb7d3e 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
>> @@ -700,4 +700,18 @@
>> status = "disabled";
>> };
>> };
>> +
>> + mcu_esm: esm@40800000 {
>> + compatible = "ti,j721e-esm";
>> + reg = <0x00 0x40800000 0x00 0x1000>;
>> + ti,esm-pins = <95>;
>> + bootph-pre-ram;
>> + };
>> +
>> + wkup_esm: esm@42080000 {
>> + compatible = "ti,j721e-esm";
>> + reg = <0x00 0x42080000 0x00 0x1000>;
>> + ti,esm-pins = <63>;
>> + bootph-pre-ram;
>> + };
>> };
>
On 10/3/2023 12:20 PM, Vignesh Raghavendra wrote:
>
>
> On 27/09/23 08:03, Keerthy wrote:
>> Patch adds the ESM instances for j721s2. It has 3 instances.
>> One in the main domain and two in the mcu-wakeup domian.
>>
>> Signed-off-by: Keerthy <[email protected]>
>> ---
>> arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 7 +++++++
>> arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 14 ++++++++++++++
>> 2 files changed, 21 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
>> index 084f8f5b6699..8a717b592238 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
>> @@ -1695,4 +1695,11 @@
>> dss_ports: ports {
>> };
>> };
>> +
>> + main_esm: esm@700000 {
>> + compatible = "ti,j721e-esm";
>> + reg = <0x00 0x700000 0x00 0x1000>;
>> + ti,esm-pins = <688>, <689>;
>> + bootph-pre-ram;
>
>
> Similar to other k3-*.dts here and elsewhere
> bootph-all
>
>
> Better drop them altogether, and lets have a single patch for the j721s2
> platform to add bootph* flags as necessary.
Okay.
>
>
>> + };
>> };
>> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
>> index 2ddad9318554..4b29418a6076 100644
>> --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
>> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi
>> @@ -655,4 +655,18 @@
>> power-domains = <&k3_pds 154 TI_SCI_PD_SHARED>;
>> #thermal-sensor-cells = <1>;
>> };
>> +
>> + mcu_esm: esm@40800000 {
>> + compatible = "ti,j721e-esm";
>> + reg = <0x00 0x40800000 0x00 0x1000>;
>> + ti,esm-pins = <95>;
>> + bootph-pre-ram;
>> + };
>> +
>> + wkup_esm: esm@42080000 {
>> + compatible = "ti,j721e-esm";
>> + reg = <0x00 0x42080000 0x00 0x1000>;
>> + ti,esm-pins = <63>;
>> + bootph-pre-ram;
>> + };
>> };
>
On 10/3/2023 12:18 PM, Vignesh Raghavendra wrote:
>
>
> On 27/09/23 08:03, Keerthy wrote:
>> + /*
>> + * The following RTI instances are coupled with MCU R5Fs, c7x and
>> + * GPU so keeping them disabled as these will be used by their
>> + * respective firmware
>> + */
>> + watchdog16: watchdog@2300000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2300000 0x00 0x100>;
>> + clocks = <&k3_clks 356 1>;
>> + power-domains = <&k3_pds 356 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 356 0>;
>> + assigned-clock-parents = <&k3_clks 356 4>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog17: watchdog@2310000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2310000 0x00 0x100>;
>> + clocks = <&k3_clks 357 1>;
>> + power-domains = <&k3_pds 357 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 357 0>;
>> + assigned-clock-parents = <&k3_clks 357 4>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog18: watchdog@2320000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2320000 0x00 0x100>;
>> + clocks = <&k3_clks 358 1>;
>> + power-domains = <&k3_pds 358 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 358 0>;
>> + assigned-clock-parents = <&k3_clks 358 4>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog19: watchdog@2330000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2330000 0x00 0x100>;
>> + clocks = <&k3_clks 359 1>;
>> + power-domains = <&k3_pds 359 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 359 0>;
>> + assigned-clock-parents = <&k3_clks 359 4>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog15: watchdog@22f0000 {
>
>
> I understand you are arranging based on Firmware Device ID. But these
> numbers don't have much meaning when user maps to TRM. So, I suggest
> nodes to be arranged by TRM numbering or ascending order of register
> address so that its easier for end user to map the nodes to IP instance
> in TRM.
>
Okay. I will arrange them by the order of register addresses.
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x22f0000 0x00 0x100>;
>> + clocks = <&k3_clks 360 1>;
>> + power-domains = <&k3_pds 360 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 360 0>;
>> + assigned-clock-parents = <&k3_clks 360 4>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog28: watchdog@23c0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x23c0000 0x00 0x100>;
>> + clocks = <&k3_clks 361 1>;
>> + power-domains = <&k3_pds 361 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 361 0>;
>> + assigned-clock-parents = <&k3_clks 361 4>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog29: watchdog@23d0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x23d0000 0x00 0x100>;
>> + clocks = <&k3_clks 362 1>;
>> + power-domains = <&k3_pds 362 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 362 0>;
>> + assigned-clock-parents = <&k3_clks 362 4>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog30: watchdog@23e0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x23e0000 0x00 0x100>;
>> + clocks = <&k3_clks 363 1>;
>> + power-domains = <&k3_pds 363 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 363 0>;
>> + assigned-clock-parents = <&k3_clks 363 4>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog31: watchdog@23f0000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x23f0000 0x00 0x100>;
>> + clocks = <&k3_clks 364 1>;
>> + power-domains = <&k3_pds 364 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 364 0>;
>> + assigned-clock-parents = <&k3_clks 364 4>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog32: watchdog@2540000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2540000 0x00 0x100>;
>> + clocks = <&k3_clks 365 1>;
>> + power-domains = <&k3_pds 365 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 365 0>;
>> + assigned-clock-parents = <&k3_clks 366 4>;
>> + status = "disabled";
>> + };
>> +
>> + watchdog33: watchdog@2550000 {
>> + compatible = "ti,j7-rti-wdt";
>> + reg = <0x00 0x2550000 0x00 0x100>;
>> + clocks = <&k3_clks 366 1>;
>> + power-domains = <&k3_pds 366 TI_SCI_PD_EXCLUSIVE>;
>> + assigned-clocks = <&k3_clks 366 0>;
>> + assigned-clock-parents = <&k3_clks 366 4>;
>> + status = "disabled";
>> + };
>> };
>> -- 2.17.1
>
On 06:45-20231005, J, KEERTHY wrote:
>
>
> On 10/3/2023 12:20 PM, Vignesh Raghavendra wrote:
> >
> >
> > On 27/09/23 08:03, Keerthy wrote:
> > > Patch adds the ESM instances for j784s4. It has 3 instances.
> > > One in the main domain and two in the mcu-wakeup domian.
> > >
> > > Signed-off-by: Keerthy <[email protected]>
> > > ---
> > > arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 8 ++++++++
> > > arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 14 ++++++++++++++
> > > 2 files changed, 22 insertions(+)
> > >
> > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> > > index efed2d683f63..26dc3776f911 100644
> > > --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> > > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> > > @@ -1568,4 +1568,12 @@
> > > firmware-name = "j784s4-c71_3-fw";
> > > status = "disabled";
> > > };
> > > +
> > > + main_esm: esm@700000 {
> > > + compatible = "ti,j721e-esm";
> > > + reg = <0x00 0x700000 0x00 0x1000>;
> > > + ti,esm-pins = <688>, <689>, <690>, <691>, <692>, <693>, <694>,
> > > + <695>;
> > > + bootph-pre-ram;
> >
> > Similar to other nodes in this file, here and elsewhere use
> > bootph-all
>
> Okay. I will switch to bootph-all
Is'nt esm configuration just needed during pre-ram?
>
> >
> >
> > > + };
> > > };
> > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> > > index 4ab4018d3695..a7b5c4cb7d3e 100644
> > > --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> > > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
> > > @@ -700,4 +700,18 @@
> > > status = "disabled";
> > > };
> > > };
> > > +
> > > + mcu_esm: esm@40800000 {
> > > + compatible = "ti,j721e-esm";
> > > + reg = <0x00 0x40800000 0x00 0x1000>;
> > > + ti,esm-pins = <95>;
> > > + bootph-pre-ram;
> > > + };
> > > +
> > > + wkup_esm: esm@42080000 {
> > > + compatible = "ti,j721e-esm";
> > > + reg = <0x00 0x42080000 0x00 0x1000>;
> > > + ti,esm-pins = <63>;
> > > + bootph-pre-ram;
> > > + };
> > > };
> >
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
On 10/5/2023 4:45 PM, Nishanth Menon wrote:
> On 06:45-20231005, J, KEERTHY wrote:
>>
>>
>> On 10/3/2023 12:20 PM, Vignesh Raghavendra wrote:
>>>
>>>
>>> On 27/09/23 08:03, Keerthy wrote:
>>>> Patch adds the ESM instances for j784s4. It has 3 instances.
>>>> One in the main domain and two in the mcu-wakeup domian.
>>>>
>>>> Signed-off-by: Keerthy <[email protected]>
>>>> ---
>>>> arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 8 ++++++++
>>>> arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi | 14 ++++++++++++++
>>>> 2 files changed, 22 insertions(+)
>>>>
>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>>>> index efed2d683f63..26dc3776f911 100644
>>>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>>>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
>>>> @@ -1568,4 +1568,12 @@
>>>> firmware-name = "j784s4-c71_3-fw";
>>>> status = "disabled";
>>>> };
>>>> +
>>>> + main_esm: esm@700000 {
>>>> + compatible = "ti,j721e-esm";
>>>> + reg = <0x00 0x700000 0x00 0x1000>;
>>>> + ti,esm-pins = <688>, <689>, <690>, <691>, <692>, <693>, <694>,
>>>> + <695>;
>>>> + bootph-pre-ram;
>>>
>>> Similar to other nodes in this file, here and elsewhere use
>>> bootph-all
>>
>> Okay. I will switch to bootph-all
>
> Is'nt esm configuration just needed during pre-ram?
This is needed only the R5 SPL phase. So bootph-pre-ram looks better suited.
https://u-boot.readthedocs.io/en/latest/develop/driver-model/of-plat.html
Vignesh,
This ESM nodes should be bootph-pre-ram. I will keep that flag as is.
Best Regards,
Keerthy
>
>>
>>>
>>>
>>>> + };
>>>> };
>>>> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
>>>> index 4ab4018d3695..a7b5c4cb7d3e 100644
>>>> --- a/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
>>>> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-mcu-wakeup.dtsi
>>>> @@ -700,4 +700,18 @@
>>>> status = "disabled";
>>>> };
>>>> };
>>>> +
>>>> + mcu_esm: esm@40800000 {
>>>> + compatible = "ti,j721e-esm";
>>>> + reg = <0x00 0x40800000 0x00 0x1000>;
>>>> + ti,esm-pins = <95>;
>>>> + bootph-pre-ram;
>>>> + };
>>>> +
>>>> + wkup_esm: esm@42080000 {
>>>> + compatible = "ti,j721e-esm";
>>>> + reg = <0x00 0x42080000 0x00 0x1000>;
>>>> + ti,esm-pins = <63>;
>>>> + bootph-pre-ram;
>>>> + };
>>>> };
>>>
>