This series pacthes to support the next soc for this thermal driver.
I don't add the dts thermal data since these SoCs have *_not_* land
in this mainline. I believe these SoCs dts will land in this mainline
lately,
then I will add the thermal data for Heiko.
This series patches can apply into Eduardo branch.
https://git.kernel.org/cgit/linux/kernel/git/evalenti/linux-soc-thermal.git
Also, this series pacthes have built on github branch.
https://github.com/rockchip-linux/kernel/commits/develop4.4
PATCH[1/5]:
That's bit ugly typo, sorry for sending again :(.
PATCH[2/5]:
To fix a build warning came from Dan Carpenter report smatch check,
Thanks. :)
PATCH[3/5]:
Add the rk3228/rk3399 SoCs compatible for dt-bindings.
PATCH[4/5]:
Add the rk3228 SoCs for thermal driver.
PATCH[5/5]:
Add the rk3399 SoCs for thermal driver based on PATCH[4/5].
Changes in v1:
- Search more trivial typo for me.
- As Heiko comments, fix a copy incorrect name.
- Add a Acked from Rob.
- fix a irq ack is similar with RK3228 SoCs.
Caesar Wang (5):
thermal: rockchip: fix a trivial typo
thermal: rockchip: fix a impossible condition caused by the warning
dt-bindings: rockchip-thermal: Support the RK3228/RK3399 SoCs
compatible
thermal: rockchip: Support the RK3228 SoCs in thermal driver
thermal: rockchip: Support the RK3399 SoCs in thermal driver
.../bindings/thermal/rockchip-thermal.txt | 2 +
drivers/thermal/rockchip_thermal.c | 167 +++++++++++++++++++--
2 files changed, 159 insertions(+), 10 deletions(-)
--
1.9.1
This patchset trys to dictate unified format for driver.
Signed-off-by: Caesar Wang <[email protected]>
---
Changes in v1:
- Search more trivial typo for me.
drivers/thermal/rockchip_thermal.c | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index e845841..5a8840b 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -38,7 +38,7 @@ enum tshut_mode {
};
/**
- * the system Temperature Sensors tshut(tshut) polarity
+ * The system Temperature Sensors tshut(tshut) polarity
* the bit 8 is tshut polarity.
* 0: low active, 1: high active
*/
@@ -57,10 +57,10 @@ enum sensor_id {
};
/**
-* The conversion table has the adc value and temperature.
-* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
-* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
-*/
+ * The conversion table has the adc value and temperature.
+ * ADC_DECREMENT: the adc value is of diminishing.(e.g. v2_code_table)
+ * ADC_INCREMENT: the adc value is incremental.(e.g. v3_code_table)
+ */
enum adc_sort_mode {
ADC_DECREMENT = 0,
ADC_INCREMENT,
@@ -75,13 +75,13 @@ enum adc_sort_mode {
struct chip_tsadc_table {
const struct tsadc_table *id;
- /* the array table size*/
+ /* The array table size */
unsigned int length;
- /* that analogic mask data */
+ /* That analogic mask data */
u32 data_mask;
- /* the sort mode is adc value that increment or decrement in table */
+ /* The sort mode is adc value that increment or decrement in table */
enum adc_sort_mode mode;
};
@@ -617,7 +617,7 @@ rockchip_thermal_register_sensor(struct platform_device *pdev,
return 0;
}
-/*
+/**
* Reset TSADC Controller, reset all tsadc registers.
*/
static void rockchip_thermal_reset_controller(struct reset_control *reset)
--
1.9.1
As the Dan report the smatch check the thermal driver warning:
drivers/thermal/rockchip_thermal.c:551 rockchip_configure_from_dt()
warn: impossible condition '(thermal->tshut_temp > ((~0 >> 1))) =>
(s32min-s32max > s32max)'
Since the Temperature is currently represented as int not long in
the thermal driver.
Fixes: commit 437df2172e8d
("thermal: rockchip: consistently use int for temperatures")
Reported-by: Dan Carpenter <[email protected]>
Signed-off-by: Caesar Wang <[email protected]>
---
Changes in v1: None
drivers/thermal/rockchip_thermal.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 5a8840b..d00765f 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -548,7 +548,7 @@ static int rockchip_configure_from_dt(struct device *dev,
thermal->tshut_temp = shut_temp;
}
- if (thermal->tshut_temp > INT_MAX) {
+ if (!(thermal->tshut_temp < INT_MAX)) {
dev_err(dev, "Invalid tshut temperature specified: %d\n",
thermal->tshut_temp);
return -ERANGE;
--
1.9.1
This patchset attempts to new compatible for thermal founding
on RK3228/RK3399 SoCs.
Signed-off-by: Caesar Wang <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
Changes in v1:
- As Heiko comments, fix a copy incorrect name.
- Add a Acked from Rob.
Documentation/devicetree/bindings/thermal/rockchip-thermal.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
index 0dfa60d..08efe6b 100644
--- a/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/rockchip-thermal.txt
@@ -2,8 +2,10 @@
Required properties:
- compatible : should be "rockchip,<name>-tsadc"
+ "rockchip,rk3228-tsadc": found on RK3228 SoCs
"rockchip,rk3288-tsadc": found on RK3288 SoCs
"rockchip,rk3368-tsadc": found on RK3368 SoCs
+ "rockchip,rk3399-tsadc": found on RK3399 SoCs
- reg : physical base address of the controller and length of memory mapped
region.
- interrupts : The interrupt number to the cpu. The interrupt specifier format
--
1.9.1
The RK3228 SoCs has one Temperature Sensor, channel 0 is for CPU.
Signed-off-by: Caesar Wang <[email protected]>
---
Changes in v1: None
drivers/thermal/rockchip_thermal.c | 81 ++++++++++++++++++++++++++++++++++++++
1 file changed, 81 insertions(+)
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index d00765f..37772dd 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -153,6 +153,7 @@ struct rockchip_thermal_data {
#define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
#define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
+#define TSADCV1_INT_PD_CLEAR_MASK ~BIT(16)
#define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8)
#define TSADCV2_DATA_MASK 0xfff
@@ -168,6 +169,51 @@ struct tsadc_table {
int temp;
};
+/**
+ * Note:
+ * Code to Temperature mapping of the Temperature sensor is a piece wise linear
+ * curve.Any temperature, code faling between to 2 give temperatures can be
+ * linearly interpolated.
+ * Code to Temperature mapping should be updated based on sillcon results.
+ */
+static const struct tsadc_table v1_code_table[] = {
+ {TSADCV3_DATA_MASK, -40000},
+ {436, -40000},
+ {431, -35000},
+ {426, -30000},
+ {421, -25000},
+ {416, -20000},
+ {411, -15000},
+ {406, -10000},
+ {401, -5000},
+ {395, 0},
+ {390, 5000},
+ {385, 10000},
+ {380, 15000},
+ {375, 20000},
+ {370, 25000},
+ {364, 30000},
+ {359, 35000},
+ {354, 40000},
+ {349, 45000},
+ {343, 50000},
+ {338, 55000},
+ {333, 60000},
+ {328, 65000},
+ {322, 70000},
+ {317, 75000},
+ {312, 80000},
+ {307, 85000},
+ {301, 90000},
+ {296, 95000},
+ {291, 100000},
+ {286, 105000},
+ {280, 110000},
+ {275, 115000},
+ {270, 120000},
+ {264, 125000},
+};
+
static const struct tsadc_table v2_code_table[] = {
{TSADCV2_DATA_MASK, -40000},
{3800, -40000},
@@ -368,6 +414,14 @@ static void rk_tsadcv2_initialize(void __iomem *regs,
regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
}
+static void rk_tsadcv1_irq_ack(void __iomem *regs)
+{
+ u32 val;
+
+ val = readl_relaxed(regs + TSADCV2_INT_PD);
+ writel_relaxed(val & TSADCV1_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
+}
+
static void rk_tsadcv2_irq_ack(void __iomem *regs)
{
u32 val;
@@ -429,6 +483,29 @@ static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
writel_relaxed(val, regs + TSADCV2_INT_EN);
}
+static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
+ .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+ .chn_num = 1, /* one channel for tsadc */
+
+ .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+ .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+ .tshut_temp = 95000,
+
+ .initialize = rk_tsadcv2_initialize,
+ .irq_ack = rk_tsadcv1_irq_ack,
+ .control = rk_tsadcv2_control,
+ .get_temp = rk_tsadcv2_get_temp,
+ .set_tshut_temp = rk_tsadcv2_tshut_temp,
+ .set_tshut_mode = rk_tsadcv2_tshut_mode,
+
+ .table = {
+ .id = v1_code_table,
+ .length = ARRAY_SIZE(v1_code_table),
+ .data_mask = TSADCV3_DATA_MASK,
+ .mode = ADC_DECREMENT,
+ },
+};
+
static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
.chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
.chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
@@ -479,6 +556,10 @@ static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
static const struct of_device_id of_rockchip_thermal_match[] = {
{
+ .compatible = "rockchip,rk3228-tsadc",
+ .data = (void *)&rk3228_tsadc_data,
+ },
+ {
.compatible = "rockchip,rk3288-tsadc",
.data = (void *)&rk3288_tsadc_data,
},
--
1.9.1
The RK3399 SoCs have two Temperature Sensors, channel 0 is for CPU.
channel 1 is for GPU.
Signed-off-by: Caesar Wang <[email protected]>
---
Changes in v1:
- fix a irq ack is similar with RK3228 SoCs.
drivers/thermal/rockchip_thermal.c | 66 ++++++++++++++++++++++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/drivers/thermal/rockchip_thermal.c b/drivers/thermal/rockchip_thermal.c
index 37772dd..8e02b86 100644
--- a/drivers/thermal/rockchip_thermal.c
+++ b/drivers/thermal/rockchip_thermal.c
@@ -291,6 +291,44 @@ static const struct tsadc_table v3_code_table[] = {
{TSADCV3_DATA_MASK, 125000},
};
+static const struct tsadc_table v4_code_table[] = {
+ {TSADCV3_DATA_MASK, -40000},
+ {431, -40000},
+ {426, -35000},
+ {421, -30000},
+ {415, -25000},
+ {410, -20000},
+ {405, -15000},
+ {399, -10000},
+ {394, -5000},
+ {389, 0},
+ {383, 5000},
+ {378, 10000},
+ {373, 15000},
+ {367, 20000},
+ {362, 25000},
+ {357, 30000},
+ {351, 35000},
+ {346, 40000},
+ {340, 45000},
+ {335, 50000},
+ {330, 55000},
+ {324, 60000},
+ {319, 65000},
+ {313, 70000},
+ {308, 75000},
+ {302, 80000},
+ {297, 85000},
+ {291, 90000},
+ {286, 95000},
+ {281, 100000},
+ {275, 105000},
+ {270, 110000},
+ {264, 115000},
+ {259, 120000},
+ {253, 125000},
+};
+
static u32 rk_tsadcv2_temp_to_code(struct chip_tsadc_table table,
int temp)
{
@@ -554,6 +592,30 @@ static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
},
};
+static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
+ .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
+ .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
+ .chn_num = 2, /* two channels for tsadc */
+
+ .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
+ .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
+ .tshut_temp = 95000,
+
+ .initialize = rk_tsadcv2_initialize,
+ .irq_ack = rk_tsadcv1_irq_ack,
+ .control = rk_tsadcv2_control,
+ .get_temp = rk_tsadcv2_get_temp,
+ .set_tshut_temp = rk_tsadcv2_tshut_temp,
+ .set_tshut_mode = rk_tsadcv2_tshut_mode,
+
+ .table = {
+ .id = v4_code_table,
+ .length = ARRAY_SIZE(v4_code_table),
+ .data_mask = TSADCV3_DATA_MASK,
+ .mode = ADC_DECREMENT,
+ },
+};
+
static const struct of_device_id of_rockchip_thermal_match[] = {
{
.compatible = "rockchip,rk3228-tsadc",
@@ -567,6 +629,10 @@ static const struct of_device_id of_rockchip_thermal_match[] = {
.compatible = "rockchip,rk3368-tsadc",
.data = (void *)&rk3368_tsadc_data,
},
+ {
+ .compatible = "rockchip,rk3399-tsadc",
+ .data = (void *)&rk3399_tsadc_data,
+ },
{ /* end */ },
};
MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
--
1.9.1
Hi Caesar,
Am Freitag, 27. November 2015, 10:52:22 schrieb Caesar Wang:
> This patchset trys to dictate unified format for driver.
>
> Signed-off-by: Caesar Wang <[email protected]>
>
> ---
>
> Changes in v1:
> - Search more trivial typo for me.
>
> drivers/thermal/rockchip_thermal.c | 18 +++++++++---------
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/thermal/rockchip_thermal.c
> b/drivers/thermal/rockchip_thermal.c index e845841..5a8840b 100644
> --- a/drivers/thermal/rockchip_thermal.c
> +++ b/drivers/thermal/rockchip_thermal.c
> @@ -38,7 +38,7 @@ enum tshut_mode {
> };
>
> /**
> - * the system Temperature Sensors tshut(tshut) polarity
> + * The system Temperature Sensors tshut(tshut) polarity
> * the bit 8 is tshut polarity.
> * 0: low active, 1: high active
> */
> @@ -57,10 +57,10 @@ enum sensor_id {
> };
>
> /**
> -* The conversion table has the adc value and temperature.
> -* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
> -* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
> -*/
> + * The conversion table has the adc value and temperature.
> + * ADC_DECREMENT: the adc value is of diminishing.(e.g. v2_code_table)
> + * ADC_INCREMENT: the adc value is incremental.(e.g. v3_code_table)
> + */
> enum adc_sort_mode {
> ADC_DECREMENT = 0,
> ADC_INCREMENT,
> @@ -75,13 +75,13 @@ enum adc_sort_mode {
You could simply move to documenting the fields in the header (like
exynos_tmu.c for example) instead of inside the table. I think there are even
tools that create documention from these comments, so I'd suggest:
/*
* struct chip_tsadc_table: hold information about chip-specific differences
* @id: conversion table
* @length: size of conversion table
* @data_mask: mask to apply on data inputs
* @mode: sort mode of this adc variant (incrementing or decrementing)
*/
> struct chip_tsadc_table {
> const struct tsadc_table *id;
>
> - /* the array table size*/
> + /* The array table size */
> unsigned int length;
>
> - /* that analogic mask data */
> + /* That analogic mask data */
> u32 data_mask;
>
> - /* the sort mode is adc value that increment or decrement in table */
> + /* The sort mode is adc value that increment or decrement in table */
> enum adc_sort_mode mode;
> };
>
> @@ -617,7 +617,7 @@ rockchip_thermal_register_sensor(struct platform_device
> *pdev, return 0;
> }
>
> -/*
> +/**
> * Reset TSADC Controller, reset all tsadc registers.
> */
> static void rockchip_thermal_reset_controller(struct reset_control *reset)
Hi Heiko,
Thanks to take your time to review that.
在 2015年11月27日 17:49, Heiko Stübner 写道:
> Hi Caesar,
>
> Am Freitag, 27. November 2015, 10:52:22 schrieb Caesar Wang:
[...]
>
> /**
> -* The conversion table has the adc value and temperature.
> -* ADC_DECREMENT is the adc value decremnet.(e.g. v2_code_table)
> -* ADC_INCREMNET is the adc value incremnet.(e.g. v3_code_table)
> -*/
> + * The conversion table has the adc value and temperature.
> + * ADC_DECREMENT: the adc value is of diminishing.(e.g. v2_code_table)
> + * ADC_INCREMENT: the adc value is incremental.(e.g. v3_code_table)
> + */
> enum adc_sort_mode {
> ADC_DECREMENT = 0,
> ADC_INCREMENT,
> @@ -75,13 +75,13 @@ enum adc_sort_mode {
> You could simply move to documenting the fields in the header (like
> exynos_tmu.c for example) instead of inside the table. I think there are even
> tools that create documention from these comments, so I'd suggest:
>
> /*
> * struct chip_tsadc_table: hold information about chip-specific differences
> * @id: conversion table
> * @length: size of conversion table
> * @data_mask: mask to apply on data inputs
> * @mode: sort mode of this adc variant (incrementing or decrementing)
> */
That's a good idea for this.
Fixed in next patch v2.
>> struct chip_tsadc_table {
>> const struct tsadc_table *id;
>>
>> - /* the array table size*/
>> + /* The array table size */
>> unsigned int length;
>>
>> - /* that analogic mask data */
>> + /* That analogic mask data */
>> u32 data_mask;
>>
>> - /* the sort mode is adc value that increment or decrement in table */
>> + /* The sort mode is adc value that increment or decrement in table */
>> enum adc_sort_mode mode;
>> };
>>
>> @@ -617,7 +617,7 @@ rockchip_thermal_register_sensor(struct platform_device
>> *pdev, return 0;
>> }
>>
>> -/*
>> +/**
>> * Reset TSADC Controller, reset all tsadc registers.
>> */
>> static void rockchip_thermal_reset_controller(struct reset_control *reset)
>
>
>
>
> --
> Thanks,
> Caesar