2016-03-10 21:26:12

by Fenghua Yu

Subject: [PATCH v2] x86/cpufeatures.h: Enumerate A Few New AVX-512 Features

From: Fenghua Yu <[email protected]>

A few new AVX-512 instruction groups/features are added in cpufeatures.h
for enuermation: AVX512DQ, AVX512BW, and AVX512VL.

The specification for latest AVX-512 including the features can be found at
https://software.intel.com/sites/default/files/managed/07/b7/319433-023.pdf

Signed-off-by: Fenghua Yu <[email protected]>
---

v2: Change cpufeature.h to cpufeatures.h to use right file name in latest
kernel.

arch/x86/include/asm/cpufeatures.h | 3 +++
1 file changed, 3 insertions(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 1a2811f..9ba2ca9 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -220,6 +220,7 @@
#define X86_FEATURE_CQM ( 9*32+12) /* Cache QoS Monitoring */
#define X86_FEATURE_MPX ( 9*32+14) /* Memory Protection Extension */
#define X86_FEATURE_AVX512F ( 9*32+16) /* AVX-512 Foundation */
+#define X86_FEATURE_AVX512DQ ( 9*32+17) /* AVX-512 DQ Instructions */
#define X86_FEATURE_RDSEED ( 9*32+18) /* The RDSEED instruction */
#define X86_FEATURE_ADX ( 9*32+19) /* The ADCX and ADOX instructions */
#define X86_FEATURE_SMAP ( 9*32+20) /* Supervisor Mode Access Prevention */
@@ -230,6 +231,8 @@
#define X86_FEATURE_AVX512ER ( 9*32+27) /* AVX-512 Exponential and Reciprocal */
#define X86_FEATURE_AVX512CD ( 9*32+28) /* AVX-512 Conflict Detection */
#define X86_FEATURE_SHA_NI ( 9*32+29) /* SHA1/SHA256 Instruction Extensions */
+#define X86_FEATURE_AVX512BW ( 9*32+30) /* AVX-512 BW Instructions */
+#define X86_FEATURE_AVX512VL ( 9*32+31) /* AVX-512 Vector Lengths */

/* Extended state features, CPUID level 0x0000000d:1 (eax), word 10 */
#define X86_FEATURE_XSAVEOPT (10*32+ 0) /* XSAVEOPT */
--
2.5.0

2016-03-10 21:35:31

by Dave Hansen

Subject: Re: [PATCH v2] x86/cpufeatures.h: Enumerate A Few New AVX-512 Features

On 03/10/2016 04:23 PM, Fenghua Yu wrote:
> A few new AVX-512 instruction groups/features are added in cpufeatures.h
> for enuermation: AVX512DQ, AVX512BW, and AVX512VL.
>
> The specification for latest AVX-512 including the features can be found at
> https://software.intel.com/sites/default/files/managed/07/b7/319433-023.pdf

Do we need to add these to fpu__xstate_clear_all_cpu_caps()?

2016-03-10 23:18:35

by H. Peter Anvin

Subject: Re: [PATCH v2] x86/cpufeatures.h: Enumerate A Few New AVX-512 Features

On 03/10/2016 01:35 PM, Dave Hansen wrote:
> On 03/10/2016 04:23 PM, Fenghua Yu wrote:
>> A few new AVX-512 instruction groups/features are added in cpufeatures.h
>> for enuermation: AVX512DQ, AVX512BW, and AVX512VL.
>>
>> The specification for latest AVX-512 including the features can be found at
>> https://software.intel.com/sites/default/files/managed/07/b7/319433-023.pdf
>
> Do we need to add these to fpu__xstate_clear_all_cpu_caps()?
>

I would think so.

-hpa