The arm builds failed on Linux next with gcc-13 and clang-18.
Config: arm imx_v6_v7_defconfig - failed
Reported-by: Linux Kernel Functional Testing <[email protected]>
Build log:
-----
arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function
`rcu_trc_cmpxchg_need_qs':
update.c:(.text+0x348): undefined reference to `__bad_cmpxchg'
arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function
`rcu_read_unlock_trace_special':
update.c:(.text+0x41c): undefined reference to `__bad_cmpxchg'
arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function
`trc_read_check_handler':
update.c:(.text+0x4b0): undefined reference to `__bad_cmpxchg'
arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function `trc_inspect_reader':
update.c:(.text+0x1518): undefined reference to `__bad_cmpxchg'
arm-linux-gnueabihf-ld: update.c:(.text+0x1548): undefined reference
to `__bad_cmpxchg'
arm-linux-gnueabihf-ld: kernel/rcu/update.o:update.c:(.text+0x1cc4):
more undefined references to `__bad_cmpxchg' follow
make[3]: *** [/builds/linux/scripts/Makefile.vmlinux:34: vmlinux] Error 1
metadata:
git_describe: next-20240529
git_repo: https://gitlab.com/Linaro/lkft/mirrors/next/linux-next
git_short_log: 9d99040b1bc8 ("Add linux-next specific files for 20240529")
job_url: https://tuxapi.tuxsuite.com/v1/groups/linaro/projects/lkft/builds/2h944W0LTbtfMPlDNiOq17hXpQ8
Links:
- https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20240529/testrun/24129266/suite/build/test/gcc-13-imx_v6_v7_defconfig/history/
- https://qa-reports.linaro.org/lkft/linux-next-master/build/next-20240529/testrun/24129266/suite/build/test/gcc-13-imx_v6_v7_defconfig/log
--
Linaro LKFT
https://lkft.linaro.org
On Thu, May 30, 2024 at 05:50:52PM +0530, Naresh Kamboju wrote:
> The arm builds failed on Linux next with gcc-13 and clang-18.
>
> Config: arm imx_v6_v7_defconfig - failed
>
> Reported-by: Linux Kernel Functional Testing <[email protected]>
>
> Build log:
> -----
> arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function
> `rcu_trc_cmpxchg_need_qs':
> update.c:(.text+0x348): undefined reference to `__bad_cmpxchg'
> arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function
> `rcu_read_unlock_trace_special':
> update.c:(.text+0x41c): undefined reference to `__bad_cmpxchg'
> arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function
> `trc_read_check_handler':
> update.c:(.text+0x4b0): undefined reference to `__bad_cmpxchg'
> arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function `trc_inspect_reader':
> update.c:(.text+0x1518): undefined reference to `__bad_cmpxchg'
> arm-linux-gnueabihf-ld: update.c:(.text+0x1548): undefined reference
> to `__bad_cmpxchg'
> arm-linux-gnueabihf-ld: kernel/rcu/update.o:update.c:(.text+0x1cc4):
> more undefined references to `__bad_cmpxchg' follow
> make[3]: *** [/builds/linux/scripts/Makefile.vmlinux:34: vmlinux] Error 1
You get a reference to __bad_cmpxchg() when someone uses cmpxchg() on
a datatype that there are no CPU instructions to perform the atomic
compare-and-exchange.
As we support 8-bit, 16-bit and 32-bit, I would expect that we're now
seeing cmpxchg() being used on 64-bit values, which are unsupportable
on 32-bit Arm.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 80Mbps down 10Mbps up. Decent connectivity at last!
On Thu, May 30, 2024, at 14:26, Russell King (Oracle) wrote:
> On Thu, May 30, 2024 at 05:50:52PM +0530, Naresh Kamboju wrote:
>> The arm builds failed on Linux next with gcc-13 and clang-18.
>>
>> Config: arm imx_v6_v7_defconfig - failed
>>
>> Reported-by: Linux Kernel Functional Testing <[email protected]>
>>
>> Build log:
>> -----
>> arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function
>> `rcu_trc_cmpxchg_need_qs':
>> update.c:(.text+0x348): undefined reference to `__bad_cmpxchg'
>> arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function
>> `rcu_read_unlock_trace_special':
>> update.c:(.text+0x41c): undefined reference to `__bad_cmpxchg'
>> arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function
>> `trc_read_check_handler':
>> update.c:(.text+0x4b0): undefined reference to `__bad_cmpxchg'
>> arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function `trc_inspect_reader':
>> update.c:(.text+0x1518): undefined reference to `__bad_cmpxchg'
>> arm-linux-gnueabihf-ld: update.c:(.text+0x1548): undefined reference
>> to `__bad_cmpxchg'
>> arm-linux-gnueabihf-ld: kernel/rcu/update.o:update.c:(.text+0x1cc4):
>> more undefined references to `__bad_cmpxchg' follow
>> make[3]: *** [/builds/linux/scripts/Makefile.vmlinux:34: vmlinux] Error 1
>
> You get a reference to __bad_cmpxchg() when someone uses cmpxchg() on
> a datatype that there are no CPU instructions to perform the atomic
> compare-and-exchange.
>
> As we support 8-bit, 16-bit and 32-bit, I would expect that we're now
> seeing cmpxchg() being used on 64-bit values, which are unsupportable
> on 32-bit Arm.
A 64-bit cmpxchg() would fail on most 32-bit architectures,
other than armv6k+ and i686+. Since this one fails on
an armv6 (non-6k) build, it's probably the added 8-bit
cmpxchg() that Paul talked about using for RCU, though I
don't see that in linux-next here.
I htink we need to use the emulated cmpxchg8() in
__cmpxchg() for this case, just like we do on other
architectures that only have word size atomics.
Arnd
On Thu, May 30, 2024 at 03:27:58PM +0200, Arnd Bergmann wrote:
> On Thu, May 30, 2024, at 14:26, Russell King (Oracle) wrote:
> > On Thu, May 30, 2024 at 05:50:52PM +0530, Naresh Kamboju wrote:
> >> The arm builds failed on Linux next with gcc-13 and clang-18.
> >>
> >> Config: arm imx_v6_v7_defconfig - failed
> >>
> >> Reported-by: Linux Kernel Functional Testing <[email protected]>
> >>
> >> Build log:
> >> -----
> >> arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function
> >> `rcu_trc_cmpxchg_need_qs':
> >> update.c:(.text+0x348): undefined reference to `__bad_cmpxchg'
> >> arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function
> >> `rcu_read_unlock_trace_special':
> >> update.c:(.text+0x41c): undefined reference to `__bad_cmpxchg'
> >> arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function
> >> `trc_read_check_handler':
> >> update.c:(.text+0x4b0): undefined reference to `__bad_cmpxchg'
> >> arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function `trc_inspect_reader':
> >> update.c:(.text+0x1518): undefined reference to `__bad_cmpxchg'
> >> arm-linux-gnueabihf-ld: update.c:(.text+0x1548): undefined reference
> >> to `__bad_cmpxchg'
> >> arm-linux-gnueabihf-ld: kernel/rcu/update.o:update.c:(.text+0x1cc4):
> >> more undefined references to `__bad_cmpxchg' follow
> >> make[3]: *** [/builds/linux/scripts/Makefile.vmlinux:34: vmlinux] Error 1
> >
> > You get a reference to __bad_cmpxchg() when someone uses cmpxchg() on
> > a datatype that there are no CPU instructions to perform the atomic
> > compare-and-exchange.
> >
> > As we support 8-bit, 16-bit and 32-bit, I would expect that we're now
> > seeing cmpxchg() being used on 64-bit values, which are unsupportable
> > on 32-bit Arm.
>
> A 64-bit cmpxchg() would fail on most 32-bit architectures,
> other than armv6k+ and i686+. Since this one fails on
> an armv6 (non-6k) build, it's probably the added 8-bit
> cmpxchg() that Paul talked about using for RCU, though I
> don't see that in linux-next here.
>
> I htink we need to use the emulated cmpxchg8() in
> __cmpxchg() for this case, just like we do on other
> architectures that only have word size atomics.
Thank you all for your testing and analysis!
I will fix this, and also pull the 8046f3005015 ("rcu-tasks: Remove
open-coded one-byte cmpxchg() emulation") commit out of my -next pile
in the meantime.
Thanx, Paul
On Thu, May 30, 2024 at 09:37:21AM -0700, Paul E. McKenney wrote:
> On Thu, May 30, 2024 at 03:27:58PM +0200, Arnd Bergmann wrote:
> > On Thu, May 30, 2024, at 14:26, Russell King (Oracle) wrote:
> > > On Thu, May 30, 2024 at 05:50:52PM +0530, Naresh Kamboju wrote:
> > >> The arm builds failed on Linux next with gcc-13 and clang-18.
> > >>
> > >> Config: arm imx_v6_v7_defconfig - failed
> > >>
> > >> Reported-by: Linux Kernel Functional Testing <[email protected]>
> > >>
> > >> Build log:
> > >> -----
> > >> arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function
> > >> `rcu_trc_cmpxchg_need_qs':
> > >> update.c:(.text+0x348): undefined reference to `__bad_cmpxchg'
> > >> arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function
> > >> `rcu_read_unlock_trace_special':
> > >> update.c:(.text+0x41c): undefined reference to `__bad_cmpxchg'
> > >> arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function
> > >> `trc_read_check_handler':
> > >> update.c:(.text+0x4b0): undefined reference to `__bad_cmpxchg'
> > >> arm-linux-gnueabihf-ld: kernel/rcu/update.o: in function `trc_inspect_reader':
> > >> update.c:(.text+0x1518): undefined reference to `__bad_cmpxchg'
> > >> arm-linux-gnueabihf-ld: update.c:(.text+0x1548): undefined reference
> > >> to `__bad_cmpxchg'
> > >> arm-linux-gnueabihf-ld: kernel/rcu/update.o:update.c:(.text+0x1cc4):
> > >> more undefined references to `__bad_cmpxchg' follow
> > >> make[3]: *** [/builds/linux/scripts/Makefile.vmlinux:34: vmlinux] Error 1
> > >
> > > You get a reference to __bad_cmpxchg() when someone uses cmpxchg() on
> > > a datatype that there are no CPU instructions to perform the atomic
> > > compare-and-exchange.
> > >
> > > As we support 8-bit, 16-bit and 32-bit, I would expect that we're now
> > > seeing cmpxchg() being used on 64-bit values, which are unsupportable
> > > on 32-bit Arm.
> >
> > A 64-bit cmpxchg() would fail on most 32-bit architectures,
> > other than armv6k+ and i686+. Since this one fails on
> > an armv6 (non-6k) build, it's probably the added 8-bit
> > cmpxchg() that Paul talked about using for RCU, though I
> > don't see that in linux-next here.
> >
> > I htink we need to use the emulated cmpxchg8() in
> > __cmpxchg() for this case, just like we do on other
> > architectures that only have word size atomics.
>
> Thank you all for your testing and analysis!
>
> I will fix this, and also pull the 8046f3005015 ("rcu-tasks: Remove
> open-coded one-byte cmpxchg() emulation") commit out of my -next pile
> in the meantime.
And for an untested first attempt at a fix.
What did I mess up this time? ;-)
Thanx, Paul
------------------------------------------------------------------------
commit 6e43483dd111cf1be58b02a45d0ca729ca2634ba
Author: Paul E. McKenney <[email protected]>
Date: Thu May 30 10:11:31 2024 -0700
ARM: Emulate one-byte cmpxchg
Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on ARM systems
with ARCH < ARMv6K.
Reported-by: Mark Brown <[email protected]>
Closes: https://lore.kernel.org/all/[email protected]/
Reported-by: Naresh Kamboju <[email protected]>
Closes: https://lore.kernel.org/all/CA+G9fYuZ+pf6p8AXMZWtdFtX-gbG8HMaBKp=XbxcdzA_QeLkxQ@mail.gmail.com/
Signed-off-by: Paul E. McKenney <[email protected]>
Cc: "Russell King (Oracle)" <[email protected]>
Cc: Arnd Bergmann <[email protected]>
Cc: Andrew Davis <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: Linus Walleij <[email protected]>
Cc: Eric DeVolder <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: <[email protected]>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ee5115252aac4..a867a7d967aa5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -34,6 +34,7 @@ config ARM
select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
+ select ARCH_NEED_CMPXCHG_1_EMU if CPU_V6
select ARCH_SUPPORTS_ATOMIC_RMW
select ARCH_SUPPORTS_CFI_CLANG
select ARCH_SUPPORTS_HUGETLBFS if ARM_LPAE
diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
index 44667bdb4707a..fd9b99f4dca46 100644
--- a/arch/arm/include/asm/cmpxchg.h
+++ b/arch/arm/include/asm/cmpxchg.h
@@ -162,7 +162,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
prefetchw((const void *)ptr);
switch (size) {
-#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
+#ifdef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
+ case 1:
+ oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
+ break;
+#else
case 1:
do {
asm volatile("@ __cmpxchg1\n"
On Thu, May 30, 2024, at 19:24, Paul E. McKenney wrote:
> On Thu, May 30, 2024 at 09:37:21AM -0700, Paul E. McKenney wrote:
>> On Thu, May 30, 2024 at 03:27:58PM +0200, Arnd Bergmann wrote:
> And for an untested first attempt at a fix.
>
> What did I mess up this time? ;-)
>
I think only the comment:
>
> switch (size) {
> -#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
> +#ifdef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
> + case 1:
> + oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
> + break;
> +#else
"min ARCH >= ARMv6K" now applies to the #else side, while the
#if side is the early ARMv6 (pre-v6K).
Arnd
On Thu, May 30, 2024 at 08:05:50PM +0200, Arnd Bergmann wrote:
> On Thu, May 30, 2024, at 19:24, Paul E. McKenney wrote:
> > On Thu, May 30, 2024 at 09:37:21AM -0700, Paul E. McKenney wrote:
> >> On Thu, May 30, 2024 at 03:27:58PM +0200, Arnd Bergmann wrote:
>
> > And for an untested first attempt at a fix.
> >
> > What did I mess up this time? ;-)
> >
>
> I think only the comment:
>
> >
> > switch (size) {
> > -#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
> > +#ifdef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
> > + case 1:
> > + oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
> > + break;
> > +#else
>
> "min ARCH >= ARMv6K" now applies to the #else side, while the
> #if side is the early ARMv6 (pre-v6K).
Good catch!
I plan to fold the following into the original with attribution.
Thanx, Paul
------------------------------------------------------------------------
diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
index fd9b99f4dca46..34674a4118755 100644
--- a/arch/arm/include/asm/cmpxchg.h
+++ b/arch/arm/include/asm/cmpxchg.h
@@ -162,11 +162,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
prefetchw((const void *)ptr);
switch (size) {
-#ifdef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
+#ifdef CONFIG_CPU_V6 /* min ARCH < ARMv6K */
case 1:
oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
break;
-#else
+#else /* min ARCH >= ARMv6K */
case 1:
do {
asm volatile("@ __cmpxchg1\n"
On Thu, May 30, 2024 at 10:24:05AM -0700, Paul E. McKenney wrote:
> And for an untested first attempt at a fix.
>
> What did I mess up this time? ;-)
An include for cmpxchg-emu.h ;)
In file included from arch/arm/include/asm/atomic.h:16,
from include/linux/atomic.h:7,
from include/asm-generic/bitops/lock.h:5,
from arch/arm/include/asm/bitops.h:245,
from include/linux/bitops.h:63,
from include/linux/log2.h:12,
from kernel/bounds.c:13:
arch/arm/include/asm/cmpxchg.h: In function '__cmpxchg':
arch/arm/include/asm/cmpxchg.h:167:26: error: implicit declaration of function 'cmpxchg_emu_u8' [-Werror=implicit-function-declaration]
167 | oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
| ^~~~~~~~~~~~~~
cc1: some warnings being treated as errors
> Thanx, Paul
>
> ------------------------------------------------------------------------
>
> commit 6e43483dd111cf1be58b02a45d0ca729ca2634ba
> Author: Paul E. McKenney <[email protected]>
> Date: Thu May 30 10:11:31 2024 -0700
>
> ARM: Emulate one-byte cmpxchg
>
> Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on ARM systems
> with ARCH < ARMv6K.
>
> Reported-by: Mark Brown <[email protected]>
> Closes: https://lore.kernel.org/all/[email protected]/
> Reported-by: Naresh Kamboju <[email protected]>
> Closes: https://lore.kernel.org/all/CA+G9fYuZ+pf6p8AXMZWtdFtX-gbG8HMaBKp=XbxcdzA_QeLkxQ@mail.gmail.com/
> Signed-off-by: Paul E. McKenney <[email protected]>
> Cc: "Russell King (Oracle)" <[email protected]>
> Cc: Arnd Bergmann <[email protected]>
> Cc: Andrew Davis <[email protected]>
> Cc: Andrew Morton <[email protected]>
> Cc: Linus Walleij <[email protected]>
> Cc: Eric DeVolder <[email protected]>
> Cc: Rob Herring <[email protected]>
> Cc: <[email protected]>
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index ee5115252aac4..a867a7d967aa5 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -34,6 +34,7 @@ config ARM
> select ARCH_MIGHT_HAVE_PC_PARPORT
> select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
> select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
> + select ARCH_NEED_CMPXCHG_1_EMU if CPU_V6
> select ARCH_SUPPORTS_ATOMIC_RMW
> select ARCH_SUPPORTS_CFI_CLANG
> select ARCH_SUPPORTS_HUGETLBFS if ARM_LPAE
> diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
> index 44667bdb4707a..fd9b99f4dca46 100644
> --- a/arch/arm/include/asm/cmpxchg.h
> +++ b/arch/arm/include/asm/cmpxchg.h
> @@ -162,7 +162,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
> prefetchw((const void *)ptr);
>
> switch (size) {
> -#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
> +#ifdef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
> + case 1:
> + oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
> + break;
> +#else
> case 1:
> do {
> asm volatile("@ __cmpxchg1\n"
>
> _______________________________________________
> linux-arm-kernel mailing list
> [email protected]
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
On Thu, May 30, 2024 at 02:52:48PM -0700, Nathan Chancellor wrote:
> On Thu, May 30, 2024 at 10:24:05AM -0700, Paul E. McKenney wrote:
> > And for an untested first attempt at a fix.
> >
> > What did I mess up this time? ;-)
>
> An include for cmpxchg-emu.h ;)
>
> In file included from arch/arm/include/asm/atomic.h:16,
> from include/linux/atomic.h:7,
> from include/asm-generic/bitops/lock.h:5,
> from arch/arm/include/asm/bitops.h:245,
> from include/linux/bitops.h:63,
> from include/linux/log2.h:12,
> from kernel/bounds.c:13:
> arch/arm/include/asm/cmpxchg.h: In function '__cmpxchg':
> arch/arm/include/asm/cmpxchg.h:167:26: error: implicit declaration of function 'cmpxchg_emu_u8' [-Werror=implicit-function-declaration]
> 167 | oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
> | ^~~~~~~~~~~~~~
> cc1: some warnings being treated as errors
Good catch, and thank you for testing this! Does the updated version
shown below do better?
Thanx, Paul
------------------------------------------------------------------------
commit 74e3470afacaa9d2f37db4773a5fef887ac4ef56
Author: Paul E. McKenney <[email protected]>
Date: Thu May 30 10:11:31 2024 -0700
ARM: Emulate one-byte cmpxchg
Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on ARM systems
with ARCH < ARMv6K.
[ paulmck: Apply Arnd Bergmann and Nathan Chancellor feedback. ]
Reported-by: Mark Brown <[email protected]>
Closes: https://lore.kernel.org/all/[email protected]/
Reported-by: Naresh Kamboju <[email protected]>
Closes: https://lore.kernel.org/all/CA+G9fYuZ+pf6p8AXMZWtdFtX-gbG8HMaBKp=XbxcdzA_QeLkxQ@mail.gmail.com/
Signed-off-by: Paul E. McKenney <[email protected]>
Cc: "Russell King (Oracle)" <[email protected]>
Cc: Arnd Bergmann <[email protected]>
Cc: Andrew Davis <[email protected]>
Cc: Andrew Morton <[email protected]>
Cc: Linus Walleij <[email protected]>
Cc: Eric DeVolder <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: <[email protected]>
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ee5115252aac4..a867a7d967aa5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -34,6 +34,7 @@ config ARM
select ARCH_MIGHT_HAVE_PC_PARPORT
select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
+ select ARCH_NEED_CMPXCHG_1_EMU if CPU_V6
select ARCH_SUPPORTS_ATOMIC_RMW
select ARCH_SUPPORTS_CFI_CLANG
select ARCH_SUPPORTS_HUGETLBFS if ARM_LPAE
diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
index 44667bdb4707a..a428e06fe94ee 100644
--- a/arch/arm/include/asm/cmpxchg.h
+++ b/arch/arm/include/asm/cmpxchg.h
@@ -5,6 +5,7 @@
#include <linux/irqflags.h>
#include <linux/prefetch.h>
#include <asm/barrier.h>
+#include <linux/cmpxchg-emu.h>
#if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
/*
@@ -162,7 +163,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
prefetchw((const void *)ptr);
switch (size) {
-#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
+#ifdef CONFIG_CPU_V6 /* min ARCH < ARMv6K */
+ case 1:
+ oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
+ break;
+#else /* min ARCH >= ARMv6K */
case 1:
do {
asm volatile("@ __cmpxchg1\n"
On Thu, May 30, 2024 at 03:05:21PM -0700, Paul E. McKenney wrote:
> On Thu, May 30, 2024 at 02:52:48PM -0700, Nathan Chancellor wrote:
> > On Thu, May 30, 2024 at 10:24:05AM -0700, Paul E. McKenney wrote:
> > > And for an untested first attempt at a fix.
> > >
> > > What did I mess up this time? ;-)
> >
> > An include for cmpxchg-emu.h ;)
> >
> > In file included from arch/arm/include/asm/atomic.h:16,
> > from include/linux/atomic.h:7,
> > from include/asm-generic/bitops/lock.h:5,
> > from arch/arm/include/asm/bitops.h:245,
> > from include/linux/bitops.h:63,
> > from include/linux/log2.h:12,
> > from kernel/bounds.c:13:
> > arch/arm/include/asm/cmpxchg.h: In function '__cmpxchg':
> > arch/arm/include/asm/cmpxchg.h:167:26: error: implicit declaration of function 'cmpxchg_emu_u8' [-Werror=implicit-function-declaration]
> > 167 | oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
> > | ^~~~~~~~~~~~~~
> > cc1: some warnings being treated as errors
>
> Good catch, and thank you for testing this! Does the updated version
> shown below do better?
Yes, that matches what I tested locally before I replied initially.
Thanks for the quick fix!
Cheers,
Nathan
> Thanx, Paul
>
> ------------------------------------------------------------------------
>
> commit 74e3470afacaa9d2f37db4773a5fef887ac4ef56
> Author: Paul E. McKenney <[email protected]>
> Date: Thu May 30 10:11:31 2024 -0700
>
> ARM: Emulate one-byte cmpxchg
>
> Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on ARM systems
> with ARCH < ARMv6K.
>
> [ paulmck: Apply Arnd Bergmann and Nathan Chancellor feedback. ]
>
> Reported-by: Mark Brown <[email protected]>
> Closes: https://lore.kernel.org/all/[email protected]/
> Reported-by: Naresh Kamboju <[email protected]>
> Closes: https://lore.kernel.org/all/CA+G9fYuZ+pf6p8AXMZWtdFtX-gbG8HMaBKp=XbxcdzA_QeLkxQ@mail.gmail.com/
> Signed-off-by: Paul E. McKenney <[email protected]>
> Cc: "Russell King (Oracle)" <[email protected]>
> Cc: Arnd Bergmann <[email protected]>
> Cc: Andrew Davis <[email protected]>
> Cc: Andrew Morton <[email protected]>
> Cc: Linus Walleij <[email protected]>
> Cc: Eric DeVolder <[email protected]>
> Cc: Rob Herring <[email protected]>
> Cc: <[email protected]>
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index ee5115252aac4..a867a7d967aa5 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -34,6 +34,7 @@ config ARM
> select ARCH_MIGHT_HAVE_PC_PARPORT
> select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
> select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
> + select ARCH_NEED_CMPXCHG_1_EMU if CPU_V6
> select ARCH_SUPPORTS_ATOMIC_RMW
> select ARCH_SUPPORTS_CFI_CLANG
> select ARCH_SUPPORTS_HUGETLBFS if ARM_LPAE
> diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
> index 44667bdb4707a..a428e06fe94ee 100644
> --- a/arch/arm/include/asm/cmpxchg.h
> +++ b/arch/arm/include/asm/cmpxchg.h
> @@ -5,6 +5,7 @@
> #include <linux/irqflags.h>
> #include <linux/prefetch.h>
> #include <asm/barrier.h>
> +#include <linux/cmpxchg-emu.h>
>
> #if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
> /*
> @@ -162,7 +163,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
> prefetchw((const void *)ptr);
>
> switch (size) {
> -#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
> +#ifdef CONFIG_CPU_V6 /* min ARCH < ARMv6K */
> + case 1:
> + oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
> + break;
> +#else /* min ARCH >= ARMv6K */
> case 1:
> do {
> asm volatile("@ __cmpxchg1\n"
On Thu, May 30, 2024 at 04:30:53PM -0700, Nathan Chancellor wrote:
> On Thu, May 30, 2024 at 03:05:21PM -0700, Paul E. McKenney wrote:
> > On Thu, May 30, 2024 at 02:52:48PM -0700, Nathan Chancellor wrote:
> > > On Thu, May 30, 2024 at 10:24:05AM -0700, Paul E. McKenney wrote:
> > > > And for an untested first attempt at a fix.
> > > >
> > > > What did I mess up this time? ;-)
> > >
> > > An include for cmpxchg-emu.h ;)
> > >
> > > In file included from arch/arm/include/asm/atomic.h:16,
> > > from include/linux/atomic.h:7,
> > > from include/asm-generic/bitops/lock.h:5,
> > > from arch/arm/include/asm/bitops.h:245,
> > > from include/linux/bitops.h:63,
> > > from include/linux/log2.h:12,
> > > from kernel/bounds.c:13:
> > > arch/arm/include/asm/cmpxchg.h: In function '__cmpxchg':
> > > arch/arm/include/asm/cmpxchg.h:167:26: error: implicit declaration of function 'cmpxchg_emu_u8' [-Werror=implicit-function-declaration]
> > > 167 | oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
> > > | ^~~~~~~~~~~~~~
> > > cc1: some warnings being treated as errors
> >
> > Good catch, and thank you for testing this! Does the updated version
> > shown below do better?
>
> Yes, that matches what I tested locally before I replied initially.
Very good! May I please add your Tested-by?
Thanx, Paul
> Thanks for the quick fix!
>
> Cheers,
> Nathan
>
> > Thanx, Paul
> >
> > ------------------------------------------------------------------------
> >
> > commit 74e3470afacaa9d2f37db4773a5fef887ac4ef56
> > Author: Paul E. McKenney <[email protected]>
> > Date: Thu May 30 10:11:31 2024 -0700
> >
> > ARM: Emulate one-byte cmpxchg
> >
> > Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on ARM systems
> > with ARCH < ARMv6K.
> >
> > [ paulmck: Apply Arnd Bergmann and Nathan Chancellor feedback. ]
> >
> > Reported-by: Mark Brown <[email protected]>
> > Closes: https://lore.kernel.org/all/[email protected]/
> > Reported-by: Naresh Kamboju <[email protected]>
> > Closes: https://lore.kernel.org/all/CA+G9fYuZ+pf6p8AXMZWtdFtX-gbG8HMaBKp=XbxcdzA_QeLkxQ@mail.gmail.com/
> > Signed-off-by: Paul E. McKenney <[email protected]>
> > Cc: "Russell King (Oracle)" <[email protected]>
> > Cc: Arnd Bergmann <[email protected]>
> > Cc: Andrew Davis <[email protected]>
> > Cc: Andrew Morton <[email protected]>
> > Cc: Linus Walleij <[email protected]>
> > Cc: Eric DeVolder <[email protected]>
> > Cc: Rob Herring <[email protected]>
> > Cc: <[email protected]>
> >
> > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > index ee5115252aac4..a867a7d967aa5 100644
> > --- a/arch/arm/Kconfig
> > +++ b/arch/arm/Kconfig
> > @@ -34,6 +34,7 @@ config ARM
> > select ARCH_MIGHT_HAVE_PC_PARPORT
> > select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
> > select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
> > + select ARCH_NEED_CMPXCHG_1_EMU if CPU_V6
> > select ARCH_SUPPORTS_ATOMIC_RMW
> > select ARCH_SUPPORTS_CFI_CLANG
> > select ARCH_SUPPORTS_HUGETLBFS if ARM_LPAE
> > diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
> > index 44667bdb4707a..a428e06fe94ee 100644
> > --- a/arch/arm/include/asm/cmpxchg.h
> > +++ b/arch/arm/include/asm/cmpxchg.h
> > @@ -5,6 +5,7 @@
> > #include <linux/irqflags.h>
> > #include <linux/prefetch.h>
> > #include <asm/barrier.h>
> > +#include <linux/cmpxchg-emu.h>
> >
> > #if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
> > /*
> > @@ -162,7 +163,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
> > prefetchw((const void *)ptr);
> >
> > switch (size) {
> > -#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
> > +#ifdef CONFIG_CPU_V6 /* min ARCH < ARMv6K */
> > + case 1:
> > + oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
> > + break;
> > +#else /* min ARCH >= ARMv6K */
> > case 1:
> > do {
> > asm volatile("@ __cmpxchg1\n"
On Thu, May 30, 2024 at 05:35:44PM -0700, Paul E. McKenney wrote:
> On Thu, May 30, 2024 at 04:30:53PM -0700, Nathan Chancellor wrote:
> > On Thu, May 30, 2024 at 03:05:21PM -0700, Paul E. McKenney wrote:
> > > On Thu, May 30, 2024 at 02:52:48PM -0700, Nathan Chancellor wrote:
> > > > On Thu, May 30, 2024 at 10:24:05AM -0700, Paul E. McKenney wrote:
> > > > > And for an untested first attempt at a fix.
> > > > >
> > > > > What did I mess up this time? ;-)
> > > >
> > > > An include for cmpxchg-emu.h ;)
> > > >
> > > > In file included from arch/arm/include/asm/atomic.h:16,
> > > > from include/linux/atomic.h:7,
> > > > from include/asm-generic/bitops/lock.h:5,
> > > > from arch/arm/include/asm/bitops.h:245,
> > > > from include/linux/bitops.h:63,
> > > > from include/linux/log2.h:12,
> > > > from kernel/bounds.c:13:
> > > > arch/arm/include/asm/cmpxchg.h: In function '__cmpxchg':
> > > > arch/arm/include/asm/cmpxchg.h:167:26: error: implicit declaration of function 'cmpxchg_emu_u8' [-Werror=implicit-function-declaration]
> > > > 167 | oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
> > > > | ^~~~~~~~~~~~~~
> > > > cc1: some warnings being treated as errors
> > >
> > > Good catch, and thank you for testing this! Does the updated version
> > > shown below do better?
> >
> > Yes, that matches what I tested locally before I replied initially.
>
> Very good! May I please add your Tested-by?
Sure thing.
Tested-by: Nathan Chancellor <[email protected]>
> > > ------------------------------------------------------------------------
> > >
> > > commit 74e3470afacaa9d2f37db4773a5fef887ac4ef56
> > > Author: Paul E. McKenney <[email protected]>
> > > Date: Thu May 30 10:11:31 2024 -0700
> > >
> > > ARM: Emulate one-byte cmpxchg
> > >
> > > Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on ARM systems
> > > with ARCH < ARMv6K.
> > >
> > > [ paulmck: Apply Arnd Bergmann and Nathan Chancellor feedback. ]
> > >
> > > Reported-by: Mark Brown <[email protected]>
> > > Closes: https://lore.kernel.org/all/[email protected]/
> > > Reported-by: Naresh Kamboju <[email protected]>
> > > Closes: https://lore.kernel.org/all/CA+G9fYuZ+pf6p8AXMZWtdFtX-gbG8HMaBKp=XbxcdzA_QeLkxQ@mail.gmail.com/
> > > Signed-off-by: Paul E. McKenney <[email protected]>
> > > Cc: "Russell King (Oracle)" <[email protected]>
> > > Cc: Arnd Bergmann <[email protected]>
> > > Cc: Andrew Davis <[email protected]>
> > > Cc: Andrew Morton <[email protected]>
> > > Cc: Linus Walleij <[email protected]>
> > > Cc: Eric DeVolder <[email protected]>
> > > Cc: Rob Herring <[email protected]>
> > > Cc: <[email protected]>
> > >
> > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > > index ee5115252aac4..a867a7d967aa5 100644
> > > --- a/arch/arm/Kconfig
> > > +++ b/arch/arm/Kconfig
> > > @@ -34,6 +34,7 @@ config ARM
> > > select ARCH_MIGHT_HAVE_PC_PARPORT
> > > select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
> > > select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
> > > + select ARCH_NEED_CMPXCHG_1_EMU if CPU_V6
> > > select ARCH_SUPPORTS_ATOMIC_RMW
> > > select ARCH_SUPPORTS_CFI_CLANG
> > > select ARCH_SUPPORTS_HUGETLBFS if ARM_LPAE
> > > diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
> > > index 44667bdb4707a..a428e06fe94ee 100644
> > > --- a/arch/arm/include/asm/cmpxchg.h
> > > +++ b/arch/arm/include/asm/cmpxchg.h
> > > @@ -5,6 +5,7 @@
> > > #include <linux/irqflags.h>
> > > #include <linux/prefetch.h>
> > > #include <asm/barrier.h>
> > > +#include <linux/cmpxchg-emu.h>
> > >
> > > #if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
> > > /*
> > > @@ -162,7 +163,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
> > > prefetchw((const void *)ptr);
> > >
> > > switch (size) {
> > > -#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
> > > +#ifdef CONFIG_CPU_V6 /* min ARCH < ARMv6K */
> > > + case 1:
> > > + oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
> > > + break;
> > > +#else /* min ARCH >= ARMv6K */
> > > case 1:
> > > do {
> > > asm volatile("@ __cmpxchg1\n"
On Fri, May 31, 2024 at 09:27:22AM -0700, Nathan Chancellor wrote:
> On Thu, May 30, 2024 at 05:35:44PM -0700, Paul E. McKenney wrote:
> > On Thu, May 30, 2024 at 04:30:53PM -0700, Nathan Chancellor wrote:
> > > On Thu, May 30, 2024 at 03:05:21PM -0700, Paul E. McKenney wrote:
> > > > On Thu, May 30, 2024 at 02:52:48PM -0700, Nathan Chancellor wrote:
> > > > > On Thu, May 30, 2024 at 10:24:05AM -0700, Paul E. McKenney wrote:
> > > > > > And for an untested first attempt at a fix.
> > > > > >
> > > > > > What did I mess up this time? ;-)
> > > > >
> > > > > An include for cmpxchg-emu.h ;)
> > > > >
> > > > > In file included from arch/arm/include/asm/atomic.h:16,
> > > > > from include/linux/atomic.h:7,
> > > > > from include/asm-generic/bitops/lock.h:5,
> > > > > from arch/arm/include/asm/bitops.h:245,
> > > > > from include/linux/bitops.h:63,
> > > > > from include/linux/log2.h:12,
> > > > > from kernel/bounds.c:13:
> > > > > arch/arm/include/asm/cmpxchg.h: In function '__cmpxchg':
> > > > > arch/arm/include/asm/cmpxchg.h:167:26: error: implicit declaration of function 'cmpxchg_emu_u8' [-Werror=implicit-function-declaration]
> > > > > 167 | oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
> > > > > | ^~~~~~~~~~~~~~
> > > > > cc1: some warnings being treated as errors
> > > >
> > > > Good catch, and thank you for testing this! Does the updated version
> > > > shown below do better?
> > >
> > > Yes, that matches what I tested locally before I replied initially.
> >
> > Very good! May I please add your Tested-by?
>
> Sure thing.
>
> Tested-by: Nathan Chancellor <[email protected]>
Thank you! I will apply this on my next rebase.
Thanx, Paul
> > > > ------------------------------------------------------------------------
> > > >
> > > > commit 74e3470afacaa9d2f37db4773a5fef887ac4ef56
> > > > Author: Paul E. McKenney <[email protected]>
> > > > Date: Thu May 30 10:11:31 2024 -0700
> > > >
> > > > ARM: Emulate one-byte cmpxchg
> > > >
> > > > Use the new cmpxchg_emu_u8() to emulate one-byte cmpxchg() on ARM systems
> > > > with ARCH < ARMv6K.
> > > >
> > > > [ paulmck: Apply Arnd Bergmann and Nathan Chancellor feedback. ]
> > > >
> > > > Reported-by: Mark Brown <[email protected]>
> > > > Closes: https://lore.kernel.org/all/[email protected]/
> > > > Reported-by: Naresh Kamboju <[email protected]>
> > > > Closes: https://lore.kernel.org/all/CA+G9fYuZ+pf6p8AXMZWtdFtX-gbG8HMaBKp=XbxcdzA_QeLkxQ@mail.gmail.com/
> > > > Signed-off-by: Paul E. McKenney <[email protected]>
> > > > Cc: "Russell King (Oracle)" <[email protected]>
> > > > Cc: Arnd Bergmann <[email protected]>
> > > > Cc: Andrew Davis <[email protected]>
> > > > Cc: Andrew Morton <[email protected]>
> > > > Cc: Linus Walleij <[email protected]>
> > > > Cc: Eric DeVolder <[email protected]>
> > > > Cc: Rob Herring <[email protected]>
> > > > Cc: <[email protected]>
> > > >
> > > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > > > index ee5115252aac4..a867a7d967aa5 100644
> > > > --- a/arch/arm/Kconfig
> > > > +++ b/arch/arm/Kconfig
> > > > @@ -34,6 +34,7 @@ config ARM
> > > > select ARCH_MIGHT_HAVE_PC_PARPORT
> > > > select ARCH_OPTIONAL_KERNEL_RWX if ARCH_HAS_STRICT_KERNEL_RWX
> > > > select ARCH_OPTIONAL_KERNEL_RWX_DEFAULT if CPU_V7
> > > > + select ARCH_NEED_CMPXCHG_1_EMU if CPU_V6
> > > > select ARCH_SUPPORTS_ATOMIC_RMW
> > > > select ARCH_SUPPORTS_CFI_CLANG
> > > > select ARCH_SUPPORTS_HUGETLBFS if ARM_LPAE
> > > > diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
> > > > index 44667bdb4707a..a428e06fe94ee 100644
> > > > --- a/arch/arm/include/asm/cmpxchg.h
> > > > +++ b/arch/arm/include/asm/cmpxchg.h
> > > > @@ -5,6 +5,7 @@
> > > > #include <linux/irqflags.h>
> > > > #include <linux/prefetch.h>
> > > > #include <asm/barrier.h>
> > > > +#include <linux/cmpxchg-emu.h>
> > > >
> > > > #if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110)
> > > > /*
> > > > @@ -162,7 +163,11 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
> > > > prefetchw((const void *)ptr);
> > > >
> > > > switch (size) {
> > > > -#ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */
> > > > +#ifdef CONFIG_CPU_V6 /* min ARCH < ARMv6K */
> > > > + case 1:
> > > > + oldval = cmpxchg_emu_u8((volatile u8 *)ptr, old, new);
> > > > + break;
> > > > +#else /* min ARCH >= ARMv6K */
> > > > case 1:
> > > > do {
> > > > asm volatile("@ __cmpxchg1\n"