From: Rakesh Pillai <[email protected]>
Add the WPSS remoteproc node in dts for
PIL loading.
Reviewed-by: Stephen Boyd <[email protected]>
Signed-off-by: Rakesh Pillai <[email protected]>
Signed-off-by: Manikanta Pubbisetty <[email protected]>
---
Changes from v10:
- Rebased on ToT
Changes from v9:
- Rebased on ToT
Changes from v8:
- Enable remoteproc_wpss from sc7280-idp.dtsi as the change is common for IDP and IDP2
Changes from v7:
- Remove wpss_mem from reserved memory. Its part of board dtsi.
Changes from v6:
- Swap the oder of two properties in wpss_mem reserved memory
Changes from v5:
- Update the clock names
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 3 ++
arch/arm64/boot/dts/qcom/sc7280.dtsi | 51 ++++++++++++++++++++++++
2 files changed, 54 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index ecbf2b89d896..f61a3e15fa8b 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -547,3 +547,6 @@ sw_ctrl: sw-ctrl {
};
};
+&remoteproc_wpss {
+ status = "okay";
+};
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index f0b64be63c21..b757e8ad1199 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2842,6 +2842,57 @@ qspi: spi@88dc000 {
status = "disabled";
};
+ remoteproc_wpss: remoteproc@8a00000 {
+ compatible = "qcom,sc7280-wpss-pil";
+ reg = <0 0x08a00000 0 0x10000>;
+
+ interrupts-extended = <&intc GIC_SPI 587 IRQ_TYPE_EDGE_RISING>,
+ <&wpss_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+ <&wpss_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
+ <&wpss_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
+ <&wpss_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
+ <&wpss_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "wdog", "fatal", "ready", "handover",
+ "stop-ack", "shutdown-ack";
+
+ clocks = <&gcc GCC_WPSS_AHB_BDG_MST_CLK>,
+ <&gcc GCC_WPSS_AHB_CLK>,
+ <&gcc GCC_WPSS_RSCP_CLK>,
+ <&rpmhcc RPMH_CXO_CLK>;
+ clock-names = "ahb_bdg", "ahb",
+ "rscp", "xo";
+
+ power-domains = <&rpmhpd SC7280_CX>,
+ <&rpmhpd SC7280_MX>;
+ power-domain-names = "cx", "mx";
+
+ memory-region = <&wpss_mem>;
+
+ qcom,qmp = <&aoss_qmp>;
+
+ qcom,smem-states = <&wpss_smp2p_out 0>;
+ qcom,smem-state-names = "stop";
+
+ resets = <&aoss_reset AOSS_CC_WCSS_RESTART>,
+ <&pdc_reset PDC_WPSS_SYNC_RESET>;
+ reset-names = "restart", "pdc_sync";
+
+ qcom,halt-regs = <&tcsr_mutex 0x37000>;
+
+ status = "disabled";
+
+ glink-edge {
+ interrupts-extended = <&ipcc IPCC_CLIENT_WPSS
+ IPCC_MPROC_SIGNAL_GLINK_QMP
+ IRQ_TYPE_EDGE_RISING>;
+ mboxes = <&ipcc IPCC_CLIENT_WPSS
+ IPCC_MPROC_SIGNAL_GLINK_QMP>;
+
+ label = "wpss";
+ qcom,remote-pid = <13>;
+ };
+ };
+
dc_noc: interconnect@90e0000 {
reg = <0 0x090e0000 0 0x5080>;
compatible = "qcom,sc7280-dc-noc";
--
2.35.1
Quoting Manikanta Pubbisetty (2022-04-06 04:11:01)
> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> index ecbf2b89d896..f61a3e15fa8b 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> @@ -547,3 +547,6 @@ sw_ctrl: sw-ctrl {
> };
> };
>
> +&remoteproc_wpss {
> + status = "okay";
> +};
This should be before the PINCTRL section in this file. I believe after
the uart node.
On 4/6/2022 8:47 PM, Stephen Boyd wrote:
> Quoting Manikanta Pubbisetty (2022-04-06 04:11:01)
>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> index ecbf2b89d896..f61a3e15fa8b 100644
>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>> @@ -547,3 +547,6 @@ sw_ctrl: sw-ctrl {
>> };
>> };
>>
>> +&remoteproc_wpss {
>> + status = "okay";
>> +};
>
> This should be before the PINCTRL section in this file. I believe after
> the uart node.
I have not understood your concern, any specific reason as why
remoteproc_wpss node has to be before PINCTRL section?
There is no problem in moving, just wanted to understand the reason.
Thanks,
Manikanta
Quoting Manikanta Pubbisetty (2022-04-06 23:11:50)
>
>
> On 4/6/2022 8:47 PM, Stephen Boyd wrote:
> > Quoting Manikanta Pubbisetty (2022-04-06 04:11:01)
> >> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> >> index ecbf2b89d896..f61a3e15fa8b 100644
> >> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> >> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
> >> @@ -547,3 +547,6 @@ sw_ctrl: sw-ctrl {
> >> };
> >> };
> >>
> >> +&remoteproc_wpss {
> >> + status = "okay";
> >> +};
> >
> > This should be before the PINCTRL section in this file. I believe after
> > the uart node.
>
> I have not understood your concern, any specific reason as why
> remoteproc_wpss node has to be before PINCTRL section?
> There is no problem in moving, just wanted to understand the reason.
>
It's a style that this file is following. The end of the file is for
pinctrl configurations. Before that section is where soc nodes are
modified. There are different sections of the file with comments
delineating them.
Furthermore, adding things to the end of the file is a recipe for
conflicts when applying patches as a maintainer. This is another reason
why we sort the nodes. I suspect having different sections helps here so
that we don't sort everything alphabetically and have pinctrl settings
scattered throughout the file.
On 4/7/2022 11:46 PM, Stephen Boyd wrote:
> Quoting Manikanta Pubbisetty (2022-04-06 23:11:50)
>>
>>
>> On 4/6/2022 8:47 PM, Stephen Boyd wrote:
>>> Quoting Manikanta Pubbisetty (2022-04-06 04:11:01)
>>>> diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>>>> index ecbf2b89d896..f61a3e15fa8b 100644
>>>> --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>>>> +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
>>>> @@ -547,3 +547,6 @@ sw_ctrl: sw-ctrl {
>>>> };
>>>> };
>>>>
>>>> +&remoteproc_wpss {
>>>> + status = "okay";
>>>> +};
>>>
>>> This should be before the PINCTRL section in this file. I believe after
>>> the uart node.
>>
>> I have not understood your concern, any specific reason as why
>> remoteproc_wpss node has to be before PINCTRL section?
>> There is no problem in moving, just wanted to understand the reason.
>>
>
> It's a style that this file is following. The end of the file is for
> pinctrl configurations. Before that section is where soc nodes are
> modified. There are different sections of the file with comments
> delineating them.
>
> Furthermore, adding things to the end of the file is a recipe for
> conflicts when applying patches as a maintainer. This is another reason
> why we sort the nodes. I suspect having different sections helps here so
> that we don't sort everything alphabetically and have pinctrl settings
> scattered throughout the file.
Thanks for the explanation, I'll send out a revised patch.
Manikanta