Currently, we don't have a sched_clock registered for RISC-V systems.
This means Linux time keeping will use jiffies (running at HZ) as the
default sched_clock.
To avoid this, we explicity provide sched_clock using RISC-V rdtime
instruction (similar to riscv_timer clocksource).
Signed-off-by: Anup Patel <[email protected]>
---
drivers/clocksource/riscv_timer.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/clocksource/riscv_timer.c b/drivers/clocksource/riscv_timer.c
index 084e97dc10ed..431892200a08 100644
--- a/drivers/clocksource/riscv_timer.c
+++ b/drivers/clocksource/riscv_timer.c
@@ -8,6 +8,7 @@
#include <linux/cpu.h>
#include <linux/delay.h>
#include <linux/irq.h>
+#include <linux/sched_clock.h>
#include <asm/smp.h>
#include <asm/sbi.h>
@@ -49,6 +50,11 @@ static unsigned long long riscv_clocksource_rdtime(struct clocksource *cs)
return get_cycles64();
}
+static u64 riscv_sched_clock(void)
+{
+ return get_cycles64();
+}
+
static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = {
.name = "riscv_clocksource",
.rating = 300,
@@ -97,6 +103,9 @@ static int __init riscv_timer_init_dt(struct device_node *n)
cs = per_cpu_ptr(&riscv_clocksource, cpuid);
clocksource_register_hz(cs, riscv_timebase);
+ sched_clock_register(riscv_sched_clock,
+ BITS_PER_LONG, riscv_timebase);
+
error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
"clockevents/riscv/timer:starting",
riscv_timer_starting_cpu, riscv_timer_dying_cpu);
--
2.17.1
On 03/12/2018 13:35, Anup Patel wrote:
> Currently, we don't have a sched_clock registered for RISC-V systems.
> This means Linux time keeping will use jiffies (running at HZ) as the
> default sched_clock.
>
> To avoid this, we explicity provide sched_clock using RISC-V rdtime
> instruction (similar to riscv_timer clocksource).
>
> Signed-off-by: Anup Patel <[email protected]>
Hi Anup,
the GENERIC_SCHED_CLOCK dependency in the Kconfig is missing.
Thanks
> ---
> drivers/clocksource/riscv_timer.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/clocksource/riscv_timer.c b/drivers/clocksource/riscv_timer.c
> index 084e97dc10ed..431892200a08 100644
> --- a/drivers/clocksource/riscv_timer.c
> +++ b/drivers/clocksource/riscv_timer.c
> @@ -8,6 +8,7 @@
> #include <linux/cpu.h>
> #include <linux/delay.h>
> #include <linux/irq.h>
> +#include <linux/sched_clock.h>
> #include <asm/smp.h>
> #include <asm/sbi.h>
>
> @@ -49,6 +50,11 @@ static unsigned long long riscv_clocksource_rdtime(struct clocksource *cs)
> return get_cycles64();
> }
>
> +static u64 riscv_sched_clock(void)
> +{
> + return get_cycles64();
> +}
> +
> static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = {
> .name = "riscv_clocksource",
> .rating = 300,
> @@ -97,6 +103,9 @@ static int __init riscv_timer_init_dt(struct device_node *n)
> cs = per_cpu_ptr(&riscv_clocksource, cpuid);
> clocksource_register_hz(cs, riscv_timebase);
>
> + sched_clock_register(riscv_sched_clock,
> + BITS_PER_LONG, riscv_timebase);
> +
> error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
> "clockevents/riscv/timer:starting",
> riscv_timer_starting_cpu, riscv_timer_dying_cpu);
>
--
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On Mon, Dec 3, 2018 at 6:29 PM Daniel Lezcano <[email protected]> wrote:
>
> On 03/12/2018 13:35, Anup Patel wrote:
> > Currently, we don't have a sched_clock registered for RISC-V systems.
> > This means Linux time keeping will use jiffies (running at HZ) as the
> > default sched_clock.
> >
> > To avoid this, we explicity provide sched_clock using RISC-V rdtime
> > instruction (similar to riscv_timer clocksource).
> >
> > Signed-off-by: Anup Patel <[email protected]>
>
> Hi Anup,
>
> the GENERIC_SCHED_CLOCK dependency in the Kconfig is missing.
Sure, will do.
I also have another patch to select GENERIC_SCHED_CLOCK
for CONFIG_RISCV. Should I squash that patch with this patch??
Regards,
Anup
On 03/12/2018 15:50, Anup Patel wrote:
> On Mon, Dec 3, 2018 at 6:29 PM Daniel Lezcano <[email protected]> wrote:
>>
>> On 03/12/2018 13:35, Anup Patel wrote:
>>> Currently, we don't have a sched_clock registered for RISC-V systems.
>>> This means Linux time keeping will use jiffies (running at HZ) as the
>>> default sched_clock.
>>>
>>> To avoid this, we explicity provide sched_clock using RISC-V rdtime
>>> instruction (similar to riscv_timer clocksource).
>>>
>>> Signed-off-by: Anup Patel <[email protected]>
>>
>> Hi Anup,
>>
>> the GENERIC_SCHED_CLOCK dependency in the Kconfig is missing.
>
> Sure, will do.
>
> I also have another patch to select GENERIC_SCHED_CLOCK
> for CONFIG_RISCV. Should I squash that patch with this patch??
I prefer the riscv config option to be merged via the riscv tree.
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
On Mon, 03 Dec 2018 04:35:24 PST (-0800), [email protected] wrote:
> Currently, we don't have a sched_clock registered for RISC-V systems.
> This means Linux time keeping will use jiffies (running at HZ) as the
> default sched_clock.
>
> To avoid this, we explicity provide sched_clock using RISC-V rdtime
> instruction (similar to riscv_timer clocksource).
>
> Signed-off-by: Anup Patel <[email protected]>
> ---
> drivers/clocksource/riscv_timer.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/clocksource/riscv_timer.c b/drivers/clocksource/riscv_timer.c
> index 084e97dc10ed..431892200a08 100644
> --- a/drivers/clocksource/riscv_timer.c
> +++ b/drivers/clocksource/riscv_timer.c
> @@ -8,6 +8,7 @@
> #include <linux/cpu.h>
> #include <linux/delay.h>
> #include <linux/irq.h>
> +#include <linux/sched_clock.h>
> #include <asm/smp.h>
> #include <asm/sbi.h>
>
> @@ -49,6 +50,11 @@ static unsigned long long riscv_clocksource_rdtime(struct clocksource *cs)
> return get_cycles64();
> }
>
> +static u64 riscv_sched_clock(void)
> +{
> + return get_cycles64();
> +}
> +
> static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = {
> .name = "riscv_clocksource",
> .rating = 300,
> @@ -97,6 +103,9 @@ static int __init riscv_timer_init_dt(struct device_node *n)
> cs = per_cpu_ptr(&riscv_clocksource, cpuid);
> clocksource_register_hz(cs, riscv_timebase);
>
> + sched_clock_register(riscv_sched_clock,
> + BITS_PER_LONG, riscv_timebase);
Shouldn't this just be 64, not BITS_PER_LONG? We have 64-bit counters on
RV32I.
> +
> error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
> "clockevents/riscv/timer:starting",
> riscv_timer_starting_cpu, riscv_timer_dying_cpu);
On Fri, Dec 7, 2018 at 2:02 AM Palmer Dabbelt <[email protected]> wrote:
>
> On Mon, 03 Dec 2018 04:35:24 PST (-0800), [email protected] wrote:
> > Currently, we don't have a sched_clock registered for RISC-V systems.
> > This means Linux time keeping will use jiffies (running at HZ) as the
> > default sched_clock.
> >
> > To avoid this, we explicity provide sched_clock using RISC-V rdtime
> > instruction (similar to riscv_timer clocksource).
> >
> > Signed-off-by: Anup Patel <[email protected]>
> > ---
> > drivers/clocksource/riscv_timer.c | 9 +++++++++
> > 1 file changed, 9 insertions(+)
> >
> > diff --git a/drivers/clocksource/riscv_timer.c b/drivers/clocksource/riscv_timer.c
> > index 084e97dc10ed..431892200a08 100644
> > --- a/drivers/clocksource/riscv_timer.c
> > +++ b/drivers/clocksource/riscv_timer.c
> > @@ -8,6 +8,7 @@
> > #include <linux/cpu.h>
> > #include <linux/delay.h>
> > #include <linux/irq.h>
> > +#include <linux/sched_clock.h>
> > #include <asm/smp.h>
> > #include <asm/sbi.h>
> >
> > @@ -49,6 +50,11 @@ static unsigned long long riscv_clocksource_rdtime(struct clocksource *cs)
> > return get_cycles64();
> > }
> >
> > +static u64 riscv_sched_clock(void)
> > +{
> > + return get_cycles64();
> > +}
> > +
> > static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = {
> > .name = "riscv_clocksource",
> > .rating = 300,
> > @@ -97,6 +103,9 @@ static int __init riscv_timer_init_dt(struct device_node *n)
> > cs = per_cpu_ptr(&riscv_clocksource, cpuid);
> > clocksource_register_hz(cs, riscv_timebase);
> >
> > + sched_clock_register(riscv_sched_clock,
> > + BITS_PER_LONG, riscv_timebase);
>
> Shouldn't this just be 64, not BITS_PER_LONG? We have 64-bit counters on
> RV32I.
Ahh, yes. I got mislead by "mask" field of clocksource.
I will change this to 64 and add another patch on fix "mask" of
clocksource as well.
Regards,
Anup