Add support for CN9130 and CN9131 COM Express Type 7 CPU module boards
by Marvell.
These boards differ from the existing CN913x DB boards by the type
of ethernet connection (RGMII), the type of voltage regulators
(not i2c expander based) and the USB phy (not UTMI based).
CN9131 COM Express board is basically CN9130 COM Express board
with an additional CP115 I/O co-processor, which in this case
provides an additional USB host controller on the board.
Signed-off-by: Elad Nachman <[email protected]>
---
arch/arm64/boot/dts/marvell/Makefile | 2 +
.../boot/dts/marvell/cn9130-db-comexpress.dts | 100 ++++++++++++++++
.../boot/dts/marvell/cn9131-db-comexpress.dts | 112 ++++++++++++++++++
3 files changed, 214 insertions(+)
create mode 100644 arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dts
create mode 100644 arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dts
diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
index 79ac09b58a89..7708658d6ceb 100644
--- a/arch/arm64/boot/dts/marvell/Makefile
+++ b/arch/arm64/boot/dts/marvell/Makefile
@@ -26,4 +26,6 @@ dtb-$(CONFIG_ARCH_MVEBU) += cn9132-db.dtb
dtb-$(CONFIG_ARCH_MVEBU) += cn9132-db-B.dtb
dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-A.dtb
dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-B.dtb
+dtb-$(CONFIG_ARCH_MVEBU) += cn9130-db-comexpress.dtb
+dtb-$(CONFIG_ARCH_MVEBU) += cn9131-db-comexpress.dtb
dtb-$(CONFIG_ARCH_MVEBU) += ac5-98dx35xx-rd.dtb
diff --git a/arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dts b/arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dts
new file mode 100644
index 000000000000..ed33076a34f5
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dts
@@ -0,0 +1,100 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 Marvell International Ltd.
+ *
+ * Device tree for the CN9130-DB Com Express board.
+ */
+
+#include "cn9130-db.dtsi"
+
+/ {
+ model = "Marvell Armada CN9130-DB COM EXPRESS type 7 board";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x2 0x00000000>;
+ };
+
+};
+
+&ap0_reg_sd_vccq {
+ regulator-max-microvolt = <1800000>;
+ states = <1800000 0x1 1800000 0x0>;
+ /delete-property/ gpios;
+};
+
+&cp0_reg_usb3_vbus0 {
+ /delete-property/ gpio;
+};
+
+&cp0_reg_usb3_vbus1 {
+ /delete-property/ gpio;
+};
+
+&cp0_reg_sd_vcc {
+ status = "disabled";
+};
+
+&cp0_reg_sd_vccq {
+ status = "disabled";
+};
+
+&cp0_sdhci0 {
+ status = "disabled";
+};
+
+&cp0_eth0 {
+ status = "disabled";
+};
+
+&cp0_eth1 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+};
+
+&cp0_eth2 {
+ status = "disabled";
+};
+
+&cp0_mdio {
+ status = "okay";
+ pinctrl-0 = <&cp0_ge_mdio_pins>;
+ phy0: ethernet-phy@0 {
+ marvell,reg-init = <3 16 0 0x1a4a>;
+ reg = <0>;
+ };
+};
+
+&cp0_syscon0 {
+ cp0_pinctrl: pinctrl {
+ compatible = "marvell,cp115-standalone-pinctrl";
+
+ cp0_ge_mdio_pins: ge-mdio-pins {
+ marvell,pins = "mpp40", "mpp41";
+ marvell,function = "ge";
+ };
+ };
+};
+
+&cp0_sdhci0 {
+ status = "disabled";
+};
+
+&cp0_spi1 {
+ status = "okay";
+};
+
+&cp0_usb3_0 {
+ status = "okay";
+ usb-phy = <&cp0_usb3_0_phy0>;
+ phy-names = "usb";
+ /delete-property/ phys;
+};
+
+&cp0_usb3_1 {
+ status = "okay";
+ usb-phy = <&cp0_usb3_0_phy1>;
+ phy-names = "usb";
+ /delete-property/ phys;
+};
diff --git a/arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dts b/arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dts
new file mode 100644
index 000000000000..26d0bcacd405
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dts
@@ -0,0 +1,112 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2023 Marvell International Ltd.
+ *
+ * Device tree for the CN9131-DB Com Express board.
+ */
+
+#include "cn9131-db.dtsi"
+
+/ {
+ model = "Marvell Armada CN9131-DB COM EXPRESS type 7 board";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x2 0x00000000>;
+ };
+
+};
+
+&ap0_reg_sd_vccq {
+ regulator-max-microvolt = <1800000>;
+ states = <1800000 0x1 1800000 0x0>;
+ /delete-property/ gpios;
+};
+
+&cp0_reg_usb3_vbus0 {
+ /delete-property/ gpio;
+};
+
+&cp0_reg_usb3_vbus1 {
+ /delete-property/ gpio;
+};
+
+&cp1_reg_usb3_vbus0 {
+ /delete-property/ gpio;
+};
+
+&cp0_reg_sd_vcc {
+ status = "disabled";
+};
+
+&cp0_reg_sd_vccq {
+ status = "disabled";
+};
+
+&cp0_sdhci0 {
+ status = "disabled";
+};
+
+&cp0_eth0 {
+ status = "disabled";
+};
+
+&cp0_eth1 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "rgmii-id";
+};
+
+&cp0_eth2 {
+ status = "disabled";
+};
+
+&cp0_mdio {
+ status = "okay";
+ pinctrl-0 = <&cp0_ge_mdio_pins>;
+ phy0: ethernet-phy@0 {
+ marvell,reg-init = <3 16 0 0x1a4a>;
+ reg = <0>;
+ };
+};
+
+&cp0_syscon0 {
+ cp0_pinctrl: pinctrl {
+ compatible = "marvell,cp115-standalone-pinctrl";
+
+ cp0_ge_mdio_pins: ge-mdio-pins {
+ marvell,pins = "mpp40", "mpp41";
+ marvell,function = "ge";
+ };
+ };
+};
+
+&cp0_sdhci0 {
+ status = "disabled";
+};
+
+&cp0_spi1 {
+ status = "okay";
+};
+
+&cp0_usb3_0 {
+ status = "okay";
+ usb-phy = <&cp0_usb3_0_phy0>;
+ phy-names = "usb";
+ /delete-property/ phys;
+};
+
+&cp0_usb3_1 {
+ status = "okay";
+ usb-phy = <&cp0_usb3_0_phy1>;
+ phy-names = "usb";
+ /delete-property/ phys;
+};
+
+&cp1_usb3_1 {
+ status = "okay";
+ usb-phy = <&cp1_usb3_0_phy0>;
+ /* Generic PHY, providing serdes lanes */
+ phys = <&cp1_comphy3 1>;
+ phy-names = "usb";
+};
--
2.25.1
On 24/10/2023 15:19, Elad Nachman wrote:
> Add support for CN9130 and CN9131 COM Express Type 7 CPU module boards
> by Marvell.
> These boards differ from the existing CN913x DB boards by the type
> of ethernet connection (RGMII), the type of voltage regulators
> (not i2c expander based) and the USB phy (not UTMI based).
> CN9131 COM Express board is basically CN9130 COM Express board
> with an additional CP115 I/O co-processor, which in this case
> provides an additional USB host controller on the board.
>
> Signed-off-by: Elad Nachman <[email protected]>
> ---
> arch/arm64/boot/dts/marvell/Makefile | 2 +
> .../boot/dts/marvell/cn9130-db-comexpress.dts | 100 ++++++++++++++++
> .../boot/dts/marvell/cn9131-db-comexpress.dts | 112 ++++++++++++++++++
> 3 files changed, 214 insertions(+)
> create mode 100644 arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dts
> create mode 100644 arch/arm64/boot/dts/marvell/cn9131-db-comexpress.dts
>
> diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile
> index 79ac09b58a89..7708658d6ceb 100644
> --- a/arch/arm64/boot/dts/marvell/Makefile
> +++ b/arch/arm64/boot/dts/marvell/Makefile
> @@ -26,4 +26,6 @@ dtb-$(CONFIG_ARCH_MVEBU) += cn9132-db.dtb
> dtb-$(CONFIG_ARCH_MVEBU) += cn9132-db-B.dtb
> dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-A.dtb
> dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-B.dtb
> +dtb-$(CONFIG_ARCH_MVEBU) += cn9130-db-comexpress.dtb
> +dtb-$(CONFIG_ARCH_MVEBU) += cn9131-db-comexpress.dtb
> dtb-$(CONFIG_ARCH_MVEBU) += ac5-98dx35xx-rd.dtb
> diff --git a/arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dts b/arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dts
> new file mode 100644
> index 000000000000..ed33076a34f5
> --- /dev/null
> +++ b/arch/arm64/boot/dts/marvell/cn9130-db-comexpress.dts
> @@ -0,0 +1,100 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (C) 2023 Marvell International Ltd.
> + *
> + * Device tree for the CN9130-DB Com Express board.
> + */
> +
> +#include "cn9130-db.dtsi"
> +
> +/ {
> + model = "Marvell Armada CN9130-DB COM EXPRESS type 7 board";
You need compatible property for each board (plus document it in some of
the bindings).
Best regards,
Krzysztof
> +&cp0_mdio {
> + status = "okay";
> + pinctrl-0 = <&cp0_ge_mdio_pins>;
> + phy0: ethernet-phy@0 {
> + marvell,reg-init = <3 16 0 0x1a4a>;
What does this do? I guess it is something to do with LEDs. Polarity?
> +&cp0_mdio {
> + status = "okay";
> + pinctrl-0 = <&cp0_ge_mdio_pins>;
> + phy0: ethernet-phy@0 {
> + marvell,reg-init = <3 16 0 0x1a4a>;
I'm temped to NACK this, and get you to work on the LED code in the
Marvell PHY driver and phylib to support what you need. This API is
horrible and should not be used any more.
Andrew
On Tue, Oct 24, 2023 at 04:19:35PM +0300, Elad Nachman wrote:
> Add support for CN9130 and CN9131 COM Express Type 7 CPU module boards
> by Marvell.
So these are modules, which plug into a carrier. Its a SOM.
Then this should be split into a DTSI file for all the things on the
SOM, and a DTS file for the carrier. You want somebody to take the SOM
and put it on their own custom carrier, which will have its on DTS
description but reuse the DTSI file.
Andrew