2024-01-23 12:23:35

by Rafał Miłecki

[permalink] [raw]
Subject: [PATCH] arm64: dts: marvell: reorder crypto interrupts on Armada SoCs

From: Rafał Miłecki <[email protected]>

Match order specified in binding documentation. It says "mem" should be
the last interrupt.

This fixes:
arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:0: 'ring0' was expected
from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:1: 'ring1' was expected
from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:2: 'ring2' was expected
from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:3: 'ring3' was expected
from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:4: 'eip' was expected
from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:5: 'mem' was expected
from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#

Signed-off-by: Rafał Miłecki <[email protected]>
---
arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 10 +++++-----
arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 10 +++++-----
2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index e300145ad1a6..1cc3fa1c354d 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -431,14 +431,14 @@ xor11 {
crypto: crypto@90000 {
compatible = "inside-secure,safexcel-eip97ies";
reg = <0x90000 0x20000>;
- interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "mem", "ring0", "ring1",
- "ring2", "ring3", "eip";
+ <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ring0", "ring1", "ring2",
+ "ring3", "eip", "mem";
clocks = <&nb_periph_clk 15>;
};

diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
index 4ec1aae0a3a9..7e595ac80043 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
@@ -511,14 +511,14 @@ CP11X_LABEL(sdhci0): mmc@780000 {
CP11X_LABEL(crypto): crypto@800000 {
compatible = "inside-secure,safexcel-eip197b";
reg = <0x800000 0x200000>;
- interrupts = <87 IRQ_TYPE_LEVEL_HIGH>,
- <88 IRQ_TYPE_LEVEL_HIGH>,
+ interrupts = <88 IRQ_TYPE_LEVEL_HIGH>,
<89 IRQ_TYPE_LEVEL_HIGH>,
<90 IRQ_TYPE_LEVEL_HIGH>,
<91 IRQ_TYPE_LEVEL_HIGH>,
- <92 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "mem", "ring0", "ring1",
- "ring2", "ring3", "eip";
+ <92 IRQ_TYPE_LEVEL_HIGH>,
+ <87 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ring0", "ring1", "ring2", "ring3",
+ "eip", "mem";
clock-names = "core", "reg";
clocks = <&CP11X_LABEL(clk) 1 26>,
<&CP11X_LABEL(clk) 1 17>;
--
2.35.3



2024-02-27 16:41:20

by Gregory CLEMENT

[permalink] [raw]
Subject: Re: [PATCH] arm64: dts: marvell: reorder crypto interrupts on Armada SoCs

Hi Rafał Miłecki,

> From: Rafał Miłecki <[email protected]>
>
> Match order specified in binding documentation. It says "mem" should be
> the last interrupt.
>
> This fixes:
> arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:0: 'ring0' was expected
> from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
> arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:1: 'ring1' was expected
> from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
> arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:2: 'ring2' was expected
> from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
> arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:3: 'ring3' was expected
> from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
> arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:4: 'eip' was expected
> from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
> arch/arm64/boot/dts/marvell/armada-3720-db.dtb: crypto@90000: interrupt-names:5: 'mem' was expected
> from schema $id: http://devicetree.org/schemas/crypto/inside-secure,safexcel.yaml#
>
> Signed-off-by: Rafał Miłecki <[email protected]>

Applied on mvebu/dt64

Thanks,

Gregory

> ---
> arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 10 +++++-----
> arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 10 +++++-----
> 2 files changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> index e300145ad1a6..1cc3fa1c354d 100644
> --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> @@ -431,14 +431,14 @@ xor11 {
> crypto: crypto@90000 {
> compatible = "inside-secure,safexcel-eip97ies";
> reg = <0x90000 0x20000>;
> - interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
> + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
> <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "mem", "ring0", "ring1",
> - "ring2", "ring3", "eip";
> + <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "ring0", "ring1", "ring2",
> + "ring3", "eip", "mem";
> clocks = <&nb_periph_clk 15>;
> };
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
> index 4ec1aae0a3a9..7e595ac80043 100644
> --- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
> @@ -511,14 +511,14 @@ CP11X_LABEL(sdhci0): mmc@780000 {
> CP11X_LABEL(crypto): crypto@800000 {
> compatible = "inside-secure,safexcel-eip197b";
> reg = <0x800000 0x200000>;
> - interrupts = <87 IRQ_TYPE_LEVEL_HIGH>,
> - <88 IRQ_TYPE_LEVEL_HIGH>,
> + interrupts = <88 IRQ_TYPE_LEVEL_HIGH>,
> <89 IRQ_TYPE_LEVEL_HIGH>,
> <90 IRQ_TYPE_LEVEL_HIGH>,
> <91 IRQ_TYPE_LEVEL_HIGH>,
> - <92 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "mem", "ring0", "ring1",
> - "ring2", "ring3", "eip";
> + <92 IRQ_TYPE_LEVEL_HIGH>,
> + <87 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "ring0", "ring1", "ring2", "ring3",
> + "eip", "mem";
> clock-names = "core", "reg";
> clocks = <&CP11X_LABEL(clk) 1 26>,
> <&CP11X_LABEL(clk) 1 17>;
> --
> 2.35.3
>

--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com