Add the S4 PLL clock controller dt-bindings in the s4 SoC family.
Signed-off-by: Yu Tu <[email protected]>
---
.../bindings/clock/amlogic,s4-pll-clkc.yaml | 50 +++++++++++++++++++
MAINTAINERS | 1 +
.../dt-bindings/clock/amlogic,s4-pll-clkc.h | 30 +++++++++++
3 files changed, 81 insertions(+)
create mode 100644 Documentation/devicetree/bindings/clock/amlogic,s4-pll-clkc.yaml
create mode 100644 include/dt-bindings/clock/amlogic,s4-pll-clkc.h
diff --git a/Documentation/devicetree/bindings/clock/amlogic,s4-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,s4-pll-clkc.yaml
new file mode 100644
index 000000000000..242cceb5033a
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/amlogic,s4-pll-clkc.yaml
@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/amlogic,s4-pll-clkc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic S serials PLL Clock Controller
+
+maintainers:
+ - Neil Armstrong <[email protected]>
+ - Jerome Brunet <[email protected]>
+ - Yu Tu <[email protected]>
+
+properties:
+ compatible:
+ const: amlogic,s4-pll-clkc
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: xtal
+
+ "#clock-cells":
+ const: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - "#clock-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ clkc_pll: clock-controller@fe008000 {
+ compatible = "amlogic,s4-pll-clkc";
+ reg = <0xfe008000 0x1e8>;
+ clocks = <&xtal>;
+ clock-names = "xtal";
+ #clock-cells = <1>;
+ };
+
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index 7e0b87d5aa2e..09422aa49f61 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1888,6 +1888,7 @@ L: [email protected]
S: Maintained
F: Documentation/devicetree/bindings/clock/amlogic*
F: drivers/clk/meson/
+F: include/dt-bindings/clock/amlogic*
F: include/dt-bindings/clock/gxbb*
F: include/dt-bindings/clock/meson*
diff --git a/include/dt-bindings/clock/amlogic,s4-pll-clkc.h b/include/dt-bindings/clock/amlogic,s4-pll-clkc.h
new file mode 100644
index 000000000000..1dcdedb1a6dd
--- /dev/null
+++ b/include/dt-bindings/clock/amlogic,s4-pll-clkc.h
@@ -0,0 +1,30 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/*
+ * Copyright (c) 2021 Amlogic, Inc. All rights reserved.
+ * Author: Yu Tu <[email protected]>
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_AMLOGIC_S4_PLL_CLKC_H
+#define _DT_BINDINGS_CLOCK_AMLOGIC_S4_PLL_CLKC_H
+
+/*
+ * CLKID index values
+ */
+
+#define CLKID_FIXED_PLL 1
+#define CLKID_FCLK_DIV2 3
+#define CLKID_FCLK_DIV3 5
+#define CLKID_FCLK_DIV4 7
+#define CLKID_FCLK_DIV5 9
+#define CLKID_FCLK_DIV7 11
+#define CLKID_FCLK_DIV2P5 13
+#define CLKID_GP0_PLL 15
+#define CLKID_HIFI_PLL 17
+#define CLKID_HDMI_PLL 20
+#define CLKID_MPLL_50M 22
+#define CLKID_MPLL0 25
+#define CLKID_MPLL1 27
+#define CLKID_MPLL2 29
+#define CLKID_MPLL3 31
+
+#endif /* _DT_BINDINGS_CLOCK_AMLOGIC_S4_PLL_CLKC_H */
--
2.33.1
On 15/05/2023 05:15, Yu Tu wrote:
> Add the S4 PLL clock controller dt-bindings in the s4 SoC family.
>
> Signed-off-by: Yu Tu <[email protected]>
This is a friendly reminder during the review process.
It looks like you received a tag and forgot to add it.
If you do not know the process, here is a short explanation:
Please add Acked-by/Reviewed-by/Tested-by tags when posting new
versions. However, there's no need to repost patches *only* to add the
tags. The upstream maintainer will do that for acks received on the
version they apply.
https://elixir.bootlin.com/linux/v5.17/source/Documentation/process/submitting-patches.rst#L540
If a tag was not added on purpose, please state why and what changed.
Best regards,
Krzysztof
Hi Krzysztof,
Thank you for your prompt reply.
On 2023/5/15 14:32, Krzysztof Kozlowski wrote:
> On 15/05/2023 05:15, Yu Tu wrote:
>> Add the S4 PLL clock controller dt-bindings in the s4 SoC family.
>>
>> Signed-off-by: Yu Tu <[email protected]>
>
> This is a friendly reminder during the review process.
>
> It looks like you received a tag and forgot to add it.
>
> If you do not know the process, here is a short explanation:
> Please add Acked-by/Reviewed-by/Tested-by tags when posting new
> versions. However, there's no need to repost patches *only* to add the
> tags. The upstream maintainer will do that for acks received on the
> version they apply.
>
> https://elixir.bootlin.com/linux/v5.17/source/Documentation/process/submitting-patches.rst#L540
>
> If a tag was not added on purpose, please state why and what changed.
Yes. I don't know the process. So I need to add Reviewed-by: Rob Herring
<[email protected]>. And resend V8?
>
> Best regards,
> Krzysztof
>
On 2023/5/15 15:35, Yu Tu wrote:
> Hi Krzysztof,
> Thank you for your prompt reply.
>
> On 2023/5/15 14:32, Krzysztof Kozlowski wrote:
>> On 15/05/2023 05:15, Yu Tu wrote:
>>> Add the S4 PLL clock controller dt-bindings in the s4 SoC family.
>>>
>>> Signed-off-by: Yu Tu <[email protected]>
>>
>> This is a friendly reminder during the review process.
>>
>> It looks like you received a tag and forgot to add it.
>>
>> If you do not know the process, here is a short explanation:
>> Please add Acked-by/Reviewed-by/Tested-by tags when posting new
>> versions. However, there's no need to repost patches *only* to add the
>> tags. The upstream maintainer will do that for acks received on the
>> version they apply.
>>
>> https://elixir.bootlin.com/linux/v5.17/source/Documentation/process/submitting-patches.rst#L540
>>
>> If a tag was not added on purpose, please state why and what changed.
>
> Yes. I don't know the process. So I need to add Reviewed-by: Rob Herring
> <[email protected]>. And resend V8?
>
I would like to ask you again by the way. I'm not sure if I can just add
the TAG. Because I actually changed the V8.
https://lore.kernel.org/all/[email protected]/
>>
>> Best regards,
>> Krzysztof
>>
On 15/05/2023 09:57, Yu Tu wrote:
>
>
> On 2023/5/15 15:35, Yu Tu wrote:
>> Hi Krzysztof,
>> Thank you for your prompt reply.
>>
>> On 2023/5/15 14:32, Krzysztof Kozlowski wrote:
>>> On 15/05/2023 05:15, Yu Tu wrote:
>>>> Add the S4 PLL clock controller dt-bindings in the s4 SoC family.
>>>>
>>>> Signed-off-by: Yu Tu <[email protected]>
>>>
>>> This is a friendly reminder during the review process.
>>>
>>> It looks like you received a tag and forgot to add it.
>>>
>>> If you do not know the process, here is a short explanation:
>>> Please add Acked-by/Reviewed-by/Tested-by tags when posting new
>>> versions. However, there's no need to repost patches *only* to add the
>>> tags. The upstream maintainer will do that for acks received on the
>>> version they apply.
>>>
>>> https://elixir.bootlin.com/linux/v5.17/source/Documentation/process/submitting-patches.rst#L540
>>>
>>> If a tag was not added on purpose, please state why and what changed.
>>
>> Yes. I don't know the process. So I need to add Reviewed-by: Rob Herring
>> <[email protected]>. And resend V8?
>>
>
> I would like to ask you again by the way. I'm not sure if I can just add
> the TAG. Because I actually changed the V8.
Your changelog in cover letter does not describe it. It only mentions
vaguely "change patch series". Describe exactly what changed.
Best regards,
Krzysztof
On 2023/5/15 18:06, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
>
> On 15/05/2023 09:57, Yu Tu wrote:
>>
>>
>> On 2023/5/15 15:35, Yu Tu wrote:
>>> Hi Krzysztof,
>>> Thank you for your prompt reply.
>>>
>>> On 2023/5/15 14:32, Krzysztof Kozlowski wrote:
>>>> On 15/05/2023 05:15, Yu Tu wrote:
>>>>> Add the S4 PLL clock controller dt-bindings in the s4 SoC family.
>>>>>
>>>>> Signed-off-by: Yu Tu <[email protected]>
>>>>
>>>> This is a friendly reminder during the review process.
>>>>
>>>> It looks like you received a tag and forgot to add it.
>>>>
>>>> If you do not know the process, here is a short explanation:
>>>> Please add Acked-by/Reviewed-by/Tested-by tags when posting new
>>>> versions. However, there's no need to repost patches *only* to add the
>>>> tags. The upstream maintainer will do that for acks received on the
>>>> version they apply.
>>>>
>>>> https://elixir.bootlin.com/linux/v5.17/source/Documentation/process/submitting-patches.rst#L540
>>>>
>>>> If a tag was not added on purpose, please state why and what changed.
>>>
>>> Yes. I don't know the process. So I need to add Reviewed-by: Rob Herring
>>> <[email protected]>. And resend V8?
>>>
>>
>> I would like to ask you again by the way. I'm not sure if I can just add
>> the TAG. Because I actually changed the V8.
>
> Your changelog in cover letter does not describe it. It only mentions
> vaguely "change patch series". Describe exactly what changed.
Okay. I will correct and resend this patch.
>
> Best regards,
> Krzysztof
>
On 15/05/2023 09:35, Yu Tu wrote:
> Hi Krzysztof,
> Thank you for your prompt reply.
>
> On 2023/5/15 14:32, Krzysztof Kozlowski wrote:
>> On 15/05/2023 05:15, Yu Tu wrote:
>>> Add the S4 PLL clock controller dt-bindings in the s4 SoC family.
>>>
>>> Signed-off-by: Yu Tu <[email protected]>
>>
>> This is a friendly reminder during the review process.
>>
>> It looks like you received a tag and forgot to add it.
>>
>> If you do not know the process, here is a short explanation:
>> Please add Acked-by/Reviewed-by/Tested-by tags when posting new
>> versions. However, there's no need to repost patches *only* to add the
>> tags. The upstream maintainer will do that for acks received on the
>> version they apply.
>>
>> https://elixir.bootlin.com/linux/v5.17/source/Documentation/process/submitting-patches.rst#L540
>>
>> If a tag was not added on purpose, please state why and what changed.
>
> Yes. I don't know the process. So I need to add Reviewed-by: Rob Herring
> <[email protected]>. And resend V8?
Yes. I cannot add it top your emails.
Best regards,
Krzysztof