2022-05-25 20:04:24

by Ravi Bangoria

[permalink] [raw]
Subject: [PATCH 06/13] perf/x86/amd: Support PERF_SAMPLE_PHY_ADDR using IBS_DC_PHYSADDR

IBS_DC_PHYSADDR provides the physical data address for the tagged load/
store operation. Populate perf sample physical address using it.

Signed-off-by: Ravi Bangoria <[email protected]>
---
arch/x86/events/amd/ibs.c | 26 +++++++++++++++++++++++++-
1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
index b57736357e25..c719020c0e83 100644
--- a/arch/x86/events/amd/ibs.c
+++ b/arch/x86/events/amd/ibs.c
@@ -986,13 +986,35 @@ static void perf_ibs_get_data_addr(struct perf_event *event,
data->addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCLINAD)];
}

+static void perf_ibs_get_phy_addr(struct perf_event *event,
+ struct perf_ibs_data *ibs_data,
+ struct perf_sample_data *data)
+{
+ union perf_mem_data_src *data_src = &data->data_src;
+ u64 op_data3 = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSOPDATA3)];
+ u64 phy_addr_valid = op_data3 & IBS_DC_PHY_ADDR_VALID_MASK;
+
+ if (!(event->attr.sample_type & PERF_SAMPLE_DATA_SRC))
+ perf_ibs_get_mem_op(op_data3, data);
+
+ if ((data_src->mem_op != PERF_MEM_OP_LOAD &&
+ data_src->mem_op != PERF_MEM_OP_STORE) ||
+ !phy_addr_valid) {
+ data->phys_addr = 0x0;
+ return;
+ }
+
+ data->phys_addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCPHYSAD)];
+}
+
static int perf_ibs_get_offset_max(struct perf_ibs *perf_ibs, u64 sample_type,
int check_rip)
{
if (sample_type & PERF_SAMPLE_RAW ||
(perf_ibs == &perf_ibs_op &&
(sample_type & PERF_SAMPLE_DATA_SRC ||
- sample_type & PERF_SAMPLE_ADDR)))
+ sample_type & PERF_SAMPLE_ADDR ||
+ sample_type & PERF_SAMPLE_PHYS_ADDR)))
return perf_ibs->offset_max;
else if (check_rip)
return 3;
@@ -1106,6 +1128,8 @@ static int perf_ibs_handle_irq(struct perf_ibs *perf_ibs, struct pt_regs *iregs)
perf_ibs_get_data_src(event, &ibs_data, &data);
if (event->attr.sample_type & PERF_SAMPLE_ADDR)
perf_ibs_get_data_addr(event, &ibs_data, &data);
+ if (event->attr.sample_type & PERF_SAMPLE_PHYS_ADDR)
+ perf_ibs_get_phy_addr(event, &ibs_data, &data);
}

/*
--
2.31.1



2022-05-26 19:57:38

by Peter Zijlstra

[permalink] [raw]
Subject: Re: [PATCH 06/13] perf/x86/amd: Support PERF_SAMPLE_PHY_ADDR using IBS_DC_PHYSADDR

On Thu, May 26, 2022 at 04:29:22PM +0530, Ravi Bangoria wrote:
> On 26-May-22 3:26 PM, Peter Zijlstra wrote:
> > On Thu, May 26, 2022 at 02:16:28PM +0530, Ravi Bangoria wrote:
> >> On 25-May-22 4:51 PM, Peter Zijlstra wrote:
> >>> On Wed, May 25, 2022 at 03:09:31PM +0530, Ravi Bangoria wrote:
> >>>> IBS_DC_PHYSADDR provides the physical data address for the tagged load/
> >>>> store operation. Populate perf sample physical address using it.
> >>>>
> >>>> Signed-off-by: Ravi Bangoria <[email protected]>
> >>>> ---
> >>>> arch/x86/events/amd/ibs.c | 26 +++++++++++++++++++++++++-
> >>>> 1 file changed, 25 insertions(+), 1 deletion(-)
> >>>>
> >>>> diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
> >>>> index b57736357e25..c719020c0e83 100644
> >>>> --- a/arch/x86/events/amd/ibs.c
> >>>> +++ b/arch/x86/events/amd/ibs.c
> >>>> @@ -986,13 +986,35 @@ static void perf_ibs_get_data_addr(struct perf_event *event,
> >>>> data->addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCLINAD)];
> >>>> }
> >>>>
> >>>> +static void perf_ibs_get_phy_addr(struct perf_event *event,
> >>>> + struct perf_ibs_data *ibs_data,
> >>>> + struct perf_sample_data *data)
> >>>> +{
> >>>> + union perf_mem_data_src *data_src = &data->data_src;
> >>>> + u64 op_data3 = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSOPDATA3)];
> >>>> + u64 phy_addr_valid = op_data3 & IBS_DC_PHY_ADDR_VALID_MASK;
> >>>> +
> >>>> + if (!(event->attr.sample_type & PERF_SAMPLE_DATA_SRC))
> >>>> + perf_ibs_get_mem_op(op_data3, data);
> >>>> +
> >>>> + if ((data_src->mem_op != PERF_MEM_OP_LOAD &&
> >>>> + data_src->mem_op != PERF_MEM_OP_STORE) ||
> >>>> + !phy_addr_valid) {
> >>>> + data->phys_addr = 0x0;
> >>>> + return;
> >>>> + }
> >>>> +
> >>>> + data->phys_addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCPHYSAD)];
> >>>> +}
> >>>
> >>> perf_prepare_sample() will unconditionally overwrite data->phys_addr.
> >>> There is currently no facility to let the driver set this field.
> >>
> >> Thanks for pointing it Peter. Would you mind if I add:
> >
> > I think it's best if you extend/mimic the __PERF_SAMPLE_CALLCHAIN_EARLY
> > hack. It's more or less the same problem and then at least the solution
> > is consistent.
>
> I've one more identical optimization in my list. IBS_OP_DATA3[IbsDcPgSz]
> can provide PERF_SAMPLE_DATA_PAGE_SIZE. I hope consuming two more bits
> for internal purpose is okay.

Yeah, I suppose so.. we'll need to hunt for bits once we run out, but
that's how it is...

2022-05-26 20:55:08

by Peter Zijlstra

[permalink] [raw]
Subject: Re: [PATCH 06/13] perf/x86/amd: Support PERF_SAMPLE_PHY_ADDR using IBS_DC_PHYSADDR

On Thu, May 26, 2022 at 02:16:28PM +0530, Ravi Bangoria wrote:
> On 25-May-22 4:51 PM, Peter Zijlstra wrote:
> > On Wed, May 25, 2022 at 03:09:31PM +0530, Ravi Bangoria wrote:
> >> IBS_DC_PHYSADDR provides the physical data address for the tagged load/
> >> store operation. Populate perf sample physical address using it.
> >>
> >> Signed-off-by: Ravi Bangoria <[email protected]>
> >> ---
> >> arch/x86/events/amd/ibs.c | 26 +++++++++++++++++++++++++-
> >> 1 file changed, 25 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
> >> index b57736357e25..c719020c0e83 100644
> >> --- a/arch/x86/events/amd/ibs.c
> >> +++ b/arch/x86/events/amd/ibs.c
> >> @@ -986,13 +986,35 @@ static void perf_ibs_get_data_addr(struct perf_event *event,
> >> data->addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCLINAD)];
> >> }
> >>
> >> +static void perf_ibs_get_phy_addr(struct perf_event *event,
> >> + struct perf_ibs_data *ibs_data,
> >> + struct perf_sample_data *data)
> >> +{
> >> + union perf_mem_data_src *data_src = &data->data_src;
> >> + u64 op_data3 = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSOPDATA3)];
> >> + u64 phy_addr_valid = op_data3 & IBS_DC_PHY_ADDR_VALID_MASK;
> >> +
> >> + if (!(event->attr.sample_type & PERF_SAMPLE_DATA_SRC))
> >> + perf_ibs_get_mem_op(op_data3, data);
> >> +
> >> + if ((data_src->mem_op != PERF_MEM_OP_LOAD &&
> >> + data_src->mem_op != PERF_MEM_OP_STORE) ||
> >> + !phy_addr_valid) {
> >> + data->phys_addr = 0x0;
> >> + return;
> >> + }
> >> +
> >> + data->phys_addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCPHYSAD)];
> >> +}
> >
> > perf_prepare_sample() will unconditionally overwrite data->phys_addr.
> > There is currently no facility to let the driver set this field.
>
> Thanks for pointing it Peter. Would you mind if I add:

I think it's best if you extend/mimic the __PERF_SAMPLE_CALLCHAIN_EARLY
hack. It's more or less the same problem and then at least the solution
is consistent.


2022-05-26 20:56:13

by Ravi Bangoria

[permalink] [raw]
Subject: Re: [PATCH 06/13] perf/x86/amd: Support PERF_SAMPLE_PHY_ADDR using IBS_DC_PHYSADDR

On 26-May-22 3:26 PM, Peter Zijlstra wrote:
> On Thu, May 26, 2022 at 02:16:28PM +0530, Ravi Bangoria wrote:
>> On 25-May-22 4:51 PM, Peter Zijlstra wrote:
>>> On Wed, May 25, 2022 at 03:09:31PM +0530, Ravi Bangoria wrote:
>>>> IBS_DC_PHYSADDR provides the physical data address for the tagged load/
>>>> store operation. Populate perf sample physical address using it.
>>>>
>>>> Signed-off-by: Ravi Bangoria <[email protected]>
>>>> ---
>>>> arch/x86/events/amd/ibs.c | 26 +++++++++++++++++++++++++-
>>>> 1 file changed, 25 insertions(+), 1 deletion(-)
>>>>
>>>> diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c
>>>> index b57736357e25..c719020c0e83 100644
>>>> --- a/arch/x86/events/amd/ibs.c
>>>> +++ b/arch/x86/events/amd/ibs.c
>>>> @@ -986,13 +986,35 @@ static void perf_ibs_get_data_addr(struct perf_event *event,
>>>> data->addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCLINAD)];
>>>> }
>>>>
>>>> +static void perf_ibs_get_phy_addr(struct perf_event *event,
>>>> + struct perf_ibs_data *ibs_data,
>>>> + struct perf_sample_data *data)
>>>> +{
>>>> + union perf_mem_data_src *data_src = &data->data_src;
>>>> + u64 op_data3 = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSOPDATA3)];
>>>> + u64 phy_addr_valid = op_data3 & IBS_DC_PHY_ADDR_VALID_MASK;
>>>> +
>>>> + if (!(event->attr.sample_type & PERF_SAMPLE_DATA_SRC))
>>>> + perf_ibs_get_mem_op(op_data3, data);
>>>> +
>>>> + if ((data_src->mem_op != PERF_MEM_OP_LOAD &&
>>>> + data_src->mem_op != PERF_MEM_OP_STORE) ||
>>>> + !phy_addr_valid) {
>>>> + data->phys_addr = 0x0;
>>>> + return;
>>>> + }
>>>> +
>>>> + data->phys_addr = ibs_data->regs[ibs_op_msr_idx(MSR_AMD64_IBSDCPHYSAD)];
>>>> +}
>>>
>>> perf_prepare_sample() will unconditionally overwrite data->phys_addr.
>>> There is currently no facility to let the driver set this field.
>>
>> Thanks for pointing it Peter. Would you mind if I add:
>
> I think it's best if you extend/mimic the __PERF_SAMPLE_CALLCHAIN_EARLY
> hack. It's more or less the same problem and then at least the solution
> is consistent.

I've one more identical optimization in my list. IBS_OP_DATA3[IbsDcPgSz]
can provide PERF_SAMPLE_DATA_PAGE_SIZE. I hope consuming two more bits
for internal purpose is okay.

Thanks,
Ravi