Changes since v9:
-----------------
- v9 can be seen here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- Addressed review comments from Dmitry on v9, regarding register size
and pcs_misc offset handling. Also collected his R-Bs.
Changes since v8:
-----------------
- v8 can be seen here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- Added driver change for new bindings used for sm6115 / qcm2290
devices.
Changes since v7:
-----------------
- v7 can be seen here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- Addressed review comments from Dmitry and added "pipe clk".
Changes since v6:
-----------------
- v6 can be seen here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- Addressed review comments from Bjorn and Dmitry and dropped old bindings in this
version.
Changes since v5:
-----------------
- v5 can be seen here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- Addressed review comments from Dmitry and made [PATCH 1/2] compatible with his
'split away legacy USB+DP code' series:
<https://patchwork.kernel.org/project/linux-phy/cover/[email protected]>
Changes since v4:
-----------------
- v4 can be seen here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- Collected Krzysztof's Ack for [PATCH 1/2].
- Added more descriptive commit logs as per Dmitry's comments on v4.
Changes since v3:
-----------------
- v3 can be seen here: https://lore.kernel.org/linux-arm-msm/[email protected]/
- Fixed v4 as per the downstream driver code: https://android.googlesource.com/kernel/msm-extra/devicetree/+/refs/heads/android-msm-bramble-4.19-android11-qpr1/qcom/bengal-usb.dtsi#296
This patchset adds the support for USB SS qmp phy for Qualcomm SM6115
SoC. For the previous versions of this patch there were conversations
on irc as to whether this was a 'qcom,usb-ssphy-qmp-usb3-or-dp' or a
'qcom,usb-ssphy-qmp-dp-combo' as per downstream code and hardware
documentation.
But after a careful look at downstream dtsi (see [1]) it appears that
this indeed is a 'qcom,usb-ssphy-qmp-usb3-or-dp' phy and not a
'dp-combo' phy.
[1]. https://android.googlesource.com/kernel/msm-extra/devicetree/+/refs/heads/android-msm-bramble-4.19-android11-qpr1/qcom/bengal-usb.dtsi#296
Bhupesh Sharma (4):
dt-bindings: phy: qcom,qmp-usb: Drop legacy bindings and move to newer
one (SM6115 & QCM2290)
phy: qcom-qmp-usb: add support for updated qcm2290 / sm6115 binding
arm64: dts: qcom: sm6115: Add USB SS qmp phy node
arm64: dts: qcom: qrb4210-rb2: Enable USB node
.../phy/qcom,msm8996-qmp-usb3-phy.yaml | 27 ------------
.../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml | 44 ++++++++++++++++---
arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 24 ++++++++++
.../boot/dts/qcom/sm4250-oneplus-billie2.dts | 3 ++
arch/arm64/boot/dts/qcom/sm6115.dtsi | 29 +++++++++++-
.../boot/dts/qcom/sm6115p-lenovo-j606f.dts | 3 ++
drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 22 ++++++++++
7 files changed, 118 insertions(+), 34 deletions(-)
--
2.38.1
'qcom,msm8996-qmp-usb3-phy.yaml' defines bindings for several PHYs
which predate USB -> USB+DP migration. Since SM6115 and QCM2290
nodes for USB QMP phy are being added to dtsi files by followup patches,
move these bindings instead to the newer style
'qcom,sc8280xp-qmp-usb3-uni-phy.yaml' file.
Since no device trees use these bindings presently, so we have no ABI breakages
with this patch.
Signed-off-by: Bhupesh Sharma <[email protected]>
---
.../phy/qcom,msm8996-qmp-usb3-phy.yaml | 27 ------------
.../phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml | 44 ++++++++++++++++---
2 files changed, 39 insertions(+), 32 deletions(-)
diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml
index e81a38281f8c..4c96dab5b9e3 100644
--- a/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,msm8996-qmp-usb3-phy.yaml
@@ -23,14 +23,12 @@ properties:
- qcom,ipq8074-qmp-usb3-phy
- qcom,msm8996-qmp-usb3-phy
- qcom,msm8998-qmp-usb3-phy
- - qcom,qcm2290-qmp-usb3-phy
- qcom,sc7180-qmp-usb3-phy
- qcom,sc8180x-qmp-usb3-phy
- qcom,sdm845-qmp-usb3-phy
- qcom,sdm845-qmp-usb3-uni-phy
- qcom,sdx55-qmp-usb3-uni-phy
- qcom,sdx65-qmp-usb3-uni-phy
- - qcom,sm6115-qmp-usb3-phy
- qcom,sm8150-qmp-usb3-phy
- qcom,sm8150-qmp-usb3-uni-phy
- qcom,sm8250-qmp-usb3-phy
@@ -248,29 +246,6 @@ allOf:
- const: phy
- const: common
- - if:
- properties:
- compatible:
- contains:
- enum:
- - qcom,qcm2290-qmp-usb3-phy
- - qcom,sm6115-qmp-usb3-phy
- then:
- properties:
- clocks:
- maxItems: 3
- clock-names:
- items:
- - const: cfg_ahb
- - const: ref
- - const: com_aux
- resets:
- maxItems: 2
- reset-names:
- items:
- - const: phy_phy
- - const: phy
-
- if:
properties:
compatible:
@@ -318,12 +293,10 @@ allOf:
enum:
- qcom,ipq6018-qmp-usb3-phy
- qcom,ipq8074-qmp-usb3-phy
- - qcom,qcm2290-qmp-usb3-phy
- qcom,sc7180-qmp-usb3-phy
- qcom,sc8180x-qmp-usb3-phy
- qcom,sdx55-qmp-usb3-uni-phy
- qcom,sdx65-qmp-usb3-uni-phy
- - qcom,sm6115-qmp-usb3-phy
- qcom,sm8150-qmp-usb3-uni-phy
- qcom,sm8250-qmp-usb3-phy
then:
diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
index 16fce1038285..05335e6bbb58 100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb3-uni-phy.yaml
@@ -16,7 +16,9 @@ description:
properties:
compatible:
enum:
+ - qcom,qcm2290-qmp-usb3-phy
- qcom,sc8280xp-qmp-usb3-uni-phy
+ - qcom,sm6115-qmp-usb3-phy
reg:
maxItems: 1
@@ -25,11 +27,7 @@ properties:
maxItems: 4
clock-names:
- items:
- - const: aux
- - const: ref
- - const: com_aux
- - const: pipe
+ maxItems: 4
power-domains:
maxItems: 1
@@ -71,6 +69,42 @@ required:
additionalProperties: false
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,qcm2290-qmp-usb3-phy
+ - qcom,sm6115-qmp-usb3-phy
+ then:
+ properties:
+ clocks:
+ maxItems: 4
+ clock-names:
+ items:
+ - const: cfg_ahb
+ - const: ref
+ - const: com_aux
+ - const: pipe
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sc8280xp-qmp-usb3-uni-phy
+ then:
+ properties:
+ clocks:
+ maxItems: 4
+ clock-names:
+ items:
+ - const: aux
+ - const: ref
+ - const: com_aux
+ - const: pipe
+
examples:
- |
#include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
--
2.38.1
Add support for the new qcm2290 / sm6115 binding.
The USB QMP phy on these devices supports 2 lanes. Note that the
binding now does not describe every register subregion and instead
the driver holds the corresponding offsets.
While at it also include support for PCS_MISC region which was left
out earlier.
Signed-off-by: Bhupesh Sharma <[email protected]>
---
drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
index a49711c5a63d..ae4710f08bfb 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c
@@ -1411,9 +1411,13 @@ static const struct qmp_phy_init_tbl sc8280xp_usb3_uniphy_pcs_tbl[] = {
struct qmp_usb_offsets {
u16 serdes;
u16 pcs;
+ u16 pcs_misc;
u16 pcs_usb;
u16 tx;
u16 rx;
+ /* for PHYs with >= 2 lanes */
+ u16 tx2;
+ u16 rx2;
};
/* struct qmp_phy_cfg - per-PHY initialization config */
@@ -1558,6 +1562,16 @@ static const char * const qmp_phy_vreg_l[] = {
"vdda-phy", "vdda-pll",
};
+static const struct qmp_usb_offsets qmp_usb_offsets_v3 = {
+ .serdes = 0,
+ .pcs = 0xc00,
+ .pcs_misc = 0xa00,
+ .tx = 0x200,
+ .rx = 0x400,
+ .tx2 = 0x600,
+ .rx2 = 0x800,
+};
+
static const struct qmp_usb_offsets qmp_usb_offsets_v5 = {
.serdes = 0,
.pcs = 0x0200,
@@ -1922,6 +1936,8 @@ static const struct qmp_phy_cfg sm8350_usb3_uniphy_cfg = {
static const struct qmp_phy_cfg qcm2290_usb3phy_cfg = {
.lanes = 2,
+ .offsets = &qmp_usb_offsets_v3,
+
.serdes_tbl = qcm2290_usb3_serdes_tbl,
.serdes_tbl_num = ARRAY_SIZE(qcm2290_usb3_serdes_tbl),
.tx_tbl = qcm2290_usb3_tx_tbl,
@@ -2493,10 +2509,16 @@ static int qmp_usb_parse_dt(struct qmp_usb *qmp)
qmp->serdes = base + offs->serdes;
qmp->pcs = base + offs->pcs;
+ qmp->pcs_misc = base + offs->pcs_misc;
qmp->pcs_usb = base + offs->pcs_usb;
qmp->tx = base + offs->tx;
qmp->rx = base + offs->rx;
+ if (cfg->lanes >= 2) {
+ qmp->tx2 = base + offs->tx2;
+ qmp->rx2 = base + offs->rx2;
+ }
+
qmp->pipe_clk = devm_clk_get(dev, "pipe");
if (IS_ERR(qmp->pipe_clk)) {
return dev_err_probe(dev, PTR_ERR(qmp->pipe_clk),
--
2.38.1
Add USB superspeed qmp phy node to dtsi.
Make sure that the various board dts files (which include sm4250.dtsi file)
continue to work as intended.
Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
---
.../boot/dts/qcom/sm4250-oneplus-billie2.dts | 3 ++
arch/arm64/boot/dts/qcom/sm6115.dtsi | 29 +++++++++++++++++--
.../boot/dts/qcom/sm6115p-lenovo-j606f.dts | 3 ++
3 files changed, 33 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
index a1f0622db5a0..75951fd439df 100644
--- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
+++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
@@ -242,6 +242,9 @@ &usb {
&usb_dwc3 {
maximum-speed = "high-speed";
dr_mode = "peripheral";
+
+ phys = <&usb_hsphy>;
+ phy-names = "usb2-phy";
};
&usb_hsphy {
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 631ca327e064..f67863561f3f 100644
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -661,6 +661,31 @@ usb_hsphy: phy@1613000 {
status = "disabled";
};
+ usb_qmpphy: phy@1615000 {
+ compatible = "qcom,sm6115-qmp-usb3-phy";
+ reg = <0x0 0x01615000 0x0 0x1000>;
+
+ clocks = <&gcc GCC_AHB2PHY_USB_CLK>,
+ <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
+ <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
+ <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
+ clock-names = "cfg_ahb",
+ "ref",
+ "com_aux",
+ "pipe";
+
+ resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>,
+ <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>;
+ reset-names = "phy", "phy_phy";
+
+ #clock-cells = <0>;
+ clock-output-names = "usb3_phy_pipe_clk_src";
+
+ #phy-cells = <0>;
+
+ status = "disabled";
+ };
+
qfprom@1b40000 {
compatible = "qcom,sm6115-qfprom", "qcom,qfprom";
reg = <0x0 0x01b40000 0x0 0x7000>;
@@ -1111,8 +1136,8 @@ usb_dwc3: usb@4e00000 {
compatible = "snps,dwc3";
reg = <0x0 0x04e00000 0x0 0xcd00>;
interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
- phys = <&usb_hsphy>;
- phy-names = "usb2-phy";
+ phys = <&usb_hsphy>, <&usb_qmpphy>;
+ phy-names = "usb2-phy", "usb3-phy";
iommus = <&apps_smmu 0x120 0x0>;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
diff --git a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
index ea3340d31110..81fdcaf48926 100644
--- a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
+++ b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
@@ -306,6 +306,9 @@ &usb {
&usb_dwc3 {
maximum-speed = "high-speed";
dr_mode = "peripheral";
+
+ phys = <&usb_hsphy>;
+ phy-names = "usb2-phy";
};
&usb_hsphy {
--
2.38.1
Enable the USB controller and HS/SS PHYs on qrb4210-rb2 board.
Reviewed-by: Dmitry Baryshkov <[email protected]>
Signed-off-by: Bhupesh Sharma <[email protected]>
---
arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
index dc80f0bca767..eae3024ce003 100644
--- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
+++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
@@ -222,6 +222,30 @@ &uart4 {
status = "okay";
};
+&usb {
+ status = "okay";
+};
+
+&usb_dwc3 {
+ maximum-speed = "super-speed";
+ dr_mode = "peripheral";
+};
+
+&usb_hsphy {
+ vdd-supply = <&vreg_l4a_0p9>;
+ vdda-pll-supply = <&vreg_l12a_1p8>;
+ vdda-phy-dpdm-supply = <&vreg_l15a_3p128>;
+
+ status = "okay";
+};
+
+&usb_qmpphy {
+ vdda-phy-supply = <&vreg_l4a_0p9>;
+ vdda-pll-supply = <&vreg_l12a_1p8>;
+
+ status = "okay";
+};
+
&xo_board {
clock-frequency = <19200000>;
};
--
2.38.1
On Tue, 2 May 2023 at 08:35, Bhupesh Sharma <[email protected]> wrote:
>
> Add support for the new qcm2290 / sm6115 binding.
>
> The USB QMP phy on these devices supports 2 lanes. Note that the
> binding now does not describe every register subregion and instead
> the driver holds the corresponding offsets.
>
> While at it also include support for PCS_MISC region which was left
> out earlier.
>
> Signed-off-by: Bhupesh Sharma <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 22 ++++++++++++++++++++++
> 1 file changed, 22 insertions(+)
>
--
With best wishes
Dmitry
On 2.05.2023 07:35, Bhupesh Sharma wrote:
> Add USB superspeed qmp phy node to dtsi.
>
> Make sure that the various board dts files (which include sm4250.dtsi file)
> continue to work as intended.
>
> Reviewed-by: Dmitry Baryshkov <[email protected]>
> Signed-off-by: Bhupesh Sharma <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
> .../boot/dts/qcom/sm4250-oneplus-billie2.dts | 3 ++
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 29 +++++++++++++++++--
> .../boot/dts/qcom/sm6115p-lenovo-j606f.dts | 3 ++
> 3 files changed, 33 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> index a1f0622db5a0..75951fd439df 100644
> --- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> +++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> @@ -242,6 +242,9 @@ &usb {
> &usb_dwc3 {
> maximum-speed = "high-speed";
> dr_mode = "peripheral";
> +
> + phys = <&usb_hsphy>;
> + phy-names = "usb2-phy";
> };
>
> &usb_hsphy {
> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> index 631ca327e064..f67863561f3f 100644
> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> @@ -661,6 +661,31 @@ usb_hsphy: phy@1613000 {
> status = "disabled";
> };
>
> + usb_qmpphy: phy@1615000 {
> + compatible = "qcom,sm6115-qmp-usb3-phy";
> + reg = <0x0 0x01615000 0x0 0x1000>;
> +
> + clocks = <&gcc GCC_AHB2PHY_USB_CLK>,
> + <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
> + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
> + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> + clock-names = "cfg_ahb",
> + "ref",
> + "com_aux",
> + "pipe";
> +
> + resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>,
> + <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>;
> + reset-names = "phy", "phy_phy";
> +
> + #clock-cells = <0>;
> + clock-output-names = "usb3_phy_pipe_clk_src";
> +
> + #phy-cells = <0>;
> +
> + status = "disabled";
> + };
> +
> qfprom@1b40000 {
> compatible = "qcom,sm6115-qfprom", "qcom,qfprom";
> reg = <0x0 0x01b40000 0x0 0x7000>;
> @@ -1111,8 +1136,8 @@ usb_dwc3: usb@4e00000 {
> compatible = "snps,dwc3";
> reg = <0x0 0x04e00000 0x0 0xcd00>;
> interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
> - phys = <&usb_hsphy>;
> - phy-names = "usb2-phy";
> + phys = <&usb_hsphy>, <&usb_qmpphy>;
> + phy-names = "usb2-phy", "usb3-phy";
> iommus = <&apps_smmu 0x120 0x0>;
> snps,dis_u2_susphy_quirk;
> snps,dis_enblslpm_quirk;
> diff --git a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
> index ea3340d31110..81fdcaf48926 100644
> --- a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
> +++ b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
> @@ -306,6 +306,9 @@ &usb {
> &usb_dwc3 {
> maximum-speed = "high-speed";
> dr_mode = "peripheral";
> +
> + phys = <&usb_hsphy>;
> + phy-names = "usb2-phy";
> };
>
> &usb_hsphy {
On 2.05.2023 07:35, Bhupesh Sharma wrote:
> Enable the USB controller and HS/SS PHYs on qrb4210-rb2 board.
>
> Reviewed-by: Dmitry Baryshkov <[email protected]>
> Signed-off-by: Bhupesh Sharma <[email protected]>
> ---
Reviewed-by: Konrad Dybcio <[email protected]>
Konrad
> arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
> index dc80f0bca767..eae3024ce003 100644
> --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
> +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
> @@ -222,6 +222,30 @@ &uart4 {
> status = "okay";
> };
>
> +&usb {
> + status = "okay";
> +};
> +
> +&usb_dwc3 {
> + maximum-speed = "super-speed";
> + dr_mode = "peripheral";
> +};
> +
> +&usb_hsphy {
> + vdd-supply = <&vreg_l4a_0p9>;
> + vdda-pll-supply = <&vreg_l12a_1p8>;
> + vdda-phy-dpdm-supply = <&vreg_l15a_3p128>;
> +
> + status = "okay";
> +};
> +
> +&usb_qmpphy {
> + vdda-phy-supply = <&vreg_l4a_0p9>;
> + vdda-pll-supply = <&vreg_l12a_1p8>;
> +
> + status = "okay";
> +};
> +
> &xo_board {
> clock-frequency = <19200000>;
> };
On 5/2/23 06:35, Bhupesh Sharma wrote:
> Add USB superspeed qmp phy node to dtsi.
>
> Make sure that the various board dts files (which include sm4250.dtsi file)
> continue to work as intended.
>
> Reviewed-by: Dmitry Baryshkov <[email protected]>
> Signed-off-by: Bhupesh Sharma <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
> ---
> .../boot/dts/qcom/sm4250-oneplus-billie2.dts | 3 ++
> arch/arm64/boot/dts/qcom/sm6115.dtsi | 29 +++++++++++++++++--
> .../boot/dts/qcom/sm6115p-lenovo-j606f.dts | 3 ++
> 3 files changed, 33 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> index a1f0622db5a0..75951fd439df 100644
> --- a/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> +++ b/arch/arm64/boot/dts/qcom/sm4250-oneplus-billie2.dts
> @@ -242,6 +242,9 @@ &usb {
> &usb_dwc3 {
> maximum-speed = "high-speed";
> dr_mode = "peripheral";
> +
> + phys = <&usb_hsphy>;
> + phy-names = "usb2-phy";
> };
>
> &usb_hsphy {
> diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> index 631ca327e064..f67863561f3f 100644
> --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
> @@ -661,6 +661,31 @@ usb_hsphy: phy@1613000 {
> status = "disabled";
> };
>
> + usb_qmpphy: phy@1615000 {
> + compatible = "qcom,sm6115-qmp-usb3-phy";
> + reg = <0x0 0x01615000 0x0 0x1000>;
> +
> + clocks = <&gcc GCC_AHB2PHY_USB_CLK>,
> + <&gcc GCC_USB3_PRIM_CLKREF_CLK>,
> + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
> + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> + clock-names = "cfg_ahb",
> + "ref",
> + "com_aux",
> + "pipe";
> +
> + resets = <&gcc GCC_USB3_PHY_PRIM_SP0_BCR>,
> + <&gcc GCC_USB3PHY_PHY_PRIM_SP0_BCR>;
> + reset-names = "phy", "phy_phy";
> +
> + #clock-cells = <0>;
> + clock-output-names = "usb3_phy_pipe_clk_src";
> +
> + #phy-cells = <0>;
> +
> + status = "disabled";
> + };
> +
> qfprom@1b40000 {
> compatible = "qcom,sm6115-qfprom", "qcom,qfprom";
> reg = <0x0 0x01b40000 0x0 0x7000>;
> @@ -1111,8 +1136,8 @@ usb_dwc3: usb@4e00000 {
> compatible = "snps,dwc3";
> reg = <0x0 0x04e00000 0x0 0xcd00>;
> interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
> - phys = <&usb_hsphy>;
> - phy-names = "usb2-phy";
> + phys = <&usb_hsphy>, <&usb_qmpphy>;
> + phy-names = "usb2-phy", "usb3-phy";
> iommus = <&apps_smmu 0x120 0x0>;
> snps,dis_u2_susphy_quirk;
> snps,dis_enblslpm_quirk;
> diff --git a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
> index ea3340d31110..81fdcaf48926 100644
> --- a/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
> +++ b/arch/arm64/boot/dts/qcom/sm6115p-lenovo-j606f.dts
> @@ -306,6 +306,9 @@ &usb {
> &usb_dwc3 {
> maximum-speed = "high-speed";
> dr_mode = "peripheral";
> +
> + phys = <&usb_hsphy>;
> + phy-names = "usb2-phy";
> };
>
> &usb_hsphy {
--
--
Kind Regards,
Caleb (they/them)
On 5/2/23 06:35, Bhupesh Sharma wrote:
> Enable the USB controller and HS/SS PHYs on qrb4210-rb2 board.
>
> Reviewed-by: Dmitry Baryshkov <[email protected]>
> Signed-off-by: Bhupesh Sharma <[email protected]>
Reviewed-by: Caleb Connolly <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/qrb4210-rb2.dts | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
> index dc80f0bca767..eae3024ce003 100644
> --- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
> +++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
> @@ -222,6 +222,30 @@ &uart4 {
> status = "okay";
> };
>
> +&usb {
> + status = "okay";
> +};
> +
> +&usb_dwc3 {
> + maximum-speed = "super-speed";
> + dr_mode = "peripheral";
> +};
> +
> +&usb_hsphy {
> + vdd-supply = <&vreg_l4a_0p9>;
> + vdda-pll-supply = <&vreg_l12a_1p8>;
> + vdda-phy-dpdm-supply = <&vreg_l15a_3p128>;
> +
> + status = "okay";
> +};
> +
> +&usb_qmpphy {
> + vdda-phy-supply = <&vreg_l4a_0p9>;
> + vdda-pll-supply = <&vreg_l12a_1p8>;
> +
> + status = "okay";
> +};
> +
> &xo_board {
> clock-frequency = <19200000>;
> };
--
--
Kind Regards,
Caleb (they/them)
On 02/05/2023 07:35, Bhupesh Sharma wrote:
> 'qcom,msm8996-qmp-usb3-phy.yaml' defines bindings for several PHYs
> which predate USB -> USB+DP migration. Since SM6115 and QCM2290
> nodes for USB QMP phy are being added to dtsi files by followup patches,
> move these bindings instead to the newer style
> 'qcom,sc8280xp-qmp-usb3-uni-phy.yaml' file.
>
> clock-names:
> - items:
> - - const: aux
> - - const: ref
> - - const: com_aux
> - - const: pipe
> + maxItems: 4
>
> power-domains:
> maxItems: 1
> @@ -71,6 +69,42 @@ required:
>
> additionalProperties: false
>
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - qcom,qcm2290-qmp-usb3-phy
> + - qcom,sm6115-qmp-usb3-phy
> + then:
> + properties:
> + clocks:
> + maxItems: 4
> + clock-names:
> + items:
> + - const: cfg_ahb
> + - const: ref
> + - const: com_aux
> + - const: pipe
I am pretty sure I acked it and there were no changes here... but since
you did not include it, then lets keep the clock order the same as
sc8280xp. ABI is anyway affected, right?
Best regards,
Krzysztof
On Wed, 3 May 2023 at 21:55, Krzysztof Kozlowski
<[email protected]> wrote:
>
> On 02/05/2023 07:35, Bhupesh Sharma wrote:
> > 'qcom,msm8996-qmp-usb3-phy.yaml' defines bindings for several PHYs
> > which predate USB -> USB+DP migration. Since SM6115 and QCM2290
> > nodes for USB QMP phy are being added to dtsi files by followup patches,
> > move these bindings instead to the newer style
> > 'qcom,sc8280xp-qmp-usb3-uni-phy.yaml' file.
> >
>
>
> > clock-names:
> > - items:
> > - - const: aux
> > - - const: ref
> > - - const: com_aux
> > - - const: pipe
> > + maxItems: 4
> >
> > power-domains:
> > maxItems: 1
> > @@ -71,6 +69,42 @@ required:
> >
> > additionalProperties: false
> >
> > +allOf:
> > + - if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - qcom,qcm2290-qmp-usb3-phy
> > + - qcom,sm6115-qmp-usb3-phy
> > + then:
> > + properties:
> > + clocks:
> > + maxItems: 4
> > + clock-names:
> > + items:
> > + - const: cfg_ahb
> > + - const: ref
> > + - const: com_aux
> > + - const: pipe
>
> I am pretty sure I acked it and there were no changes here... but since
> you did not include it, then lets keep the clock order the same as
> sc8280xp. ABI is anyway affected, right?
Yes, I forgot to include your Ack in this version :(
Ok, I will fix the clock order in v11.
Thanks,
Bhupesh
Hi Krzysztof,
On 5/4/23 10:42 PM, Bhupesh Sharma wrote:
> On Wed, 3 May 2023 at 21:55, Krzysztof Kozlowski
> <[email protected]> wrote:
>>
>> On 02/05/2023 07:35, Bhupesh Sharma wrote:
>>> 'qcom,msm8996-qmp-usb3-phy.yaml' defines bindings for several PHYs
>>> which predate USB -> USB+DP migration. Since SM6115 and QCM2290
>>> nodes for USB QMP phy are being added to dtsi files by followup patches,
>>> move these bindings instead to the newer style
>>> 'qcom,sc8280xp-qmp-usb3-uni-phy.yaml' file.
>>>
>>
>>
>>> clock-names:
>>> - items:
>>> - - const: aux
>>> - - const: ref
>>> - - const: com_aux
>>> - - const: pipe
>>> + maxItems: 4
>>>
>>> power-domains:
>>> maxItems: 1
>>> @@ -71,6 +69,42 @@ required:
>>>
>>> additionalProperties: false
>>>
>>> +allOf:
>>> + - if:
>>> + properties:
>>> + compatible:
>>> + contains:
>>> + enum:
>>> + - qcom,qcm2290-qmp-usb3-phy
>>> + - qcom,sm6115-qmp-usb3-phy
>>> + then:
>>> + properties:
>>> + clocks:
>>> + maxItems: 4
>>> + clock-names:
>>> + items:
>>> + - const: cfg_ahb
>>> + - const: ref
>>> + - const: com_aux
>>> + - const: pipe
>>
>> I am pretty sure I acked it and there were no changes here... but since
>> you did not include it, then lets keep the clock order the same as
>> sc8280xp. ABI is anyway affected, right?
>
> Yes, I forgot to include your Ack in this version :(
> Ok, I will fix the clock order in v11.
I just noticed that the clock orders are actually the same as sc8280xp.
The only clock diff between sm6115 and sc8280xp is actually 'cfg_ahb'
clock used by sm6115 instead of 'aux' used by sc8280xp.
So, the clock order for sc8280xp is:
+ - const: aux
+ - const: ref
+ - const: com_aux
+ - const: pipe
whereas the same for sm6115 is:
+ - const: cfg_ahb
+ - const: ref
+ - const: com_aux
+ - const: pipe
Or, am I missing something? If not, may be I can include your Ack to
help get this applied :)
Thanks,
Bhupesh
On 02-05-23, 11:05, Bhupesh Sharma wrote:
>
> This patchset adds the support for USB SS qmp phy for Qualcomm SM6115
> SoC. For the previous versions of this patch there were conversations
> on irc as to whether this was a 'qcom,usb-ssphy-qmp-usb3-or-dp' or a
> 'qcom,usb-ssphy-qmp-dp-combo' as per downstream code and hardware
> documentation.
>
> But after a careful look at downstream dtsi (see [1]) it appears that
> this indeed is a 'qcom,usb-ssphy-qmp-usb3-or-dp' phy and not a
> 'dp-combo' phy.
Fails to apply for me, pls rebase
--
~Vinod
On Tue, 16 May 2023 at 19:53, Vinod Koul <[email protected]> wrote:
>
> On 02-05-23, 11:05, Bhupesh Sharma wrote:
>
> >
> > This patchset adds the support for USB SS qmp phy for Qualcomm SM6115
> > SoC. For the previous versions of this patch there were conversations
> > on irc as to whether this was a 'qcom,usb-ssphy-qmp-usb3-or-dp' or a
> > 'qcom,usb-ssphy-qmp-dp-combo' as per downstream code and hardware
> > documentation.
> >
> > But after a careful look at downstream dtsi (see [1]) it appears that
> > this indeed is a 'qcom,usb-ssphy-qmp-usb3-or-dp' phy and not a
> > 'dp-combo' phy.
>
> Fails to apply for me, pls rebase
Sent v11 which is rebased on phy/next (see [1]).
[1]. https://lore.kernel.org/linux-arm-msm/[email protected]/
Thanks,
Bhupesh