2020-08-25 16:29:41

by Prabhakar Mahadev Lad

Subject: [PATCH 2/4] ARM: dts: r8a7742-iwg21d-q7: Add SPI NOR support

Add support for the SPI NOR device which is connected to MSIOF0 interface
on the iWave RainboW-G21d-q7 board.

Signed-off-by: Lad Prabhakar <[email protected]>
Reviewed-by: Chris Paterson <[email protected]>
---
arch/arm/boot/dts/r8a7742-iwg21d-q7.dts | 31 +++++++++++++++++++++++++
1 file changed, 31 insertions(+)

diff --git a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
index 73300ab46ea6..e709a132f2f7 100644
--- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
+++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
@@ -220,6 +220,32 @@
status = "okay";
};

+&msiof0 {
+ pinctrl-0 = <&msiof0_pins>;
+ pinctrl-names = "default";
+ cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+
+ status = "okay";
+
+ flash1: flash@0 {
+ compatible = "sst,sst25vf016b", "jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ m25p,fast-read;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ label = "user";
+ reg = <0x00000000 0x00200000>;
+ };
+ };
+ };
+};
+
&pci0 {
pinctrl-0 = <&usb0_pins>;
pinctrl-names = "default";
@@ -266,6 +292,11 @@
function = "i2c2";
};

+ msiof0_pins: msiof0 {
+ groups = "msiof0_clk", "msiof0_tx", "msiof0_rx";
+ function = "msiof0";
+ };
+
scifa2_pins: scifa2 {
groups = "scifa2_data_c";
function = "scifa2";
--
2.17.1

2020-09-03 12:06:20

by Geert Uytterhoeven

Subject: Re: [PATCH 2/4] ARM: dts: r8a7742-iwg21d-q7: Add SPI NOR support

Hi Prabhakar,

On Tue, Aug 25, 2020 at 6:28 PM Lad Prabhakar
<[email protected]> wrote:
> Add support for the SPI NOR device which is connected to MSIOF0 interface
> on the iWave RainboW-G21d-q7 board.
>
> Signed-off-by: Lad Prabhakar <[email protected]>
> Reviewed-by: Chris Paterson <[email protected]>

> --- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
> +++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
> @@ -220,6 +220,32 @@
> status = "okay";
> };
>
> +&msiof0 {
> + pinctrl-0 = <&msiof0_pins>;
> + pinctrl-names = "default";
> + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
> +
> + status = "okay";
> +
> + flash1: flash@0 {
> + compatible = "sst,sst25vf016b", "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <50000000>;
> + m25p,fast-read;
> +
> + partitions {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + partition@0 {
> + label = "user";
> + reg = <0x00000000 0x00200000>;
> + };
> + };
> + };
> +};
> +
> &pci0 {
> pinctrl-0 = <&usb0_pins>;
> pinctrl-names = "default";
> @@ -266,6 +292,11 @@
> function = "i2c2";
> };
>
> + msiof0_pins: msiof0 {
> + groups = "msiof0_clk", "msiof0_tx", "msiof0_rx";

I think you're missing "msiof0_sync", connected to SPI_CS0#?

With that fixed:
Reviewed-by: Geert Uytterhoeven <[email protected]>

> + function = "msiof0";
> + };

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds

2020-09-04 17:25:40

by Lad, Prabhakar

Subject: Re: [PATCH 2/4] ARM: dts: r8a7742-iwg21d-q7: Add SPI NOR support

Hi Geert,

Thank you for the review.

On Thu, Sep 3, 2020 at 12:59 PM Geert Uytterhoeven <[email protected]> wrote:
>
> Hi Prabhakar,
>
> On Tue, Aug 25, 2020 at 6:28 PM Lad Prabhakar
> <[email protected]> wrote:
> > Add support for the SPI NOR device which is connected to MSIOF0 interface
> > on the iWave RainboW-G21d-q7 board.
> >
> > Signed-off-by: Lad Prabhakar <[email protected]>
> > Reviewed-by: Chris Paterson <[email protected]>
>
> > --- a/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
> > +++ b/arch/arm/boot/dts/r8a7742-iwg21d-q7.dts
> > @@ -220,6 +220,32 @@
> > status = "okay";
> > };
> >
> > +&msiof0 {
> > + pinctrl-0 = <&msiof0_pins>;
> > + pinctrl-names = "default";
> > + cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
> > +
> > + status = "okay";
> > +
> > + flash1: flash@0 {
> > + compatible = "sst,sst25vf016b", "jedec,spi-nor";
> > + reg = <0>;
> > + spi-max-frequency = <50000000>;
> > + m25p,fast-read;
> > +
> > + partitions {
> > + compatible = "fixed-partitions";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > + partition@0 {
> > + label = "user";
> > + reg = <0x00000000 0x00200000>;
> > + };
> > + };
> > + };
> > +};
> > +
> > &pci0 {
> > pinctrl-0 = <&usb0_pins>;
> > pinctrl-names = "default";
> > @@ -266,6 +292,11 @@
> > function = "i2c2";
> > };
> >
> > + msiof0_pins: msiof0 {
> > + groups = "msiof0_clk", "msiof0_tx", "msiof0_rx";
>
> I think you're missing "msiof0_sync", connected to SPI_CS0#?
>
Agreed will fix that and post a v2.

Cheers,
Prabhakar

> With that fixed:
> Reviewed-by: Geert Uytterhoeven <[email protected]>
>
> > + function = "msiof0";
> > + };
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds