Currently, the XBD599 panel has a pixel clock rate that results in a
vertical refresh rate of ~55.3 Hz. This causes a slight visual
stuttering, for example on the PinePhone.
To address this, I adjusted the pixel clock rate to 74844 kHz. Instead
of using this hard coded value, I inserted the formula. This approach is
already in use by:
panel-jdi-fhd-r63452.c
panel-samsung-s6e88a0-ams452ef01.c
panel-asus-z00t-tm5p5-n35596.c
panel-ebbg-ft8719.c
panel-visionox-vtdr6130.c
panel-sony-tulip-truly-nt35521.c
panel-sharp-ls060t1sx01.c
panel-samsung-sofef00.c
To have a consistent procedure within panel-sitronix-st7703.c, I also
used the formula for the JH057N panel's clock. The value for JH057N was
already correct, so this change is purely cosmetic.
I do realize that I submitted three separate patches for the ST7703
within just a few days ([1], [2]). Should I re-submit all three patches
as a single patch set? These are my first contributions to the Linux
kernel, therefore, I kindly ask for forgiveness regarding any breach of
etiquette.
Thanks,
Frank
[1] https://lore.kernel.org/all/[email protected]/
[2] https://lore.kernel.org/all/[email protected]/
Frank Oltmanns (1):
drm/panel: st7703: Fix vertical refresh rate of XBD599
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--
2.39.1
Fix the XBD599 panel's slight visual stutter by correcting the pixel
clock speed so that the panel's 60Hz vertical refresh rate is met.
Set the clock speed using the underlying formula instead of a magic
number. To have a consistent procedure for both panels, set the JH057N
panel's clock also as a formula.
---
drivers/gpu/drm/panel/panel-sitronix-st7703.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
index 6747ca237ced..cd7d631f7573 100644
--- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
+++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
@@ -139,7 +139,7 @@ static const struct drm_display_mode jh057n00900_mode = {
.vsync_start = 1440 + 20,
.vsync_end = 1440 + 20 + 4,
.vtotal = 1440 + 20 + 4 + 12,
- .clock = 75276,
+ .clock = (720 + 90 + 20 + 20) * (1440 + 20 + 4 + 12) * 60 / 1000,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
.width_mm = 65,
.height_mm = 130,
@@ -324,7 +324,7 @@ static const struct drm_display_mode xbd599_mode = {
.vsync_start = 1440 + 18,
.vsync_end = 1440 + 18 + 10,
.vtotal = 1440 + 18 + 10 + 17,
- .clock = 69000,
+ .clock = (720 + 40 + 40 + 40) * (1440 + 18 + 10 + 17) * 60 / 1000,
.flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
.width_mm = 68,
.height_mm = 136,
--
2.39.1
Hi,
On Sun, Feb 19, 2023 at 12:45:53PM +0100, Frank Oltmanns wrote:
> Fix the XBD599 panel's slight visual stutter by correcting the pixel
> clock speed so that the panel's 60Hz vertical refresh rate is met.
>
> Set the clock speed using the underlying formula instead of a magic
> number. To have a consistent procedure for both panels, set the JH057N
> panel's clock also as a formula.
> ---
> drivers/gpu/drm/panel/panel-sitronix-st7703.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> index 6747ca237ced..cd7d631f7573 100644
> --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> @@ -139,7 +139,7 @@ static const struct drm_display_mode jh057n00900_mode = {
> .vsync_start = 1440 + 20,
> .vsync_end = 1440 + 20 + 4,
> .vtotal = 1440 + 20 + 4 + 12,
> - .clock = 75276,
> + .clock = (720 + 90 + 20 + 20) * (1440 + 20 + 4 + 12) * 60 / 1000,
> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
> .width_mm = 65,
> .height_mm = 130,
> @@ -324,7 +324,7 @@ static const struct drm_display_mode xbd599_mode = {
> .vsync_start = 1440 + 18,
> .vsync_end = 1440 + 18 + 10,
> .vtotal = 1440 + 18 + 10 + 17,
> - .clock = 69000,
> + .clock = (720 + 40 + 40 + 40) * (1440 + 18 + 10 + 17) * 60 / 1000,
> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
> .width_mm = 68,
> .height_mm = 136,
Reviewed-by: Guido G?nther <[email protected]>
(I've seen your other patches but it will be some days until I can test
the jh057n00900 panel).
Cheers,
-- Guido
> --
> 2.39.1
>
On Sun, Feb 19, 2023 at 12:45:53PM +0100, Frank Oltmanns wrote:
> Fix the XBD599 panel's slight visual stutter by correcting the pixel
> clock speed so that the panel's 60Hz vertical refresh rate is met.
>
> Set the clock speed using the underlying formula instead of a magic
> number. To have a consistent procedure for both panels, set the JH057N
> panel's clock also as a formula.
>
> ---
> drivers/gpu/drm/panel/panel-sitronix-st7703.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> index 6747ca237ced..cd7d631f7573 100644
> --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> @@ -139,7 +139,7 @@ static const struct drm_display_mode jh057n00900_mode = {
> .vsync_start = 1440 + 20,
> .vsync_end = 1440 + 20 + 4,
> .vtotal = 1440 + 20 + 4 + 12,
> - .clock = 75276,
> + .clock = (720 + 90 + 20 + 20) * (1440 + 20 + 4 + 12) * 60 / 1000,
> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
> .width_mm = 65,
> .height_mm = 130,
> @@ -324,7 +324,7 @@ static const struct drm_display_mode xbd599_mode = {
> .vsync_start = 1440 + 18,
> .vsync_end = 1440 + 18 + 10,
> .vtotal = 1440 + 18 + 10 + 17,
> - .clock = 69000,
> + .clock = (720 + 40 + 40 + 40) * (1440 + 18 + 10 + 17) * 60 / 1000,
As for pinephone, A64 can't produce 74.844 MHz precisely, so this will not work.
Better fix is to alter the mode so that clock can be something the only SoC this
panel is used with can actually produce.
See eg. https://github.com/megous/linux/commit/dd070679d717e7f34af7558563698240a43981a6
which is tested to actually produce 60Hz by measuring the vsync events against
the CPU timer.
Your patch will not produce the intended effect.
kind regards,
o.
> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
> .width_mm = 68,
> .height_mm = 136,
> --
> 2.39.1
>
Hi Ondřej,
hi all,
Ondřej Jirman <[email protected]> writes:
> On Sun, Feb 19, 2023 at 12:45:53PM +0100, Frank Oltmanns wrote:
>> Fix the XBD599 panel’s slight visual stutter by correcting the pixel
>> clock speed so that the panel’s 60Hz vertical refresh rate is met.
>>
>> Set the clock speed using the underlying formula instead of a magic
>> number. To have a consistent procedure for both panels, set the JH057N
>> panel’s clock also as a formula.
>>
>> —
>> drivers/gpu/drm/panel/panel-sitronix-st7703.c | 4 ++–
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff –git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>> index 6747ca237ced..cd7d631f7573 100644
>> — a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>> @@ -139,7 +139,7 @@ static const struct drm_display_mode jh057n00900_mode = {
>> .vsync_start = 1440 + 20,
>> .vsync_end = 1440 + 20 + 4,
>> .vtotal = 1440 + 20 + 4 + 12,
>> - .clock = 75276,
>> + .clock = (720 + 90 + 20 + 20) * (1440 + 20 + 4 + 12) * 60 / 1000,
>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
>> .width_mm = 65,
>> .height_mm = 130,
>> @@ -324,7 +324,7 @@ static const struct drm_display_mode xbd599_mode = {
>> .vsync_start = 1440 + 18,
>> .vsync_end = 1440 + 18 + 10,
>> .vtotal = 1440 + 18 + 10 + 17,
>> - .clock = 69000,
>> + .clock = (720 + 40 + 40 + 40) * (1440 + 18 + 10 + 17) * 60 / 1000,
>
> As for pinephone, A64 can’t produce 74.844 MHz precisely, so this will not work.
>
> Better fix is to alter the mode so that clock can be something the only SoC this
> panel is used with can actually produce.
>
> See eg. <https://github.com/megous/linux/commit/dd070679d717e7f34af7558563698240a43981a6>
> which is tested to actually produce 60Hz by measuring the vsync events against
> the CPU timer.
>
> Your patch will not produce the intended effect.
>
> kind regards,
> o.
>
The TL;DR of my upcoming musings are: Thank you very much for your feedback! Any
recommendations for an informative read about the topic that you or anybody else
has, is greatly appreciated.
How did you measure the vsync events? Were you using vblank interrupts [1]?
I have to admit that I tested only visually and couldn’t spot a difference
between your patch and mine. I’ll need to put more thinking into this, and maybe
you or anyone reading this can help me with that.
My interpretation of the `struct drm_display_mode` documentation [2] was, that
these are logical dimensions/clocks that somewhere down the stack are converted
to their physical/hardware representation.
But now I’ve read the description of the struct’s “crtc_clock” member more
carefully. It says:
“Actual pixel or dot clock in the hardware. This differs from the
logical @clock when e.g. using interlacing, double-clocking, stereo
modes or other fancy stuff that changes the timings and signals
actually sent over the wire.”
So, can I say that if we don’t use “interlacing, double-clocking, stereo modes
or other fancy stuff” that `crtc_clock` will be equal to `clock` and therefore
we have to choose `clock` according to the SoC’s capabilities?
Also, I haven’t found a source about which values to use for the front and back
porch part of the panel and why can you just “arbitrarily” change those. My
assumption is, that those are just extra pixels we can add to make the
dimensions match the ratio of clock and vertical refresh rate. At least that
seems to be, what you did in your patch. But again, no source to back my
assumption about the range the porches can have.
I’ve put the following docs on my “to read and understand” list:
• Allwinner A64 User Manual (to learn more about the SoC’s TCON0 and what
clock’s the SoC can produce)
• drm-internals.rst
• “Rendering PinePhone’s display” [3], to learn why it produces 69 MHz.
• Your commit message for the PinePhone Pro panel [4] (found on your blog:
<https://xnux.eu/log/>)
Is there anything else I should add?
Thank you again and best regards,
Frank
[1] <https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/gpu/drm/drm_vblank.c>
[2] <https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/include/drm/drm_modes.h#n198>
[3] <https://lupyuen.github.io/articles/de>
[4] <https://github.com/megous/linux/commit/a173b114c9323c718530280b3a918d0925edaa6a>
>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
>> .width_mm = 68,
>> .height_mm = 136,
>> –
>> 2.39.1
>>
Hi Ondřej,
hi Guido,
On 2023-02-19 at 13:35:42 +0100, Ondřej Jirman <[email protected]> wrote:
> On Sun, Feb 19, 2023 at 12:45:53PM +0100, Frank Oltmanns wrote:
>> Fix the XBD599 panel’s slight visual stutter by correcting the pixel
>> clock speed so that the panel’s 60Hz vertical refresh rate is met.
>>
>> Set the clock speed using the underlying formula instead of a magic
>> number. To have a consistent procedure for both panels, set the JH057N
>> panel’s clock also as a formula.
>>
>> —
>> drivers/gpu/drm/panel/panel-sitronix-st7703.c | 4 ++–
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff –git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>> index 6747ca237ced..cd7d631f7573 100644
>> — a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
>> @@ -139,7 +139,7 @@ static const struct drm_display_mode jh057n00900_mode = {
>> .vsync_start = 1440 + 20,
>> .vsync_end = 1440 + 20 + 4,
>> .vtotal = 1440 + 20 + 4 + 12,
>> - .clock = 75276,
>> + .clock = (720 + 90 + 20 + 20) * (1440 + 20 + 4 + 12) * 60 / 1000,
>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
>> .width_mm = 65,
>> .height_mm = 130,
>> @@ -324,7 +324,7 @@ static const struct drm_display_mode xbd599_mode = {
>> .vsync_start = 1440 + 18,
>> .vsync_end = 1440 + 18 + 10,
>> .vtotal = 1440 + 18 + 10 + 17,
>> - .clock = 69000,
>> + .clock = (720 + 40 + 40 + 40) * (1440 + 18 + 10 + 17) * 60 / 1000,
>
> As for pinephone, A64 can’t produce 74.844 MHz precisely, so this will not work.
>
> Better fix is to alter the mode so that clock can be something the only SoC this
> panel is used with can actually produce.
>
> See eg. <https://github.com/megous/linux/commit/dd070679d717e7f34af7558563698240a43981a6>
> which is tested to actually produce 60Hz by measuring the vsync events against
> the CPU timer.
I did some testing using a 60fps video I produced using the following command:
ffmpeg -f lavfi -i testsrc=duration=10:size=80x50:rate=60 -vf “drawtext=text=%{n}:fontsize=36:r=60:x=(w-tw)/2: y=h-(1*lh):fontcolor=white:box=1:boxcolor=0x00000099” test_80x50.mp4
This 10-second video shows an increasing number on every frame, which makes it easy to spot dropped frames by recording the playback with a camera that can record more than 60fps (I used a 240fps camera).
When playing back that video with your current drm-6.2 branch I get a steady 60fps. But applying either your or my patch to mainline, only helps very little. Frames are being skipped more often than not in both cases.
Therefore, I need to investigate more and retract the patch for now.
The other two patches I sent earlier, however, are far more important for making the pinephone usable on mainline.
Best regards,
Frank
>
> Your patch will not produce the intended effect.
>
> kind regards,
> o.
>
>> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
>> .width_mm = 68,
>> .height_mm = 136,
>> –
>> 2.39.1
>>
On Sun, Feb 19, 2023 at 6:46 AM Frank Oltmanns <[email protected]> wrote:
>
> Fix the XBD599 panel's slight visual stutter by correcting the pixel
> clock speed so that the panel's 60Hz vertical refresh rate is met.
>
> Set the clock speed using the underlying formula instead of a magic
> number. To have a consistent procedure for both panels, set the JH057N
> panel's clock also as a formula.
> ---
Hi Frank,
Just wanted to let you know that this appears to be missing your Signed-off-by:.
Thanks,
-- Slade
> drivers/gpu/drm/panel/panel-sitronix-st7703.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> index 6747ca237ced..cd7d631f7573 100644
> --- a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> @@ -139,7 +139,7 @@ static const struct drm_display_mode jh057n00900_mode = {
> .vsync_start = 1440 + 20,
> .vsync_end = 1440 + 20 + 4,
> .vtotal = 1440 + 20 + 4 + 12,
> - .clock = 75276,
> + .clock = (720 + 90 + 20 + 20) * (1440 + 20 + 4 + 12) * 60 / 1000,
> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
> .width_mm = 65,
> .height_mm = 130,
> @@ -324,7 +324,7 @@ static const struct drm_display_mode xbd599_mode = {
> .vsync_start = 1440 + 18,
> .vsync_end = 1440 + 18 + 10,
> .vtotal = 1440 + 18 + 10 + 17,
> - .clock = 69000,
> + .clock = (720 + 40 + 40 + 40) * (1440 + 18 + 10 + 17) * 60 / 1000,
> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
> .width_mm = 68,
> .height_mm = 136,
> --
> 2.39.1
>
Hi,
On Sun, Feb 26, 2023 at 04:17:32PM +0100, Frank Oltmanns wrote:
> Hi Ondřej,
> hi Guido,
>
> On 2023-02-19 at 13:35:42 +0100, Ondřej Jirman <[email protected]> wrote:
>
> > On Sun, Feb 19, 2023 at 12:45:53PM +0100, Frank Oltmanns wrote:
> >> Fix the XBD599 panel’s slight visual stutter by correcting the pixel
> >> clock speed so that the panel’s 60Hz vertical refresh rate is met.
> >>
> >> Set the clock speed using the underlying formula instead of a magic
> >> number. To have a consistent procedure for both panels, set the JH057N
> >> panel’s clock also as a formula.
> >>
> >> —
> >> drivers/gpu/drm/panel/panel-sitronix-st7703.c | 4 ++–
> >> 1 file changed, 2 insertions(+), 2 deletions(-)
> >>
> >> diff –git a/drivers/gpu/drm/panel/panel-sitronix-st7703.c b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> >> index 6747ca237ced..cd7d631f7573 100644
> >> — a/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> >> +++ b/drivers/gpu/drm/panel/panel-sitronix-st7703.c
> >> @@ -139,7 +139,7 @@ static const struct drm_display_mode jh057n00900_mode = {
> >> .vsync_start = 1440 + 20,
> >> .vsync_end = 1440 + 20 + 4,
> >> .vtotal = 1440 + 20 + 4 + 12,
> >> - .clock = 75276,
> >> + .clock = (720 + 90 + 20 + 20) * (1440 + 20 + 4 + 12) * 60 / 1000,
> >> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
> >> .width_mm = 65,
> >> .height_mm = 130,
> >> @@ -324,7 +324,7 @@ static const struct drm_display_mode xbd599_mode = {
> >> .vsync_start = 1440 + 18,
> >> .vsync_end = 1440 + 18 + 10,
> >> .vtotal = 1440 + 18 + 10 + 17,
> >> - .clock = 69000,
> >> + .clock = (720 + 40 + 40 + 40) * (1440 + 18 + 10 + 17) * 60 / 1000,
> >
> > As for pinephone, A64 can’t produce 74.844 MHz precisely, so this will not work.
> >
> > Better fix is to alter the mode so that clock can be something the only SoC this
> > panel is used with can actually produce.
> >
> > See eg. <https://github.com/megous/linux/commit/dd070679d717e7f34af7558563698240a43981a6>
> > which is tested to actually produce 60Hz by measuring the vsync events against
> > the CPU timer.
>
> I did some testing using a 60fps video I produced using the following command:
> ffmpeg -f lavfi -i testsrc=duration=10:size=80x50:rate=60 -vf
> “drawtext=text=%{n}:fontsize=36:r=60:x=(w-tw)/2:
> y=h-(1*lh):fontcolor=white:box=1:boxcolor=0x00000099” test_80x50.mp4
>
> This 10-second video shows an increasing number on every frame, which makes it
> easy to spot dropped frames by recording the playback with a camera that can
> record more than 60fps (I used a 240fps camera).
>
> When playing back that video with your current drm-6.2 branch I get a steady
> 60fps. But applying either your or my patch to mainline, only helps very
> little. Frames are being skipped more often than not in both cases.
>
> Therefore, I need to investigate more and retract the patch for now.
>
> The other two patches I sent earlier, however, are far more important for
> making the pinephone usable on mainline.
Mainline sunxi DE2 DRM driver has a bug where it doesn't respect the requirement
to use the 50% higher clock for MIPI DSI output. So real refresh rate will be
2/3 the expected one, even if everything else is set correctly.
This is not documented in A64 datasheet, but it is documented in one of other
Allwinner SoC datasheets that reuse DE2 engine and MIPI DSI interface.
So, you need this first: https://github.com/megous/linux/commit/cc3ce397408b597f5cab2c987cd88cce3a8509d3
When this is fixed, it's possible to finetune the panel refresh rate/mode to
the actual clock. The values I have sent you the link to are tuned to
60.006 Hz Maybe you'll find some values that will produce 60Hz exactly,
but the above is the closest I was able to get to 60Hz.
kind regards,
o.
> Best regards,
> Frank
>
> >
> > Your patch will not produce the intended effect.
> >
> > kind regards,
> > o.
> >
> >> .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
> >> .width_mm = 68,
> >> .height_mm = 136,
> >> –
> >> 2.39.1
> >>