When decoding a 10bits bitstreams HEVC driver should only expose
10bits pixel formats.
To fulfill this requirement it is needed to call hantro_reset_raw_fmt()
when bit depth change and to correctly set match_depth in pixel formats
enumeration.
Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding")
Signed-off-by: Benjamin Gaignard <[email protected]>
---
version 2:
- Also remove struct hantro_ctx *ctx variable in hantro_try_ctrl()
.../media/platform/verisilicon/hantro_drv.c | 40 +++++++++++++++----
.../media/platform/verisilicon/hantro_v4l2.c | 2 +-
.../media/platform/verisilicon/hantro_v4l2.h | 1 +
.../media/platform/verisilicon/imx8m_vpu_hw.c | 2 +
4 files changed, 36 insertions(+), 9 deletions(-)
diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c
index 8cb4a68c9119..e824e87618db 100644
--- a/drivers/media/platform/verisilicon/hantro_drv.c
+++ b/drivers/media/platform/verisilicon/hantro_drv.c
@@ -251,11 +251,6 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
{
- struct hantro_ctx *ctx;
-
- ctx = container_of(ctrl->handler,
- struct hantro_ctx, ctrl_handler);
-
if (ctrl->id == V4L2_CID_STATELESS_H264_SPS) {
const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps;
@@ -274,8 +269,6 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2)
/* Only 8-bit and 10-bit are supported */
return -EINVAL;
-
- ctx->bit_depth = sps->bit_depth_luma_minus8 + 8;
} else if (ctrl->id == V4L2_CID_STATELESS_VP9_FRAME) {
const struct v4l2_ctrl_vp9_frame *dec_params = ctrl->p_new.p_vp9_frame;
@@ -286,6 +279,32 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
return 0;
}
+static int hantro_hevc_s_ctrl(struct v4l2_ctrl *ctrl)
+{
+ struct hantro_ctx *ctx;
+
+ ctx = container_of(ctrl->handler,
+ struct hantro_ctx, ctrl_handler);
+
+ vpu_debug(1, "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
+
+ switch (ctrl->id) {
+ case V4L2_CID_STATELESS_HEVC_SPS:
+ const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps;
+ int bit_depth = sps->bit_depth_luma_minus8 + 8;
+
+ if (ctx->bit_depth != bit_depth) {
+ ctx->bit_depth = bit_depth;
+ hantro_reset_raw_fmt(ctx);
+ }
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int hantro_jpeg_s_ctrl(struct v4l2_ctrl *ctrl)
{
struct hantro_ctx *ctx;
@@ -328,6 +347,11 @@ static const struct v4l2_ctrl_ops hantro_ctrl_ops = {
.try_ctrl = hantro_try_ctrl,
};
+static const struct v4l2_ctrl_ops hantro_hevc_ctrl_ops = {
+ .s_ctrl = hantro_hevc_s_ctrl,
+ .try_ctrl = hantro_try_ctrl,
+};
+
static const struct v4l2_ctrl_ops hantro_jpeg_ctrl_ops = {
.s_ctrl = hantro_jpeg_s_ctrl,
};
@@ -470,7 +494,7 @@ static const struct hantro_ctrl controls[] = {
.codec = HANTRO_HEVC_DECODER,
.cfg = {
.id = V4L2_CID_STATELESS_HEVC_SPS,
- .ops = &hantro_ctrl_ops,
+ .ops = &hantro_hevc_ctrl_ops,
},
}, {
.codec = HANTRO_HEVC_DECODER,
diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.c b/drivers/media/platform/verisilicon/hantro_v4l2.c
index 2c7a805289e7..0025e049dd26 100644
--- a/drivers/media/platform/verisilicon/hantro_v4l2.c
+++ b/drivers/media/platform/verisilicon/hantro_v4l2.c
@@ -398,7 +398,7 @@ hantro_reset_encoded_fmt(struct hantro_ctx *ctx)
hantro_set_fmt_out(ctx, fmt);
}
-static void
+void
hantro_reset_raw_fmt(struct hantro_ctx *ctx)
{
const struct hantro_fmt *raw_vpu_fmt;
diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.h b/drivers/media/platform/verisilicon/hantro_v4l2.h
index 64f6f57e9d7a..f642560aed93 100644
--- a/drivers/media/platform/verisilicon/hantro_v4l2.h
+++ b/drivers/media/platform/verisilicon/hantro_v4l2.h
@@ -21,6 +21,7 @@
extern const struct v4l2_ioctl_ops hantro_ioctl_ops;
extern const struct vb2_ops hantro_queue_ops;
+void hantro_reset_raw_fmt(struct hantro_ctx *ctx);
void hantro_reset_fmts(struct hantro_ctx *ctx);
int hantro_get_format_depth(u32 fourcc);
const struct hantro_fmt *
diff --git a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
index b390228fd3b4..f850d8bddef6 100644
--- a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
+++ b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
@@ -152,6 +152,7 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = {
{
.fourcc = V4L2_PIX_FMT_NV12,
.codec_mode = HANTRO_MODE_NONE,
+ .match_depth = true,
.postprocessed = true,
.frmsize = {
.min_width = FMT_MIN_WIDTH,
@@ -165,6 +166,7 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = {
{
.fourcc = V4L2_PIX_FMT_P010,
.codec_mode = HANTRO_MODE_NONE,
+ .match_depth = true,
.postprocessed = true,
.frmsize = {
.min_width = FMT_MIN_WIDTH,
--
2.34.1
Hi Benjamin,
On Fri, Jan 13, 2023 at 10:13 AM Benjamin Gaignard
<[email protected]> wrote:
>
> When decoding a 10bits bitstreams HEVC driver should only expose
> 10bits pixel formats.
> To fulfill this requirement it is needed to call hantro_reset_raw_fmt()
> when bit depth change and to correctly set match_depth in pixel formats
> enumeration.
>
> Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding")
>
> Signed-off-by: Benjamin Gaignard <[email protected]>
> ---
> version 2:
> - Also remove struct hantro_ctx *ctx variable in hantro_try_ctrl()
>
> .../media/platform/verisilicon/hantro_drv.c | 40 +++++++++++++++----
> .../media/platform/verisilicon/hantro_v4l2.c | 2 +-
> .../media/platform/verisilicon/hantro_v4l2.h | 1 +
> .../media/platform/verisilicon/imx8m_vpu_hw.c | 2 +
> 4 files changed, 36 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c
> index 8cb4a68c9119..e824e87618db 100644
> --- a/drivers/media/platform/verisilicon/hantro_drv.c
> +++ b/drivers/media/platform/verisilicon/hantro_drv.c
> @@ -251,11 +251,6 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
>
> static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
> {
> - struct hantro_ctx *ctx;
> -
> - ctx = container_of(ctrl->handler,
> - struct hantro_ctx, ctrl_handler);
> -
This change is unrelated to this commit.
> if (ctrl->id == V4L2_CID_STATELESS_H264_SPS) {
> const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps;
>
> @@ -274,8 +269,6 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
> if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2)
> /* Only 8-bit and 10-bit are supported */
> return -EINVAL;
> -
> - ctx->bit_depth = sps->bit_depth_luma_minus8 + 8;
> } else if (ctrl->id == V4L2_CID_STATELESS_VP9_FRAME) {
> const struct v4l2_ctrl_vp9_frame *dec_params = ctrl->p_new.p_vp9_frame;
>
> @@ -286,6 +279,32 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
> return 0;
> }
>
> +static int hantro_hevc_s_ctrl(struct v4l2_ctrl *ctrl)
> +{
> + struct hantro_ctx *ctx;
> +
> + ctx = container_of(ctrl->handler,
> + struct hantro_ctx, ctrl_handler);
> +
> + vpu_debug(1, "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
> +
> + switch (ctrl->id) {
> + case V4L2_CID_STATELESS_HEVC_SPS:
> + const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps;
> + int bit_depth = sps->bit_depth_luma_minus8 + 8;
> +
> + if (ctx->bit_depth != bit_depth) {
> + ctx->bit_depth = bit_depth;
> + hantro_reset_raw_fmt(ctx);
We need to propagate the EBUSY error from hantro_set_fmt_cap,
to hantro_reset_raw_fmt, so this operation can fail if the capture
queue has buffers allocated.
Keep in mind, we have to make sure the hantro_ctx state
remains unchanged when the operation fails.
The entire hantro_v4l2.c format negotiation is done without this
case in mind (controls can change the format enumeration),
so this new case needs some refactoring.
I also think we need v4l2-compliance tests for it.
Thanks!
Ezequiel
> + }
> + break;
> + default:
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> static int hantro_jpeg_s_ctrl(struct v4l2_ctrl *ctrl)
> {
> struct hantro_ctx *ctx;
> @@ -328,6 +347,11 @@ static const struct v4l2_ctrl_ops hantro_ctrl_ops = {
> .try_ctrl = hantro_try_ctrl,
> };
>
> +static const struct v4l2_ctrl_ops hantro_hevc_ctrl_ops = {
> + .s_ctrl = hantro_hevc_s_ctrl,
> + .try_ctrl = hantro_try_ctrl,
> +};
> +
> static const struct v4l2_ctrl_ops hantro_jpeg_ctrl_ops = {
> .s_ctrl = hantro_jpeg_s_ctrl,
> };
> @@ -470,7 +494,7 @@ static const struct hantro_ctrl controls[] = {
> .codec = HANTRO_HEVC_DECODER,
> .cfg = {
> .id = V4L2_CID_STATELESS_HEVC_SPS,
> - .ops = &hantro_ctrl_ops,
> + .ops = &hantro_hevc_ctrl_ops,
> },
> }, {
> .codec = HANTRO_HEVC_DECODER,
> diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.c b/drivers/media/platform/verisilicon/hantro_v4l2.c
> index 2c7a805289e7..0025e049dd26 100644
> --- a/drivers/media/platform/verisilicon/hantro_v4l2.c
> +++ b/drivers/media/platform/verisilicon/hantro_v4l2.c
> @@ -398,7 +398,7 @@ hantro_reset_encoded_fmt(struct hantro_ctx *ctx)
> hantro_set_fmt_out(ctx, fmt);
> }
>
> -static void
> +void
> hantro_reset_raw_fmt(struct hantro_ctx *ctx)
> {
> const struct hantro_fmt *raw_vpu_fmt;
> diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.h b/drivers/media/platform/verisilicon/hantro_v4l2.h
> index 64f6f57e9d7a..f642560aed93 100644
> --- a/drivers/media/platform/verisilicon/hantro_v4l2.h
> +++ b/drivers/media/platform/verisilicon/hantro_v4l2.h
> @@ -21,6 +21,7 @@
> extern const struct v4l2_ioctl_ops hantro_ioctl_ops;
> extern const struct vb2_ops hantro_queue_ops;
>
> +void hantro_reset_raw_fmt(struct hantro_ctx *ctx);
> void hantro_reset_fmts(struct hantro_ctx *ctx);
> int hantro_get_format_depth(u32 fourcc);
> const struct hantro_fmt *
> diff --git a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
> index b390228fd3b4..f850d8bddef6 100644
> --- a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
> +++ b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
> @@ -152,6 +152,7 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = {
> {
> .fourcc = V4L2_PIX_FMT_NV12,
> .codec_mode = HANTRO_MODE_NONE,
> + .match_depth = true,
> .postprocessed = true,
> .frmsize = {
> .min_width = FMT_MIN_WIDTH,
> @@ -165,6 +166,7 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = {
> {
> .fourcc = V4L2_PIX_FMT_P010,
> .codec_mode = HANTRO_MODE_NONE,
> + .match_depth = true,
> .postprocessed = true,
> .frmsize = {
> .min_width = FMT_MIN_WIDTH,
> --
> 2.34.1
>
Le 13/01/2023 à 15:12, Ezequiel Garcia a écrit :
> Hi Benjamin,
>
> On Fri, Jan 13, 2023 at 10:13 AM Benjamin Gaignard
> <[email protected]> wrote:
>> When decoding a 10bits bitstreams HEVC driver should only expose
>> 10bits pixel formats.
>> To fulfill this requirement it is needed to call hantro_reset_raw_fmt()
>> when bit depth change and to correctly set match_depth in pixel formats
>> enumeration.
>>
>> Fixes: dc39473d0340 ("media: hantro: imx8m: Enable 10bit decoding")
>>
>> Signed-off-by: Benjamin Gaignard <[email protected]>
>> ---
>> version 2:
>> - Also remove struct hantro_ctx *ctx variable in hantro_try_ctrl()
>>
>> .../media/platform/verisilicon/hantro_drv.c | 40 +++++++++++++++----
>> .../media/platform/verisilicon/hantro_v4l2.c | 2 +-
>> .../media/platform/verisilicon/hantro_v4l2.h | 1 +
>> .../media/platform/verisilicon/imx8m_vpu_hw.c | 2 +
>> 4 files changed, 36 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c
>> index 8cb4a68c9119..e824e87618db 100644
>> --- a/drivers/media/platform/verisilicon/hantro_drv.c
>> +++ b/drivers/media/platform/verisilicon/hantro_drv.c
>> @@ -251,11 +251,6 @@ queue_init(void *priv, struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
>>
>> static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
>> {
>> - struct hantro_ctx *ctx;
>> -
>> - ctx = container_of(ctrl->handler,
>> - struct hantro_ctx, ctrl_handler);
>> -
> This change is unrelated to this commit.
It is because ctx is no more used in this function.
>
>> if (ctrl->id == V4L2_CID_STATELESS_H264_SPS) {
>> const struct v4l2_ctrl_h264_sps *sps = ctrl->p_new.p_h264_sps;
>>
>> @@ -274,8 +269,6 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
>> if (sps->bit_depth_luma_minus8 != 0 && sps->bit_depth_luma_minus8 != 2)
>> /* Only 8-bit and 10-bit are supported */
>> return -EINVAL;
>> -
>> - ctx->bit_depth = sps->bit_depth_luma_minus8 + 8;
>> } else if (ctrl->id == V4L2_CID_STATELESS_VP9_FRAME) {
>> const struct v4l2_ctrl_vp9_frame *dec_params = ctrl->p_new.p_vp9_frame;
>>
>> @@ -286,6 +279,32 @@ static int hantro_try_ctrl(struct v4l2_ctrl *ctrl)
>> return 0;
>> }
>>
>> +static int hantro_hevc_s_ctrl(struct v4l2_ctrl *ctrl)
>> +{
>> + struct hantro_ctx *ctx;
>> +
>> + ctx = container_of(ctrl->handler,
>> + struct hantro_ctx, ctrl_handler);
>> +
>> + vpu_debug(1, "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
>> +
>> + switch (ctrl->id) {
>> + case V4L2_CID_STATELESS_HEVC_SPS:
>> + const struct v4l2_ctrl_hevc_sps *sps = ctrl->p_new.p_hevc_sps;
>> + int bit_depth = sps->bit_depth_luma_minus8 + 8;
>> +
>> + if (ctx->bit_depth != bit_depth) {
>> + ctx->bit_depth = bit_depth;
>> + hantro_reset_raw_fmt(ctx);
> We need to propagate the EBUSY error from hantro_set_fmt_cap,
> to hantro_reset_raw_fmt, so this operation can fail if the capture
> queue has buffers allocated.
>
> Keep in mind, we have to make sure the hantro_ctx state
> remains unchanged when the operation fails.
>
> The entire hantro_v4l2.c format negotiation is done without this
> case in mind (controls can change the format enumeration),
> so this new case needs some refactoring.
I will change hantro_reset_raw_fmt() prototype to:
int hantro_reset_raw_fmt(struct hantro_ctx *ctx);
so I will be able to return the result of hantro_set_fmt_out()
or hantro_set_fmt_cap() when setting the control.
Does that sound correct for you ?
Regards,
Benjamin
>
> I also think we need v4l2-compliance tests for it.
>
> Thanks!
> Ezequiel
>
>
>> + }
>> + break;
>> + default:
>> + return -EINVAL;
>> + }
>> +
>> + return 0;
>> +}
>> +
>> static int hantro_jpeg_s_ctrl(struct v4l2_ctrl *ctrl)
>> {
>> struct hantro_ctx *ctx;
>> @@ -328,6 +347,11 @@ static const struct v4l2_ctrl_ops hantro_ctrl_ops = {
>> .try_ctrl = hantro_try_ctrl,
>> };
>>
>> +static const struct v4l2_ctrl_ops hantro_hevc_ctrl_ops = {
>> + .s_ctrl = hantro_hevc_s_ctrl,
>> + .try_ctrl = hantro_try_ctrl,
>> +};
>> +
>> static const struct v4l2_ctrl_ops hantro_jpeg_ctrl_ops = {
>> .s_ctrl = hantro_jpeg_s_ctrl,
>> };
>> @@ -470,7 +494,7 @@ static const struct hantro_ctrl controls[] = {
>> .codec = HANTRO_HEVC_DECODER,
>> .cfg = {
>> .id = V4L2_CID_STATELESS_HEVC_SPS,
>> - .ops = &hantro_ctrl_ops,
>> + .ops = &hantro_hevc_ctrl_ops,
>> },
>> }, {
>> .codec = HANTRO_HEVC_DECODER,
>> diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.c b/drivers/media/platform/verisilicon/hantro_v4l2.c
>> index 2c7a805289e7..0025e049dd26 100644
>> --- a/drivers/media/platform/verisilicon/hantro_v4l2.c
>> +++ b/drivers/media/platform/verisilicon/hantro_v4l2.c
>> @@ -398,7 +398,7 @@ hantro_reset_encoded_fmt(struct hantro_ctx *ctx)
>> hantro_set_fmt_out(ctx, fmt);
>> }
>>
>> -static void
>> +void
>> hantro_reset_raw_fmt(struct hantro_ctx *ctx)
>> {
>> const struct hantro_fmt *raw_vpu_fmt;
>> diff --git a/drivers/media/platform/verisilicon/hantro_v4l2.h b/drivers/media/platform/verisilicon/hantro_v4l2.h
>> index 64f6f57e9d7a..f642560aed93 100644
>> --- a/drivers/media/platform/verisilicon/hantro_v4l2.h
>> +++ b/drivers/media/platform/verisilicon/hantro_v4l2.h
>> @@ -21,6 +21,7 @@
>> extern const struct v4l2_ioctl_ops hantro_ioctl_ops;
>> extern const struct vb2_ops hantro_queue_ops;
>>
>> +void hantro_reset_raw_fmt(struct hantro_ctx *ctx);
>> void hantro_reset_fmts(struct hantro_ctx *ctx);
>> int hantro_get_format_depth(u32 fourcc);
>> const struct hantro_fmt *
>> diff --git a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
>> index b390228fd3b4..f850d8bddef6 100644
>> --- a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
>> +++ b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c
>> @@ -152,6 +152,7 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = {
>> {
>> .fourcc = V4L2_PIX_FMT_NV12,
>> .codec_mode = HANTRO_MODE_NONE,
>> + .match_depth = true,
>> .postprocessed = true,
>> .frmsize = {
>> .min_width = FMT_MIN_WIDTH,
>> @@ -165,6 +166,7 @@ static const struct hantro_fmt imx8m_vpu_g2_postproc_fmts[] = {
>> {
>> .fourcc = V4L2_PIX_FMT_P010,
>> .codec_mode = HANTRO_MODE_NONE,
>> + .match_depth = true,
>> .postprocessed = true,
>> .frmsize = {
>> .min_width = FMT_MIN_WIDTH,
>> --
>> 2.34.1
>>