Changes:
add Author and add patch description
Rex-BC Chen (2):
drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid
drm/mediatek: mtk_dpi: Add dpi config for mt8192
drivers/gpu/drm/mediatek/mtk_dpi.c | 26 ++++++++++++++++++++++++++
1 file changed, 26 insertions(+)
--
2.18.0
Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.
Reviewed-by: Chun-Kuang Hu <[email protected]>
Signed-off-by: Pi-Hsun Shih <[email protected]>
Signed-off-by: Rex-BC Chen <[email protected]>
Signed-off-by: Jitao Shi <[email protected]>
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index b05f900d9322..e1945d4bd7c4 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -120,6 +120,7 @@ struct mtk_dpi_yc_limit {
struct mtk_dpi_conf {
unsigned int (*cal_factor)(int clock);
u32 reg_h_fre_con;
+ u32 max_clock_khz;
bool edge_sel_en;
};
@@ -557,9 +558,22 @@ static void mtk_dpi_bridge_enable(struct drm_bridge *bridge)
mtk_dpi_set_display_mode(dpi, &dpi->mode);
}
+static enum drm_mode_status
+mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
+ const struct drm_display_mode *mode)
+{
+ struct mtk_dpi *dpi = bridge_to_dpi(bridge);
+
+ if (dpi->conf->max_clock_khz && mode->clock > dpi->conf->max_clock_khz)
+ return MODE_CLOCK_HIGH;
+
+ return MODE_OK;
+}
+
static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
.attach = mtk_dpi_bridge_attach,
.mode_set = mtk_dpi_bridge_mode_set,
+ .mode_valid = mtk_dpi_bridge_mode_valid,
.disable = mtk_dpi_bridge_disable,
.enable = mtk_dpi_bridge_enable,
};
@@ -668,17 +682,20 @@ static unsigned int mt8183_calculate_factor(int clock)
static const struct mtk_dpi_conf mt8173_conf = {
.cal_factor = mt8173_calculate_factor,
.reg_h_fre_con = 0xe0,
+ .max_clock_khz = 300000,
};
static const struct mtk_dpi_conf mt2701_conf = {
.cal_factor = mt2701_calculate_factor,
.reg_h_fre_con = 0xb0,
.edge_sel_en = true,
+ .max_clock_khz = 150000,
};
static const struct mtk_dpi_conf mt8183_conf = {
.cal_factor = mt8183_calculate_factor,
.reg_h_fre_con = 0xe0,
+ .max_clock_khz = 100000,
};
static int mtk_dpi_probe(struct platform_device *pdev)
--
2.18.0
add mtk_dpi config setting and compatible for MT8192
Signed-off-by: Rex-BC Chen <[email protected]>
Signed-off-by: Jitao Shi <[email protected]>
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index e1945d4bd7c4..f3896e2d22ca 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -698,6 +698,12 @@ static const struct mtk_dpi_conf mt8183_conf = {
.max_clock_khz = 100000,
};
+static const struct mtk_dpi_conf mt8192_conf = {
+ .cal_factor = mt8183_calculate_factor,
+ .reg_h_fre_con = 0xe0,
+ .max_clock_khz = 150000,
+};
+
static int mtk_dpi_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -818,6 +824,9 @@ static const struct of_device_id mtk_dpi_of_ids[] = {
{ .compatible = "mediatek,mt8183-dpi",
.data = &mt8183_conf,
},
+ { .compatible = "mediatek,mt8192-dpi",
+ .data = &mt8192_conf,
+ },
{ },
};
--
2.18.0
Hi, Rex:
Rex-BC Chen <[email protected]> 於 2021年3月16日 週二 上午11:26寫道：
>
> Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid.
>
> Reviewed-by: Chun-Kuang Hu <[email protected]>
> Signed-off-by: Pi-Hsun Shih <[email protected]>
> Signed-off-by: Rex-BC Chen <[email protected]>
> Signed-off-by: Jitao Shi <[email protected]>
> ---
> drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index b05f900d9322..e1945d4bd7c4 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -120,6 +120,7 @@ struct mtk_dpi_yc_limit {
> struct mtk_dpi_conf {
> unsigned int (*cal_factor)(int clock);
> u32 reg_h_fre_con;
> + u32 max_clock_khz;
> bool edge_sel_en;
> };
>
> @@ -557,9 +558,22 @@ static void mtk_dpi_bridge_enable(struct drm_bridge *bridge)
> mtk_dpi_set_display_mode(dpi, &dpi->mode);
> }
>
> +static enum drm_mode_status
> +mtk_dpi_bridge_mode_valid(struct drm_bridge *bridge,
> + const struct drm_display_mode *mode)
> +{
> + struct mtk_dpi *dpi = bridge_to_dpi(bridge);
> +
> + if (dpi->conf->max_clock_khz && mode->clock > dpi->conf->max_clock_khz)
> + return MODE_CLOCK_HIGH;
> +
> + return MODE_OK;
> +}
> +
> static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
> .attach = mtk_dpi_bridge_attach,
> .mode_set = mtk_dpi_bridge_mode_set,
> + .mode_valid = mtk_dpi_bridge_mode_valid,
Build error:
../drivers/gpu/drm/mediatek/mtk_dpi.c:576:16: error: initialization
from incompatible pointer type [-Werror=incompatible-pointer-types]
.mode_valid = mtk_dpi_bridge_mode_valid,
^~~~~~~~~~~~~~~~~~~~~~~~~
Please remove my 'Reviewed-by' tag.
Regards,
Chun-Kuang.
> .disable = mtk_dpi_bridge_disable,
> .enable = mtk_dpi_bridge_enable,
> };
> @@ -668,17 +682,20 @@ static unsigned int mt8183_calculate_factor(int clock)
> static const struct mtk_dpi_conf mt8173_conf = {
> .cal_factor = mt8173_calculate_factor,
> .reg_h_fre_con = 0xe0,
> + .max_clock_khz = 300000,
> };
>
> static const struct mtk_dpi_conf mt2701_conf = {
> .cal_factor = mt2701_calculate_factor,
> .reg_h_fre_con = 0xb0,
> .edge_sel_en = true,
> + .max_clock_khz = 150000,
> };
>
> static const struct mtk_dpi_conf mt8183_conf = {
> .cal_factor = mt8183_calculate_factor,
> .reg_h_fre_con = 0xe0,
> + .max_clock_khz = 100000,
> };
>
> static int mtk_dpi_probe(struct platform_device *pdev)
> --
> 2.18.0
>