v4:
Use output_fmts to determine whether it is dual edge.
Rebase to v5.13-rc1
v3:
Modify clock rate for dual edge setting.
Add more bridge function.
v2:
Modify unused code
v1:
DPI can sample on falling, rising or both edge.
When DPI sample the data both rising and falling edge.
It can reduce half data io pins.
Rex-BC Chen (3):
drm/mediatek: dpi dual edge sample mode support
drm/mediatek: config driver data to support dual edge sample
drm/mediatek: dpi: add bus format negotiation
drivers/gpu/drm/mediatek/mtk_dpi.c | 112 +++++++++++++++++++++++++++--
1 file changed, 106 insertions(+), 6 deletions(-)
--
2.18.0
Add output_fmts and num_output_fmts value for all configuration.
Signed-off-by: Jitao Shi <[email protected]>
Signed-off-by: Rex-BC Chen <[email protected]>
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index d3b883c97aaf..d6a422986efc 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -695,10 +695,21 @@ static unsigned int mt8183_calculate_factor(int clock)
return 2;
}
+static const u32 mt8173_output_fmts[] = {
+MEDIA_BUS_FMT_RGB888_1X24,
+};
+
+static const u32 mt8183_output_fmts[] = {
+MEDIA_BUS_FMT_RGB888_2X12_LE,
+MEDIA_BUS_FMT_RGB888_2X12_BE,
+};
+
static const struct mtk_dpi_conf mt8173_conf = {
.cal_factor = mt8173_calculate_factor,
.reg_h_fre_con = 0xe0,
.max_clock_khz = 300000,
+ .output_fmts = mt8173_output_fmts,
+ .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
};
static const struct mtk_dpi_conf mt2701_conf = {
@@ -706,18 +717,24 @@ static const struct mtk_dpi_conf mt2701_conf = {
.reg_h_fre_con = 0xb0,
.edge_sel_en = true,
.max_clock_khz = 150000,
+ .output_fmts = mt8173_output_fmts,
+ .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
};
static const struct mtk_dpi_conf mt8183_conf = {
.cal_factor = mt8183_calculate_factor,
.reg_h_fre_con = 0xe0,
.max_clock_khz = 100000,
+ .output_fmts = mt8183_output_fmts,
+ .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts),
};
static const struct mtk_dpi_conf mt8192_conf = {
.cal_factor = mt8183_calculate_factor,
.reg_h_fre_con = 0xe0,
.max_clock_khz = 150000,
+ .output_fmts = mt8173_output_fmts,
+ .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
};
static int mtk_dpi_probe(struct platform_device *pdev)
--
2.18.0
DPI can sample on falling, rising or both edge.
When DPI sample the data both rising and falling edge.
It can reduce half data io pins.
Use num_output_fmts to determine whether it is dual edge mode.
Signed-off-by: Jitao Shi <[email protected]>
Signed-off-by: Rex-BC Chen <[email protected]>
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index bea91c81626e..d3b883c97aaf 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -83,6 +83,7 @@ struct mtk_dpi {
struct pinctrl *pinctrl;
struct pinctrl_state *pins_gpio;
struct pinctrl_state *pins_dpi;
+ bool ddr_edge_sel;
int refcount;
};
@@ -122,6 +123,8 @@ struct mtk_dpi_conf {
u32 reg_h_fre_con;
u32 max_clock_khz;
bool edge_sel_en;
+ const u32 *output_fmts;
+ u32 num_output_fmts;
};
static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
@@ -381,6 +384,16 @@ static void mtk_dpi_config_color_format(struct mtk_dpi *dpi,
}
}
+static void mtk_dpi_dual_edge(struct mtk_dpi *dpi)
+{
+ if (dpi->conf->num_output_fmts > 1) {
+ mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE,
+ DDR_EN | DDR_4PHASE);
+ mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING,
+ dpi->ddr_edge_sel ? EDGE_SEL : 0, EDGE_SEL);
+ }
+}
+
static void mtk_dpi_power_off(struct mtk_dpi *dpi)
{
if (WARN_ON(dpi->refcount == 0))
@@ -455,7 +468,8 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
pll_rate = clk_get_rate(dpi->tvd_clk);
vm.pixelclock = pll_rate / factor;
- clk_set_rate(dpi->pixel_clk, vm.pixelclock);
+ clk_set_rate(dpi->pixel_clk,
+ vm.pixelclock * ((dpi->conf->num_output_fmts > 1) ? 2 : 1));
vm.pixelclock = clk_get_rate(dpi->pixel_clk);
dev_dbg(dpi->dev, "Got PLL %lu Hz, pixel clock %lu Hz\n",
@@ -519,6 +533,7 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
mtk_dpi_config_yc_map(dpi, dpi->yc_map);
mtk_dpi_config_color_format(dpi, dpi->color_format);
mtk_dpi_config_2n_h_fre(dpi);
+ mtk_dpi_dual_edge(dpi);
mtk_dpi_config_disable_edge(dpi);
mtk_dpi_sw_reset(dpi, false);
--
2.18.0
Add the atomic_get_output_bus_fmts, atomic_get_input_bus_fmts to negotiate
the possible output and input formats for the current mode and monitor,
and use the negotiated formats in a basic atomic_check callback.
Signed-off-by: Jitao Shi <[email protected]>
Signed-off-by: Rex-BC Chen <[email protected]>
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 78 ++++++++++++++++++++++++++++--
1 file changed, 73 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
index d6a422986efc..667a97470389 100644
--- a/drivers/gpu/drm/mediatek/mtk_dpi.c
+++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
@@ -540,6 +540,73 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
return 0;
}
+static u32 *mtk_dpi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
+ struct drm_bridge_state *bridge_state,
+ struct drm_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state,
+ unsigned int *num_output_fmts)
+{
+ struct mtk_dpi *dpi = bridge_to_dpi(bridge);
+
+ *num_output_fmts = 0;
+
+ if (!dpi->conf->output_fmts)
+ return NULL;
+
+ *num_output_fmts = dpi->conf->num_output_fmts;
+
+ return (u32 *)dpi->conf->output_fmts;
+}
+
+#define MAX_INPUT_SEL_FORMATS 1
+
+static u32 *mtk_dpi_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
+ struct drm_bridge_state *bridge_state,
+ struct drm_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state,
+ u32 output_fmt,
+ unsigned int *num_input_fmts)
+{
+ u32 *input_fmts;
+
+ *num_input_fmts = 0;
+
+ input_fmts = kcalloc(MAX_INPUT_SEL_FORMATS, sizeof(*input_fmts),
+ GFP_KERNEL);
+ if (!input_fmts)
+ return NULL;
+
+ *num_input_fmts = 1;
+ input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;
+
+ return input_fmts;
+}
+
+static int mtk_dpi_bridge_atomic_check(struct drm_bridge *bridge,
+ struct drm_bridge_state *bridge_state,
+ struct drm_crtc_state *crtc_state,
+ struct drm_connector_state *conn_state)
+{
+ struct mtk_dpi *dpi = bridge->driver_private;
+ unsigned int out_bus_format;
+
+ out_bus_format = bridge_state->output_bus_cfg.format;
+
+ dev_dbg(dpi->dev, "input format 0x%04x, output format 0x%04x\n",
+ bridge_state->input_bus_cfg.format,
+ bridge_state->output_bus_cfg.format);
+
+ dpi->ddr_edge_sel = (out_bus_format == MEDIA_BUS_FMT_RGB888_2X12_LE) ?
+ true : false;
+
+ dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS;
+ dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB;
+ dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB;
+ dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB;
+
+ return 0;
+}
+
static int mtk_dpi_bridge_attach(struct drm_bridge *bridge,
enum drm_bridge_attach_flags flags)
{
@@ -592,6 +659,12 @@ static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
.mode_valid = mtk_dpi_bridge_mode_valid,
.disable = mtk_dpi_bridge_disable,
.enable = mtk_dpi_bridge_enable,
+ .atomic_check = mtk_dpi_bridge_atomic_check,
+ .atomic_get_output_bus_fmts = mtk_dpi_bridge_atomic_get_output_bus_fmts,
+ .atomic_get_input_bus_fmts = mtk_dpi_bridge_atomic_get_input_bus_fmts,
+ .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
+ .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
+ .atomic_reset = drm_atomic_helper_bridge_reset,
};
void mtk_dpi_start(struct device *dev)
@@ -638,11 +711,6 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data)
}
drm_connector_attach_encoder(dpi->connector, &dpi->encoder);
- dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS;
- dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB;
- dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB;
- dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB;
-
return 0;
err_cleanup:
--
2.18.0
Hi, Rex:
Rex-BC Chen <[email protected]> 於 2021年5月25日 週二 下午8:15寫道：
>
> DPI can sample on falling, rising or both edge.
> When DPI sample the data both rising and falling edge.
> It can reduce half data io pins.
> Use num_output_fmts to determine whether it is dual edge mode.
>
> Signed-off-by: Jitao Shi <[email protected]>
> Signed-off-by: Rex-BC Chen <[email protected]>
> ---
> drivers/gpu/drm/mediatek/mtk_dpi.c | 17 ++++++++++++++++-
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index bea91c81626e..d3b883c97aaf 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -83,6 +83,7 @@ struct mtk_dpi {
> struct pinctrl *pinctrl;
> struct pinctrl_state *pins_gpio;
> struct pinctrl_state *pins_dpi;
> + bool ddr_edge_sel;
I would like to keep output_fmt instead of ddr_edge_sel.
Initialize output_fmt to MEDIA_BUS_FMT_RGB888_1X24 in this patch.
> int refcount;
> };
>
> @@ -122,6 +123,8 @@ struct mtk_dpi_conf {
> u32 reg_h_fre_con;
> u32 max_clock_khz;
> bool edge_sel_en;
> + const u32 *output_fmts;
> + u32 num_output_fmts;
Move these to next patch.
> };
>
> static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val, u32 mask)
> @@ -381,6 +384,16 @@ static void mtk_dpi_config_color_format(struct mtk_dpi *dpi,
> }
> }
>
> +static void mtk_dpi_dual_edge(struct mtk_dpi *dpi)
> +{
> + if (dpi->conf->num_output_fmts > 1) {
> + mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE,
> + DDR_EN | DDR_4PHASE);
> + mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING,
> + dpi->ddr_edge_sel ? EDGE_SEL : 0, EDGE_SEL);
> + }
if (dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE) ||
(dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_BE) {
mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE, DDR_EN |
DDR_4PHASE);
mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING,
dpi->output_fmt ==
MEDIA_BUS_FMT_RGB888_2X12_LE ? EDGE_SEL : 0, EDGE_SEL);
} else {
mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE, 0);
}
> +}
> +
> static void mtk_dpi_power_off(struct mtk_dpi *dpi)
> {
> if (WARN_ON(dpi->refcount == 0))
> @@ -455,7 +468,8 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
> pll_rate = clk_get_rate(dpi->tvd_clk);
>
> vm.pixelclock = pll_rate / factor;
> - clk_set_rate(dpi->pixel_clk, vm.pixelclock);
> + clk_set_rate(dpi->pixel_clk,
> + vm.pixelclock * ((dpi->conf->num_output_fmts > 1) ? 2 : 1));
if (dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE) ||
(dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_BE)
clk_set_rate(dpi->pixel_clk, vm.pixelclock * 2);
else
clk_set_rate(dpi->pixel_clk, vm.pixelclock);
> vm.pixelclock = clk_get_rate(dpi->pixel_clk);
>
> dev_dbg(dpi->dev, "Got PLL %lu Hz, pixel clock %lu Hz\n",
> @@ -519,6 +533,7 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
> mtk_dpi_config_yc_map(dpi, dpi->yc_map);
> mtk_dpi_config_color_format(dpi, dpi->color_format);
> mtk_dpi_config_2n_h_fre(dpi);
> + mtk_dpi_dual_edge(dpi);
> mtk_dpi_config_disable_edge(dpi);
> mtk_dpi_sw_reset(dpi, false);
>
> --
> 2.18.0
>
Hello CK,
Thanks for your review.
On Wed, 2021-05-26 at 08:01 +0800, Chun-Kuang Hu wrote:
> Hi, Rex:
>
> Rex-BC Chen <[email protected]> 於 2021年5月25日 週二 下午8:15寫道：
> >
> > DPI can sample on falling, rising or both edge.
> > When DPI sample the data both rising and falling edge.
> > It can reduce half data io pins.
> > Use num_output_fmts to determine whether it is dual edge mode.
> >
> > Signed-off-by: Jitao Shi <[email protected]>
> > Signed-off-by: Rex-BC Chen <[email protected]>
> > ---
> > drivers/gpu/drm/mediatek/mtk_dpi.c | 17 ++++++++++++++++-
> > 1 file changed, 16 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > index bea91c81626e..d3b883c97aaf 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > @@ -83,6 +83,7 @@ struct mtk_dpi {
> > struct pinctrl *pinctrl;
> > struct pinctrl_state *pins_gpio;
> > struct pinctrl_state *pins_dpi;
> > + bool ddr_edge_sel;
>
> I would like to keep output_fmt instead of ddr_edge_sel.
> Initialize output_fmt to MEDIA_BUS_FMT_RGB888_1X24 in this patch.
>
It means that I may initialize output_fmt in probe and set value in
mtk_dpi_bridge_atomic_check() of patch[3/3]?
> > int refcount;
> > };
> >
> > @@ -122,6 +123,8 @@ struct mtk_dpi_conf {
> > u32 reg_h_fre_con;
> > u32 max_clock_khz;
> > bool edge_sel_en;
> > + const u32 *output_fmts;
> > + u32 num_output_fmts;
>
> Move these to next patch.
>
I will do this in next version.
> > };
> >
> > static void mtk_dpi_mask(struct mtk_dpi *dpi, u32 offset, u32 val,
> > u32 mask)
> > @@ -381,6 +384,16 @@ static void mtk_dpi_config_color_format(struct
> > mtk_dpi *dpi,
> > }
> > }
> >
> > +static void mtk_dpi_dual_edge(struct mtk_dpi *dpi)
> > +{
> > + if (dpi->conf->num_output_fmts > 1) {
> > + mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN |
> > DDR_4PHASE,
> > + DDR_EN | DDR_4PHASE);
> > + mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING,
> > + dpi->ddr_edge_sel ? EDGE_SEL : 0,
> > EDGE_SEL);
> > + }
>
> if (dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE) ||
> (dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_BE) {
> mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE, DDR_EN |
> DDR_4PHASE);
> mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING,
> dpi->output_fmt ==
> MEDIA_BUS_FMT_RGB888_2X12_LE ? EDGE_SEL : 0, EDGE_SEL);
> } else {
> mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE, 0);
> }
>
I will modify this code in next version.
> > +}
> > +
> > static void mtk_dpi_power_off(struct mtk_dpi *dpi)
> > {
> > if (WARN_ON(dpi->refcount == 0))
> > @@ -455,7 +468,8 @@ static int mtk_dpi_set_display_mode(struct
> > mtk_dpi *dpi,
> > pll_rate = clk_get_rate(dpi->tvd_clk);
> >
> > vm.pixelclock = pll_rate / factor;
> > - clk_set_rate(dpi->pixel_clk, vm.pixelclock);
> > + clk_set_rate(dpi->pixel_clk,
> > + vm.pixelclock * ((dpi->conf->num_output_fmts >
> > 1) ? 2 : 1));
>
> if (dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_LE) ||
> (dpi->output_fmt == MEDIA_BUS_FMT_RGB888_2X12_BE)
> clk_set_rate(dpi->pixel_clk, vm.pixelclock * 2);
> else
> clk_set_rate(dpi->pixel_clk, vm.pixelclock);
>
I will modify this code in next version.
> > vm.pixelclock = clk_get_rate(dpi->pixel_clk);
> >
> > dev_dbg(dpi->dev, "Got PLL %lu Hz, pixel clock %lu Hz\n",
> > @@ -519,6 +533,7 @@ static int mtk_dpi_set_display_mode(struct
> > mtk_dpi *dpi,
> > mtk_dpi_config_yc_map(dpi, dpi->yc_map);
> > mtk_dpi_config_color_format(dpi, dpi->color_format);
> > mtk_dpi_config_2n_h_fre(dpi);
> > + mtk_dpi_dual_edge(dpi);
> > mtk_dpi_config_disable_edge(dpi);
> > mtk_dpi_sw_reset(dpi, false);
> >
> > --
> > 2.18.0
BRs,
Rex-BC Chen
> >
Hi, Rex:
Rex-BC Chen <[email protected]> 於 2021年5月25日 週二 下午8:15寫道：
>
> Add output_fmts and num_output_fmts value for all configuration.
>
> Signed-off-by: Jitao Shi <[email protected]>
> Signed-off-by: Rex-BC Chen <[email protected]>
> ---
> drivers/gpu/drm/mediatek/mtk_dpi.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index d3b883c97aaf..d6a422986efc 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -695,10 +695,21 @@ static unsigned int mt8183_calculate_factor(int clock)
> return 2;
> }
>
> +static const u32 mt8173_output_fmts[] = {
> +MEDIA_BUS_FMT_RGB888_1X24,
indent.
> +};
> +
> +static const u32 mt8183_output_fmts[] = {
> +MEDIA_BUS_FMT_RGB888_2X12_LE,
> +MEDIA_BUS_FMT_RGB888_2X12_BE,
ditto.
Regards,
Chun-Kuang.
> +};
> +
> static const struct mtk_dpi_conf mt8173_conf = {
> .cal_factor = mt8173_calculate_factor,
> .reg_h_fre_con = 0xe0,
> .max_clock_khz = 300000,
> + .output_fmts = mt8173_output_fmts,
> + .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
> };
>
> static const struct mtk_dpi_conf mt2701_conf = {
> @@ -706,18 +717,24 @@ static const struct mtk_dpi_conf mt2701_conf = {
> .reg_h_fre_con = 0xb0,
> .edge_sel_en = true,
> .max_clock_khz = 150000,
> + .output_fmts = mt8173_output_fmts,
> + .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
> };
>
> static const struct mtk_dpi_conf mt8183_conf = {
> .cal_factor = mt8183_calculate_factor,
> .reg_h_fre_con = 0xe0,
> .max_clock_khz = 100000,
> + .output_fmts = mt8183_output_fmts,
> + .num_output_fmts = ARRAY_SIZE(mt8183_output_fmts),
> };
>
> static const struct mtk_dpi_conf mt8192_conf = {
> .cal_factor = mt8183_calculate_factor,
> .reg_h_fre_con = 0xe0,
> .max_clock_khz = 150000,
> + .output_fmts = mt8173_output_fmts,
> + .num_output_fmts = ARRAY_SIZE(mt8173_output_fmts),
> };
>
> static int mtk_dpi_probe(struct platform_device *pdev)
> --
> 2.18.0
>
Hi, Rex:
Rex-BC Chen <[email protected]> 於 2021年5月25日 週二 下午8:15寫道：
>
> Add the atomic_get_output_bus_fmts, atomic_get_input_bus_fmts to negotiate
> the possible output and input formats for the current mode and monitor,
> and use the negotiated formats in a basic atomic_check callback.
>
> Signed-off-by: Jitao Shi <[email protected]>
> Signed-off-by: Rex-BC Chen <[email protected]>
> ---
> drivers/gpu/drm/mediatek/mtk_dpi.c | 78 ++++++++++++++++++++++++++++--
> 1 file changed, 73 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c
> index d6a422986efc..667a97470389 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> @@ -540,6 +540,73 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi,
> return 0;
> }
>
> +static u32 *mtk_dpi_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
> + struct drm_bridge_state *bridge_state,
> + struct drm_crtc_state *crtc_state,
> + struct drm_connector_state *conn_state,
> + unsigned int *num_output_fmts)
> +{
> + struct mtk_dpi *dpi = bridge_to_dpi(bridge);
> +
> + *num_output_fmts = 0;
> +
> + if (!dpi->conf->output_fmts)
print error here because this should not happen.
> + return NULL;
> +
> + *num_output_fmts = dpi->conf->num_output_fmts;
> +
> + return (u32 *)dpi->conf->output_fmts;
I think you should allocate new buffer for output_fmts because the
caller would free it.
> +}
> +
> +#define MAX_INPUT_SEL_FORMATS 1
> +
> +static u32 *mtk_dpi_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
> + struct drm_bridge_state *bridge_state,
> + struct drm_crtc_state *crtc_state,
> + struct drm_connector_state *conn_state,
> + u32 output_fmt,
> + unsigned int *num_input_fmts)
> +{
> + u32 *input_fmts;
> +
> + *num_input_fmts = 0;
> +
> + input_fmts = kcalloc(MAX_INPUT_SEL_FORMATS, sizeof(*input_fmts),
> + GFP_KERNEL);
> + if (!input_fmts)
> + return NULL;
> +
> + *num_input_fmts = 1;
> + input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;
it seems that MAX_INPUT_SEL_FORMATS has no influence here. Maybe just
remove MAX_INPUT_SEL_FORMATS, or you should have flexibility here for
different MAX_INPUT_SEL_FORMATS value.
> +
> + return input_fmts;
> +}
> +
> +static int mtk_dpi_bridge_atomic_check(struct drm_bridge *bridge,
> + struct drm_bridge_state *bridge_state,
> + struct drm_crtc_state *crtc_state,
> + struct drm_connector_state *conn_state)
> +{
> + struct mtk_dpi *dpi = bridge->driver_private;
> + unsigned int out_bus_format;
> +
> + out_bus_format = bridge_state->output_bus_cfg.format;
> +
> + dev_dbg(dpi->dev, "input format 0x%04x, output format 0x%04x\n",
> + bridge_state->input_bus_cfg.format,
> + bridge_state->output_bus_cfg.format);
> +
> + dpi->ddr_edge_sel = (out_bus_format == MEDIA_BUS_FMT_RGB888_2X12_LE) ?
> + true : false;
dpi->output_fmt = out_bus_format;
Regards,
Chun-Kuang.
> +
> + dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS;
> + dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB;
> + dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB;
> + dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB;
> +
> + return 0;
> +}
> +
> static int mtk_dpi_bridge_attach(struct drm_bridge *bridge,
> enum drm_bridge_attach_flags flags)
> {
> @@ -592,6 +659,12 @@ static const struct drm_bridge_funcs mtk_dpi_bridge_funcs = {
> .mode_valid = mtk_dpi_bridge_mode_valid,
> .disable = mtk_dpi_bridge_disable,
> .enable = mtk_dpi_bridge_enable,
> + .atomic_check = mtk_dpi_bridge_atomic_check,
> + .atomic_get_output_bus_fmts = mtk_dpi_bridge_atomic_get_output_bus_fmts,
> + .atomic_get_input_bus_fmts = mtk_dpi_bridge_atomic_get_input_bus_fmts,
> + .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
> + .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
> + .atomic_reset = drm_atomic_helper_bridge_reset,
> };
>
> void mtk_dpi_start(struct device *dev)
> @@ -638,11 +711,6 @@ static int mtk_dpi_bind(struct device *dev, struct device *master, void *data)
> }
> drm_connector_attach_encoder(dpi->connector, &dpi->encoder);
>
> - dpi->bit_num = MTK_DPI_OUT_BIT_NUM_8BITS;
> - dpi->channel_swap = MTK_DPI_OUT_CHANNEL_SWAP_RGB;
> - dpi->yc_map = MTK_DPI_OUT_YC_MAP_RGB;
> - dpi->color_format = MTK_DPI_COLOR_FORMAT_RGB;
> -
> return 0;
>
> err_cleanup:
> --
> 2.18.0
>
Rex-BC Chen <[email protected]> 於 2021年5月26日 週三 上午9:51寫道：
>
> Hello CK,
>
> Thanks for your review.
>
> On Wed, 2021-05-26 at 08:01 +0800, Chun-Kuang Hu wrote:
> > Hi, Rex:
> >
> > Rex-BC Chen <[email protected]> 於 2021年5月25日 週二 下午8:15寫道：
> > >
> > > DPI can sample on falling, rising or both edge.
> > > When DPI sample the data both rising and falling edge.
> > > It can reduce half data io pins.
> > > Use num_output_fmts to determine whether it is dual edge mode.
> > >
> > > Signed-off-by: Jitao Shi <[email protected]>
> > > Signed-off-by: Rex-BC Chen <[email protected]>
> > > ---
> > > drivers/gpu/drm/mediatek/mtk_dpi.c | 17 ++++++++++++++++-
> > > 1 file changed, 16 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > > b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > > index bea91c81626e..d3b883c97aaf 100644
> > > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > > @@ -83,6 +83,7 @@ struct mtk_dpi {
> > > struct pinctrl *pinctrl;
> > > struct pinctrl_state *pins_gpio;
> > > struct pinctrl_state *pins_dpi;
> > > + bool ddr_edge_sel;
> >
> > I would like to keep output_fmt instead of ddr_edge_sel.
> > Initialize output_fmt to MEDIA_BUS_FMT_RGB888_1X24 in this patch.
> >
> It means that I may initialize output_fmt in probe and set value in
> mtk_dpi_bridge_atomic_check() of patch[3/3]?
Yes.
> > > int refcount;
> > > };
> > >