Smatch reports the following:
drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:2174
dcn10_enable_vblanks_synchronization() warn: if statement not indented
Signed-off-by: Haowen Bai <[email protected]>
---
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
index ee22f4422d26..3c338b85040c 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
@@ -2172,13 +2172,13 @@ void dcn10_enable_vblanks_synchronization(
if (master >= 0) {
for (i = 0; i < group_size; i++) {
if (i != master && !grouped_pipes[i]->stream->has_non_synchronizable_pclk)
- grouped_pipes[i]->stream_res.tg->funcs->align_vblanks(
- grouped_pipes[master]->stream_res.tg,
- grouped_pipes[i]->stream_res.tg,
- grouped_pipes[master]->stream->timing.pix_clk_100hz,
- grouped_pipes[i]->stream->timing.pix_clk_100hz,
- get_clock_divider(grouped_pipes[master], false),
- get_clock_divider(grouped_pipes[i], false));
+ grouped_pipes[i]->stream_res.tg->funcs->align_vblanks(
+ grouped_pipes[master]->stream_res.tg,
+ grouped_pipes[i]->stream_res.tg,
+ grouped_pipes[master]->stream->timing.pix_clk_100hz,
+ grouped_pipes[i]->stream->timing.pix_clk_100hz,
+ get_clock_divider(grouped_pipes[master], false),
+ get_clock_divider(grouped_pipes[i], false));
grouped_pipes[i]->stream->vblank_synchronized = true;
}
grouped_pipes[master]->stream->vblank_synchronized = true;
--
2.7.4
Applied. Thanks!
Alex
On Thu, Apr 7, 2022 at 10:18 AM Harry Wentland <[email protected]> wrote:
>
>
>
> On 2022-04-07 02:00, Haowen Bai wrote:
> > Smatch reports the following:
> > drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:2174
> > dcn10_enable_vblanks_synchronization() warn: if statement not indented
> >
> > Signed-off-by: Haowen Bai <[email protected]>
>
> Reviewed-by: Harry Wentland <[email protected]>
>
> Harry
>
> > ---
> > drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 14 +++++++-------
> > 1 file changed, 7 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> > index ee22f4422d26..3c338b85040c 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> > @@ -2172,13 +2172,13 @@ void dcn10_enable_vblanks_synchronization(
> > if (master >= 0) {
> > for (i = 0; i < group_size; i++) {
> > if (i != master && !grouped_pipes[i]->stream->has_non_synchronizable_pclk)
> > - grouped_pipes[i]->stream_res.tg->funcs->align_vblanks(
> > - grouped_pipes[master]->stream_res.tg,
> > - grouped_pipes[i]->stream_res.tg,
> > - grouped_pipes[master]->stream->timing.pix_clk_100hz,
> > - grouped_pipes[i]->stream->timing.pix_clk_100hz,
> > - get_clock_divider(grouped_pipes[master], false),
> > - get_clock_divider(grouped_pipes[i], false));
> > + grouped_pipes[i]->stream_res.tg->funcs->align_vblanks(
> > + grouped_pipes[master]->stream_res.tg,
> > + grouped_pipes[i]->stream_res.tg,
> > + grouped_pipes[master]->stream->timing.pix_clk_100hz,
> > + grouped_pipes[i]->stream->timing.pix_clk_100hz,
> > + get_clock_divider(grouped_pipes[master], false),
> > + get_clock_divider(grouped_pipes[i], false));
> > grouped_pipes[i]->stream->vblank_synchronized = true;
> > }
> > grouped_pipes[master]->stream->vblank_synchronized = true;
>
On 2022-04-07 02:00, Haowen Bai wrote:
> Smatch reports the following:
> drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:2174
> dcn10_enable_vblanks_synchronization() warn: if statement not indented
>
> Signed-off-by: Haowen Bai <[email protected]>
Reviewed-by: Harry Wentland <[email protected]>
Harry
> ---
> drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> index ee22f4422d26..3c338b85040c 100644
> --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> @@ -2172,13 +2172,13 @@ void dcn10_enable_vblanks_synchronization(
> if (master >= 0) {
> for (i = 0; i < group_size; i++) {
> if (i != master && !grouped_pipes[i]->stream->has_non_synchronizable_pclk)
> - grouped_pipes[i]->stream_res.tg->funcs->align_vblanks(
> - grouped_pipes[master]->stream_res.tg,
> - grouped_pipes[i]->stream_res.tg,
> - grouped_pipes[master]->stream->timing.pix_clk_100hz,
> - grouped_pipes[i]->stream->timing.pix_clk_100hz,
> - get_clock_divider(grouped_pipes[master], false),
> - get_clock_divider(grouped_pipes[i], false));
> + grouped_pipes[i]->stream_res.tg->funcs->align_vblanks(
> + grouped_pipes[master]->stream_res.tg,
> + grouped_pipes[i]->stream_res.tg,
> + grouped_pipes[master]->stream->timing.pix_clk_100hz,
> + grouped_pipes[i]->stream->timing.pix_clk_100hz,
> + get_clock_divider(grouped_pipes[master], false),
> + get_clock_divider(grouped_pipes[i], false));
> grouped_pipes[i]->stream->vblank_synchronized = true;
> }
> grouped_pipes[master]->stream->vblank_synchronized = true;