2023-08-02 03:52:32

by Ran Sun

Subject: [PATCH] drm/amd/display: Clean up errors in dcn316_smu.c

Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line
ERROR: code indent should use tabs where possible

Signed-off-by: Ran Sun <[email protected]>
---
.../amd/display/dc/clk_mgr/dcn316/dcn316_smu.c | 18 ++++++++----------
1 file changed, 8 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c
index 457a9254ae1c..3ed19197a755 100644
--- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c
+++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c
@@ -34,23 +34,21 @@
#define MAX_INSTANCE 7
#define MAX_SEGMENT 6

-struct IP_BASE_INSTANCE
-{
+struct IP_BASE_INSTANCE {
unsigned int segment[MAX_SEGMENT];
};

-struct IP_BASE
-{
+struct IP_BASE {
struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
};

static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0x00DC0000, 0x00E00000, 0x00E40000, 0x0243FC00, 0 } },
- { { 0, 0, 0, 0, 0, 0 } },
- { { 0, 0, 0, 0, 0, 0 } },
- { { 0, 0, 0, 0, 0, 0 } },
- { { 0, 0, 0, 0, 0, 0 } },
- { { 0, 0, 0, 0, 0, 0 } },
- { { 0, 0, 0, 0, 0, 0 } } } };
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0 } } } };

#define REG(reg_name) \
(MP0_BASE.instance[0].segment[reg ## reg_name ## _BASE_IDX] + reg ## reg_name)
--
2.17.1

2023-08-07 18:24:08

by Alex Deucher

Subject: Re: [PATCH] drm/amd/display: Clean up errors in dcn316_smu.c

Applied. Thanks!

On Tue, Aug 1, 2023 at 11:03 PM Ran Sun <[email protected]> wrote:
>
> Fix the following errors reported by checkpatch:
>
> ERROR: open brace '{' following struct go on the same line
> ERROR: code indent should use tabs where possible
>
> Signed-off-by: Ran Sun <[email protected]>
> ---
> .../amd/display/dc/clk_mgr/dcn316/dcn316_smu.c | 18 ++++++++----------
> 1 file changed, 8 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c
> index 457a9254ae1c..3ed19197a755 100644
> --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c
> +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/dcn316_smu.c
> @@ -34,23 +34,21 @@
> #define MAX_INSTANCE 7
> #define MAX_SEGMENT 6
>
> -struct IP_BASE_INSTANCE
> -{
> +struct IP_BASE_INSTANCE {
> unsigned int segment[MAX_SEGMENT];
> };
>
> -struct IP_BASE
> -{
> +struct IP_BASE {
> struct IP_BASE_INSTANCE instance[MAX_INSTANCE];
> };
>
> static const struct IP_BASE MP0_BASE = { { { { 0x00016000, 0x00DC0000, 0x00E00000, 0x00E40000, 0x0243FC00, 0 } },
> - { { 0, 0, 0, 0, 0, 0 } },
> - { { 0, 0, 0, 0, 0, 0 } },
> - { { 0, 0, 0, 0, 0, 0 } },
> - { { 0, 0, 0, 0, 0, 0 } },
> - { { 0, 0, 0, 0, 0, 0 } },
> - { { 0, 0, 0, 0, 0, 0 } } } };
> + { { 0, 0, 0, 0, 0, 0 } },
> + { { 0, 0, 0, 0, 0, 0 } },
> + { { 0, 0, 0, 0, 0, 0 } },
> + { { 0, 0, 0, 0, 0, 0 } },
> + { { 0, 0, 0, 0, 0, 0 } },
> + { { 0, 0, 0, 0, 0, 0 } } } };
>
> #define REG(reg_name) \
> (MP0_BASE.instance[0].segment[reg ## reg_name ## _BASE_IDX] + reg ## reg_name)
> --
> 2.17.1
>