2019-09-12 16:37:44

by Jianxin Pan

[permalink] [raw]
Subject: [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family

A1 is an application processor designed for smart audio and IoT applications,
with Dual core ARM Cortex-A35 CPU. Unlike the previous GXL and G12 series,
there is no Cortex-M3 AO CPU in it.

This serial add basic support for the Amlogic A1 based Amlogic AD401 board:
which describe components as follows: Reserve Memory, CPU, GIC, IRQ,
Timer, UART. It's capable of booting up into the serial console.

The pclk for uart_AO_B need to be fixed once A1 clock driver is merged.
In this version, it rely on bootloader to enable the pclk gate

Changes since v3 at [2]:
- remove 0x in bus

Changes since v2 at [1]:
- add bus in dts according Martin's suggestion
- remove useless comment line

Changes since v1 at [0]:
- fix coding style
- collect Reviewed-by

[0] https://lore.kernel.org/linux-amlogic/[email protected]
[1] https://lore.kernel.org/linux-amlogic/[email protected]
[2] https://lore.kernel.org/linux-amlogic/[email protected]
Jianxin Pan (4):
soc: amlogic: meson-gx-socinfo: Add A1 and A113L IDs
dt-bindings: arm: amlogic: add A1 bindings
dt-bindings: arm: amlogic: add Amlogic AD401 bindings
arm64: dts: add support for A1 based Amlogic AD401

Documentation/devicetree/bindings/arm/amlogic.yaml | 6 +
arch/arm64/boot/dts/amlogic/Makefile | 1 +
arch/arm64/boot/dts/amlogic/meson-a1-ad401.dts | 30 +++++
arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 130 +++++++++++++++++++++
drivers/soc/amlogic/meson-gx-socinfo.c | 2 +
5 files changed, 169 insertions(+)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-a1-ad401.dts
create mode 100644 arch/arm64/boot/dts/amlogic/meson-a1.dtsi

--
2.7.4


2019-09-12 16:44:04

by Jianxin Pan

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Subject: [PATCH v4 1/4] soc: amlogic: meson-gx-socinfo: Add A1 and A113L IDs

Add the SoC IDs for the A113L Amlogic A1 SoC.

Signed-off-by: Jianxin Pan <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
---
drivers/soc/amlogic/meson-gx-socinfo.c | 2 ++
1 file changed, 2 insertions(+)

diff --git a/drivers/soc/amlogic/meson-gx-socinfo.c b/drivers/soc/amlogic/meson-gx-socinfo.c
index 6d0d04f..3c86d8d 100644
--- a/drivers/soc/amlogic/meson-gx-socinfo.c
+++ b/drivers/soc/amlogic/meson-gx-socinfo.c
@@ -40,6 +40,7 @@ static const struct meson_gx_soc_id {
{ "G12A", 0x28 },
{ "G12B", 0x29 },
{ "SM1", 0x2b },
+ { "A1", 0x2c },
};

static const struct meson_gx_package_id {
@@ -68,6 +69,7 @@ static const struct meson_gx_package_id {
{ "S922X", 0x29, 0x40, 0xf0 },
{ "A311D", 0x29, 0x10, 0xf0 },
{ "S905X3", 0x2b, 0x5, 0xf },
+ { "A113L", 0x2c, 0x0, 0xf8 },
};

static inline unsigned int socinfo_to_major(u32 socinfo)
--
2.7.4

2019-09-15 00:50:13

by Martin Blumenstingl

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Subject: Re: [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family

Hi Jianxin,

On Thu, Sep 12, 2019 at 10:20 AM Jianxin Pan <[email protected]> wrote:
>
> A1 is an application processor designed for smart audio and IoT applications,
> with Dual core ARM Cortex-A35 CPU. Unlike the previous GXL and G12 series,
> there is no Cortex-M3 AO CPU in it.
it will be interesting to see which devices will use this SoC

[...]
> Jianxin Pan (4):
> soc: amlogic: meson-gx-socinfo: Add A1 and A113L IDs
> dt-bindings: arm: amlogic: add A1 bindings
> dt-bindings: arm: amlogic: add Amlogic AD401 bindings
> arm64: dts: add support for A1 based Amlogic AD401
for the whole series:
Reviewed-by: Martin Blumenstingl <[email protected]>

2019-09-26 08:43:27

by Kevin Hilman

[permalink] [raw]
Subject: Re: [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family

Jianxin Pan <[email protected]> writes:

> A1 is an application processor designed for smart audio and IoT applications,
> with Dual core ARM Cortex-A35 CPU. Unlike the previous GXL and G12 series,
> there is no Cortex-M3 AO CPU in it.
>
> This serial add basic support for the Amlogic A1 based Amlogic AD401 board:
> which describe components as follows: Reserve Memory, CPU, GIC, IRQ,
> Timer, UART. It's capable of booting up into the serial console.
>
> The pclk for uart_AO_B need to be fixed once A1 clock driver is merged.
> In this version, it rely on bootloader to enable the pclk gate

Queued for v5.5,

Thanks for the new SoC support,

Kevin