This patch adds level for cpu dt node, so that these levels can be used
as a phandle whenever required. For example, adding a "interrupt-affinity"
for arm pmu node.
Signed-off-by: Alim Akhtar <[email protected]>
---
arch/arm64/boot/dts/exynos/exynos7.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index e0d0d01..396ffb9 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -35,28 +35,28 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu@0 {
+ cpu_atlas0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x0>;
enable-method = "psci";
};
- cpu@1 {
+ cpu_atlas1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x1>;
enable-method = "psci";
};
- cpu@2 {
+ cpu_atlas2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x2>;
enable-method = "psci";
};
- cpu@3 {
+ cpu_atlas3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a57", "arm,armv8";
reg = <0x3>;
--
1.7.10.4
This patch adds ARM Performance Monitor Unit dt node for exynos7.
PMU provides various statistics on the operation of the CPU and
memory system at runtime, which are very useful when debugging or
profiling code. This enables the same.
Signed-off-by: Alim Akhtar <[email protected]>
---
arch/arm64/boot/dts/exynos/exynos7.dtsi | 10 ++++++++++
1 file changed, 10 insertions(+)
Changes since v1:
* Added "interrupt-affinity" property as per Robin Murphy review comment.
diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
index 396ffb9..09e7a05b 100644
--- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
@@ -472,6 +472,16 @@
status = "disabled";
};
+ arm-pmu {
+ compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>,
+ <&cpu_atlas2>, <&cpu_atlas3>;
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13
--
1.7.10.4
Hello Alim,
On 11/12/2016 07:17 AM, Alim Akhtar wrote:
> This patch adds level for cpu dt node, so that these levels can be used
Do you mean s/level/label here? I'm asking because you are using level
consistently in the subject line and commit message but I'm not sure
what it means in this context.
> as a phandle whenever required. For example, adding a "interrupt-affinity"
> for arm pmu node.
>
> Signed-off-by: Alim Akhtar <[email protected]>
> ---
The change looks good to me though.
Reviewed-by: Javier Martinez Canillas <[email protected]>
Best regards,
--
Javier Martinez Canillas
Open Source Group
Samsung Research America
Hello Alim,
On 11/12/2016 07:17 AM, Alim Akhtar wrote:
> This patch adds ARM Performance Monitor Unit dt node for exynos7.
> PMU provides various statistics on the operation of the CPU and
> memory system at runtime, which are very useful when debugging or
> profiling code. This enables the same.
>
> Signed-off-by: Alim Akhtar <[email protected]>
> ---
> arch/arm64/boot/dts/exynos/exynos7.dtsi | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> Changes since v1:
> * Added "interrupt-affinity" property as per Robin Murphy review comment.
>
> diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> index 396ffb9..09e7a05b 100644
> --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
> +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> @@ -472,6 +472,16 @@
> status = "disabled";
> };
>
> + arm-pmu {
> + compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";
> + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>,
> + <&cpu_atlas2>, <&cpu_atlas3>;
> + };
> +
I didn't double check if these are the correct IRQs because I don't have
an Exynos7 user manual, but the change looks good to me.
Reviewed-by: Javier Martinez Canillas <[email protected]>
Best regards,
--
Javier Martinez Canillas
Open Source Group
Samsung Research America
Hi Javier,
On Sat, Nov 12, 2016 at 7:54 PM, Javier Martinez Canillas
<[email protected]> wrote:
> Hello Alim,
>
> On 11/12/2016 07:17 AM, Alim Akhtar wrote:
>> This patch adds level for cpu dt node, so that these levels can be used
>
> Do you mean s/level/label here? I'm asking because you are using level
> consistently in the subject line and commit message but I'm not sure
> what it means in this context.
>
Ah!! my bad. Its __label__. If required, will respin.
Thanks for review.
>> as a phandle whenever required. For example, adding a "interrupt-affinity"
>> for arm pmu node.
>>
>> Signed-off-by: Alim Akhtar <[email protected]>
>> ---
>
> The change looks good to me though.
>
> Reviewed-by: Javier Martinez Canillas <[email protected]>
>
> Best regards,
> --
> Javier Martinez Canillas
> Open Source Group
> Samsung Research America
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to [email protected]
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Regards,
Alim
On Sat, Nov 12, 2016 at 6:00 PM, Alim Akhtar <[email protected]> wrote:
> Hi Javier,
>
> On Sat, Nov 12, 2016 at 7:54 PM, Javier Martinez Canillas
> <[email protected]> wrote:
>> Hello Alim,
>>
>> On 11/12/2016 07:17 AM, Alim Akhtar wrote:
>>> This patch adds level for cpu dt node, so that these levels can be used
>>
>> Do you mean s/level/label here? I'm asking because you are using level
>> consistently in the subject line and commit message but I'm not sure
>> what it means in this context.
>>
>
> Ah!! my bad. Its __label__. If required, will respin.
> Thanks for review.
I think there is no need of respin because this should be squashed
with previous patch. This is quite small and there are no functional
changes here (labels are transparent, except of course conflict
cases). Without the 2/2, this patch does not have much sense yet.
Best regards,
Krzysztof
Hi Krzysztof,
On 11/13/2016 12:43 AM, Krzysztof Kozlowski wrote:
> On Sat, Nov 12, 2016 at 6:00 PM, Alim Akhtar <[email protected]> wrote:
>> Hi Javier,
>>
>> On Sat, Nov 12, 2016 at 7:54 PM, Javier Martinez Canillas
>> <[email protected]> wrote:
>>> Hello Alim,
>>>
>>> On 11/12/2016 07:17 AM, Alim Akhtar wrote:
>>>> This patch adds level for cpu dt node, so that these levels can be used
>>>
>>> Do you mean s/level/label here? I'm asking because you are using level
>>> consistently in the subject line and commit message but I'm not sure
>>> what it means in this context.
>>>
>>
>> Ah!! my bad. Its __label__. If required, will respin.
>> Thanks for review.
>
> I think there is no need of respin because this should be squashed
> with previous patch. This is quite small and there are no functional
> changes here (labels are transparent, except of course conflict
> cases). Without the 2/2, this patch does not have much sense yet.
>
The reason why I kept the _label_ changes are separate patch is to keep
git bisect happy. If you think there won't be a case for that, then lets
merge the two in single patch.
Let me know if you want me to respin or you will take care.
> Best regards,
> Krzysztof
>
>
>
On Sat, Nov 12, 2016 at 11:33:18AM -0300, Javier Martinez Canillas wrote:
> Hello Alim,
>
> On 11/12/2016 07:17 AM, Alim Akhtar wrote:
> > This patch adds ARM Performance Monitor Unit dt node for exynos7.
> > PMU provides various statistics on the operation of the CPU and
> > memory system at runtime, which are very useful when debugging or
> > profiling code. This enables the same.
> >
> > Signed-off-by: Alim Akhtar <[email protected]>
> > ---
> > arch/arm64/boot/dts/exynos/exynos7.dtsi | 10 ++++++++++
> > 1 file changed, 10 insertions(+)
> >
> > Changes since v1:
> > * Added "interrupt-affinity" property as per Robin Murphy review comment.
> >
> > diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> > index 396ffb9..09e7a05b 100644
> > --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi
> > +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi
> > @@ -472,6 +472,16 @@
> > status = "disabled";
> > };
> >
> > + arm-pmu {
> > + compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3";
> > + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>,
> > + <&cpu_atlas2>, <&cpu_atlas3>;
> > + };
> > +
>
> I didn't double check if these are the correct IRQs because I don't have
> an Exynos7 user manual, but the change looks good to me.
>
> Reviewed-by: Javier Martinez Canillas <[email protected]>
Squashed 1/2 with this and applied. Thanks!
Best regards,
Krzysztof