Add sdhc instance for supporting eMMC on QDU1000 and
QRU1000 SoCs.
Changes in v2-
* Updated the binding alphabetically.
* Removed extra comments as suggested by Bhupesh.
* Moved non-removable, no-sd, no-sdio and other properties from
soc to board dts file as suggested by Bhupesh and Konrad.
* Removed extra newlines and leading zeroes as suggested by Konrad.
* Modified sdhc1_opp_table.
* Updated the SDHC node entries alphabetically.
* Moved the status entry at the end.
Komal Bajaj (4):
dt-bindings: mmc: sdhci-msm: Document the QDU1000/QRU1000 compatible
arm: dts: qcom: qdu1000: Add SDHCI node
arm64: dts: qcom: qdu1000: Add SDHCI1 pin configuration to DTSI
arm64: dts: qcom: qdu1000-idp: add SDHCI for emmc
.../devicetree/bindings/mmc/sdhci-msm.yaml | 1 +
arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 23 ++++
arch/arm64/boot/dts/qcom/qdu1000.dtsi | 101 ++++++++++++++++++
3 files changed, 125 insertions(+)
--
2.17.1
Add sdhci node for emmc in qdu1000-idp.
Signed-off-by: Komal Bajaj <[email protected]>
---
arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
index 9e9fd4b8023e..61d8446a2d55 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
+++ b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
@@ -451,3 +451,26 @@
&uart7 {
status = "okay";
};
+
+&sdhc_1 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&sdc1_on_state>;
+ pinctrl-1 = <&sdc1_off_state>;
+
+ cap-mmc-hw-reset;
+ mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+
+ non-removable;
+ no-sd;
+ no-sdio;
+
+ supports-cqe;
+
+ vmmc-supply = <&vreg_l10a_2p95>;
+ vqmmc-supply = <&vreg_l7a_1p8>;
+
+ status = "okay";
+};
--
2.17.1
Add required pins for SDHCI1, so that the interface can work reliably.
Reviewed-by: Bhupesh Sharma <[email protected]>wq
Signed-off-by: Komal Bajaj <[email protected]>
---
arch/arm64/boot/dts/qcom/qdu1000.dtsi | 50 +++++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
index 38ee7115a35f..6f23cbfc024c 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
+++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
@@ -1151,6 +1151,56 @@
pins = "gpio31";
function = "gpio";
};
+
+ sdc1_on_state: sdc1-on-state {
+ clk-pins {
+ pins = "sdc1_clk";
+ drive-strength = <16>;
+ bias-disable;
+ };
+
+ cmd-pins {
+ pins = "sdc1_cmd";
+ drive-strength = <10>;
+ bias-pull-up;
+ };
+
+ data-pins {
+ pins = "sdc1_data";
+ drive-strength = <10>;
+ bias-pull-up;
+ };
+
+ rclk-pins {
+ pins = "sdc1_rclk";
+ bias-pull-down;
+ };
+ };
+
+ sdc1_off_state: sdc1-off-state {
+ clk-pins {
+ pins = "sdc1_clk";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cmd-pins {
+ pins = "sdc1_cmd";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ data-pins {
+ pins = "sdc1_data";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
+
+ rclk-pins {
+ pins = "sdc1_rclk";
+ bias-pull-down;
+ };
+ };
};
apps_smmu: iommu@15000000 {
--
2.17.1
On Mon, 22 May 2023 at 15:06, Komal Bajaj <[email protected]> wrote:
>
> Add required pins for SDHCI1, so that the interface can work reliably.
>
> Reviewed-by: Bhupesh Sharma <[email protected]>wq
Err.. an extra wq .. I think this can be fixed while applying, so
should not require a new version.
Thanks,
Bhupesh
> Signed-off-by: Komal Bajaj <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/qdu1000.dtsi | 50 +++++++++++++++++++++++++++
> 1 file changed, 50 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> index 38ee7115a35f..6f23cbfc024c 100644
> --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
> @@ -1151,6 +1151,56 @@
> pins = "gpio31";
> function = "gpio";
> };
> +
> + sdc1_on_state: sdc1-on-state {
> + clk-pins {
> + pins = "sdc1_clk";
> + drive-strength = <16>;
> + bias-disable;
> + };
> +
> + cmd-pins {
> + pins = "sdc1_cmd";
> + drive-strength = <10>;
> + bias-pull-up;
> + };
> +
> + data-pins {
> + pins = "sdc1_data";
> + drive-strength = <10>;
> + bias-pull-up;
> + };
> +
> + rclk-pins {
> + pins = "sdc1_rclk";
> + bias-pull-down;
> + };
> + };
> +
> + sdc1_off_state: sdc1-off-state {
> + clk-pins {
> + pins = "sdc1_clk";
> + drive-strength = <2>;
> + bias-disable;
> + };
> +
> + cmd-pins {
> + pins = "sdc1_cmd";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> +
> + data-pins {
> + pins = "sdc1_data";
> + drive-strength = <2>;
> + bias-pull-up;
> + };
> +
> + rclk-pins {
> + pins = "sdc1_rclk";
> + bias-pull-down;
> + };
> + };
> };
>
> apps_smmu: iommu@15000000 {
> --
> 2.17.1
>
On Mon, 22 May 2023 at 15:06, Komal Bajaj <[email protected]> wrote:
>
> Add sdhci node for emmc in qdu1000-idp.
>
> Signed-off-by: Komal Bajaj <[email protected]>
> ---
> arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> index 9e9fd4b8023e..61d8446a2d55 100644
> --- a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> +++ b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> @@ -451,3 +451,26 @@
> &uart7 {
> status = "okay";
> };
> +
> +&sdhc_1 {
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&sdc1_on_state>;
> + pinctrl-1 = <&sdc1_off_state>;
> +
> + cap-mmc-hw-reset;
> + mmc-ddr-1_8v;
> + mmc-hs200-1_8v;
> + mmc-hs400-1_8v;
> + mmc-hs400-enhanced-strobe;
> +
> + non-removable;
> + no-sd;
> + no-sdio;
> +
> + supports-cqe;
> +
> + vmmc-supply = <&vreg_l10a_2p95>;
> + vqmmc-supply = <&vreg_l7a_1p8>;
> +
> + status = "okay";
> +};
This node is out of alphabetical order again.
&uart7 would follow &sdhc_1 and so on...
Thanks,
Bhupesh
On 5/22/2023 3:23 PM, Bhupesh Sharma wrote:
> On Mon, 22 May 2023 at 15:06, Komal Bajaj <[email protected]> wrote:
>> Add sdhci node for emmc in qdu1000-idp.
>>
>> Signed-off-by: Komal Bajaj <[email protected]>
>> ---
>> arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 23 +++++++++++++++++++++++
>> 1 file changed, 23 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
>> index 9e9fd4b8023e..61d8446a2d55 100644
>> --- a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
>> +++ b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
>> @@ -451,3 +451,26 @@
>> &uart7 {
>> status = "okay";
>> };
>> +
>> +&sdhc_1 {
>> + pinctrl-names = "default", "sleep";
>> + pinctrl-0 = <&sdc1_on_state>;
>> + pinctrl-1 = <&sdc1_off_state>;
>> +
>> + cap-mmc-hw-reset;
>> + mmc-ddr-1_8v;
>> + mmc-hs200-1_8v;
>> + mmc-hs400-1_8v;
>> + mmc-hs400-enhanced-strobe;
>> +
>> + non-removable;
>> + no-sd;
>> + no-sdio;
>> +
>> + supports-cqe;
>> +
>> + vmmc-supply = <&vreg_l10a_2p95>;
>> + vqmmc-supply = <&vreg_l7a_1p8>;
>> +
>> + status = "okay";
>> +};
> This node is out of alphabetical order again.
> &uart7 would follow &sdhc_1 and so on...
Sure will change this next version.
Thanks
Komal
>
> Thanks,
> Bhupesh