TSENS IP v2.x supports critical interrupts and v2.3+ adds watchdog support
in case the FSM is stuck. Enable support in the driver.
This series was generated on top of linux-next from 20191202 to capture
const changes for msm8976 that is queued currently.
Changes from v2:
- Handle old DTBs w/o critical irq in the same way as fix sent for 5.5
Changes from v1:
- Make tsens_features non-const to allow run time detection of features
- Pass tsens_sensor around as a const
- Fix a bug to release dev pointer in success path
- Address review comments from Bjorn and Stephen (thanks for the review)
- Add msm8998 and msm8996 DTSI changes for critical interrupts
Amit Kucheria (9):
drivers: thermal: tsens: De-constify struct tsens_features
drivers: thermal: tsens: Pass around struct tsens_sensor as a constant
drivers: thermal: tsens: use simpler variables
drivers: thermal: tsens: Release device in success path
drivers: thermal: tsens: Add critical interrupt support
drivers: thermal: tsens: Add watchdog support
arm64: dts: sdm845: thermal: Add critical interrupt support
arm64: dts: msm8996: thermal: Add critical interrupt support
arm64: dts: msm8998: thermal: Add critical interrupt support
arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 +-
arch/arm64/boot/dts/qcom/msm8998.dtsi | 10 +-
arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 +-
drivers/thermal/qcom/tsens-8960.c | 4 +-
drivers/thermal/qcom/tsens-common.c | 188 +++++++++++++++++++++++---
drivers/thermal/qcom/tsens-v0_1.c | 6 +-
drivers/thermal/qcom/tsens-v1.c | 6 +-
drivers/thermal/qcom/tsens-v2.c | 24 +++-
drivers/thermal/qcom/tsens.c | 24 +++-
drivers/thermal/qcom/tsens.h | 104 ++++++++++++--
10 files changed, 330 insertions(+), 56 deletions(-)
--
2.20.1
We don't currently call put_device in case of successfully initialising
the device.
Allow control to fall through so we can use same code for success and
error paths to put_device.
Signed-off-by: Amit Kucheria <[email protected]>
---
drivers/thermal/qcom/tsens-common.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c
index 1cbc5a6e5b4f..e84e94a6f1a7 100644
--- a/drivers/thermal/qcom/tsens-common.c
+++ b/drivers/thermal/qcom/tsens-common.c
@@ -687,8 +687,6 @@ int __init init_common(struct tsens_priv *priv)
tsens_enable_irq(priv);
tsens_debug_init(op);
- return 0;
-
err_put_device:
put_device(&op->dev);
return ret;
--
2.20.1
TSENS IP v2.x adds critical threshold interrupt support for each sensor
in addition to the upper/lower threshold interrupt. Add support in the
driver.
Signed-off-by: Amit Kucheria <[email protected]>
---
drivers/thermal/qcom/tsens-common.c | 126 ++++++++++++++++++++++++++--
drivers/thermal/qcom/tsens-v2.c | 8 +-
drivers/thermal/qcom/tsens.c | 24 +++++-
drivers/thermal/qcom/tsens.h | 72 ++++++++++++++++
4 files changed, 219 insertions(+), 11 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c
index e84e94a6f1a7..4cf550766cf6 100644
--- a/drivers/thermal/qcom/tsens-common.c
+++ b/drivers/thermal/qcom/tsens-common.c
@@ -23,6 +23,10 @@
* @low_thresh: lower threshold temperature value
* @low_irq_mask: mask register for lower threshold irqs
* @low_irq_clear: clear register for lower threshold irqs
+ * @crit_viol: critical threshold violated
+ * @crit_thresh: critical threshold temperature value
+ * @crit_irq_mask: mask register for critical threshold irqs
+ * @crit_irq_clear: clear register for critical threshold irqs
*
* Structure containing data about temperature threshold settings and
* irq status if they were violated.
@@ -36,6 +40,10 @@ struct tsens_irq_data {
int low_thresh;
u32 low_irq_mask;
u32 low_irq_clear;
+ u32 crit_viol;
+ u32 crit_thresh;
+ u32 crit_irq_mask;
+ u32 crit_irq_clear;
};
char *qfprom_read(struct device *dev, const char *cname)
@@ -189,6 +197,9 @@ static void tsens_set_interrupt_v1(struct tsens_priv *priv, u32 hw_id,
case LOWER:
index = LOW_INT_CLEAR_0 + hw_id;
break;
+ case CRITICAL:
+ /* No critical interrupts before v2 */
+ break;
}
regmap_field_write(priv->rf[index], enable ? 0 : 1);
}
@@ -214,6 +225,10 @@ static void tsens_set_interrupt_v2(struct tsens_priv *priv, u32 hw_id,
index_mask = LOW_INT_MASK_0 + hw_id;
index_clear = LOW_INT_CLEAR_0 + hw_id;
break;
+ case CRITICAL:
+ index_mask = CRIT_INT_MASK_0 + hw_id;
+ index_clear = CRIT_INT_CLEAR_0 + hw_id;
+ break;
}
if (enable) {
@@ -268,7 +283,14 @@ static int tsens_threshold_violated(struct tsens_priv *priv, u32 hw_id,
ret = regmap_field_read(priv->rf[LOWER_STATUS_0 + hw_id], &d->low_viol);
if (ret)
return ret;
- if (d->up_viol || d->low_viol)
+
+ if (priv->feat->crit_int) {
+ ret = regmap_field_read(priv->rf[CRITICAL_STATUS_0 + hw_id], &d->crit_viol);
+ if (ret)
+ return ret;
+ }
+
+ if (d->up_viol || d->low_viol || d->crit_viol)
return 1;
return 0;
@@ -292,22 +314,36 @@ static int tsens_read_irq_state(struct tsens_priv *priv, u32 hw_id,
ret = regmap_field_read(priv->rf[LOW_INT_MASK_0 + hw_id], &d->low_irq_mask);
if (ret)
return ret;
+ ret = regmap_field_read(priv->rf[CRIT_INT_CLEAR_0 + hw_id], &d->crit_irq_clear);
+ if (ret)
+ return ret;
+ ret = regmap_field_read(priv->rf[CRIT_INT_MASK_0 + hw_id], &d->crit_irq_mask);
+ if (ret)
+ return ret;
+
+ d->crit_thresh = tsens_hw_to_mC(s, CRIT_THRESH_0 + hw_id);
} else {
/* No mask register on older TSENS */
d->up_irq_mask = 0;
d->low_irq_mask = 0;
+ d->crit_irq_clear = 0;
+ d->crit_irq_mask = 0;
+ d->crit_thresh = 0;
}
d->up_thresh = tsens_hw_to_mC(s, UP_THRESH_0 + hw_id);
d->low_thresh = tsens_hw_to_mC(s, LOW_THRESH_0 + hw_id);
- dev_dbg(priv->dev, "[%u] %s%s: status(%u|%u) | clr(%u|%u) | mask(%u|%u)\n",
- hw_id, __func__, (d->up_viol || d->low_viol) ? "(V)" : "",
- d->low_viol, d->up_viol, d->low_irq_clear, d->up_irq_clear,
- d->low_irq_mask, d->up_irq_mask);
- dev_dbg(priv->dev, "[%u] %s%s: thresh: (%d:%d)\n", hw_id, __func__,
- (d->up_viol || d->low_viol) ? "(violation)" : "",
- d->low_thresh, d->up_thresh);
+ dev_dbg(priv->dev, "[%u] %s%s: status(%u|%u|%u) |"
+ " clr(%u|%u|%u) | mask(%u|%u|%u)\n",
+ hw_id, __func__,
+ (d->up_viol || d->low_viol || d->crit_viol) ? "(V)" : "",
+ d->low_viol, d->up_viol, d->crit_viol,
+ d->low_irq_clear, d->up_irq_clear, d->crit_irq_clear,
+ d->low_irq_mask, d->up_irq_mask, d->crit_irq_mask);
+ dev_dbg(priv->dev, "[%u] %s%s: thresh: (%d:%d:%d)\n", hw_id, __func__,
+ (d->up_viol || d->low_viol || d->crit_viol) ? "(V)" : "",
+ d->low_thresh, d->up_thresh, d->crit_thresh);
return 0;
}
@@ -321,6 +357,64 @@ static inline u32 masked_irq(u32 hw_id, u32 mask, enum tsens_ver ver)
return 0;
}
+/**
+ * tsens_critical_irq_thread - Threaded interrupt handler for critical interrupts
+ * @irq: irq number
+ * @data: tsens controller private data
+ *
+ * Check all sensors to find ones that violated their critical threshold limits.
+ * Clear and then re-enable the interrupt.
+ *
+ * The level-triggered interrupt might deassert if the temperature returned to
+ * within the threshold limits by the time the handler got scheduled. We
+ * consider the irq to have been handled in that case.
+ *
+ * Return: IRQ_HANDLED
+ */
+irqreturn_t tsens_critical_irq_thread(int irq, void *data)
+{
+ struct tsens_priv *priv = data;
+ struct tsens_irq_data d;
+ unsigned long flags;
+ int temp, ret, i;
+
+ for (i = 0; i < priv->num_sensors; i++) {
+ const struct tsens_sensor *s = &priv->sensor[i];
+ u32 hw_id = s->hw_id;
+
+ if (IS_ERR(s->tzd))
+ continue;
+ if (!tsens_threshold_violated(priv, hw_id, &d))
+ continue;
+ ret = get_temp_tsens_valid(s, &temp);
+ if (ret) {
+ dev_err(priv->dev, "[%u] %s: error reading sensor\n", hw_id, __func__);
+ continue;
+ }
+
+ spin_lock_irqsave(&priv->ul_lock, flags);
+
+ tsens_read_irq_state(priv, hw_id, s, &d);
+
+ if (d.crit_viol &&
+ !masked_irq(hw_id, d.crit_irq_mask, tsens_version(priv))) {
+ tsens_set_interrupt(priv, hw_id, CRITICAL, false);
+ if (d.crit_thresh > temp) {
+ dev_dbg(priv->dev, "[%u] %s: re-arm upper\n",
+ hw_id, __func__);
+ } else {
+ dev_dbg(priv->dev, "[%u] %s: TZ update trigger (%d mC)\n",
+ hw_id, __func__, temp);
+ }
+ tsens_set_interrupt(priv, hw_id, CRITICAL, true);
+ }
+
+ spin_unlock_irqrestore(&priv->crit_lock, flags);
+ }
+
+ return IRQ_HANDLED;
+}
+
/**
* tsens_irq_thread - Threaded interrupt handler for uplow interrupts
* @irq: irq number
@@ -683,6 +777,22 @@ int __init init_common(struct tsens_priv *priv)
}
}
+ if (priv->feat->crit_int) {
+ /* This loop might need changes if enum regfield_ids is reordered */
+ for (j = CRITICAL_STATUS_0; j <= CRIT_THRESH_15; j += 16) {
+ for (i = 0; i < priv->feat->max_sensors; i++) {
+ int idx = j + i;
+
+ priv->rf[idx] = devm_regmap_field_alloc(dev, priv->tm_map,
+ priv->fields[idx]);
+ if (IS_ERR(priv->rf[idx])) {
+ ret = PTR_ERR(priv->rf[idx]);
+ goto err_put_device;
+ }
+ }
+ }
+ }
+
spin_lock_init(&priv->ul_lock);
tsens_enable_irq(priv);
tsens_debug_init(op);
diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c
index f1c8ec62e69f..ce5ef0055d13 100644
--- a/drivers/thermal/qcom/tsens-v2.c
+++ b/drivers/thermal/qcom/tsens-v2.c
@@ -51,8 +51,9 @@ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
[INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 2),
/* TEMPERATURE THRESHOLDS */
- REG_FIELD_FOR_EACH_SENSOR16(LOW_THRESH, TM_Sn_UPPER_LOWER_THRESHOLD_OFF, 0, 11),
- REG_FIELD_FOR_EACH_SENSOR16(UP_THRESH, TM_Sn_UPPER_LOWER_THRESHOLD_OFF, 12, 23),
+ REG_FIELD_FOR_EACH_SENSOR16(LOW_THRESH, TM_Sn_UPPER_LOWER_THRESHOLD_OFF, 0, 11),
+ REG_FIELD_FOR_EACH_SENSOR16(UP_THRESH, TM_Sn_UPPER_LOWER_THRESHOLD_OFF, 12, 23),
+ REG_FIELD_FOR_EACH_SENSOR16(CRIT_THRESH, TM_Sn_CRITICAL_THRESHOLD_OFF, 0, 11),
/* INTERRUPTS [CLEAR/STATUS/MASK] */
REG_FIELD_SPLIT_BITS_0_15(LOW_INT_STATUS, TM_UPPER_LOWER_INT_STATUS_OFF),
@@ -61,6 +62,9 @@ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
REG_FIELD_SPLIT_BITS_16_31(UP_INT_STATUS, TM_UPPER_LOWER_INT_STATUS_OFF),
REG_FIELD_SPLIT_BITS_16_31(UP_INT_CLEAR, TM_UPPER_LOWER_INT_CLEAR_OFF),
REG_FIELD_SPLIT_BITS_16_31(UP_INT_MASK, TM_UPPER_LOWER_INT_MASK_OFF),
+ REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_STATUS, TM_CRITICAL_INT_STATUS_OFF),
+ REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_CLEAR, TM_CRITICAL_INT_CLEAR_OFF),
+ REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_MASK, TM_CRITICAL_INT_MASK_OFF),
/* Sn_STATUS */
REG_FIELD_FOR_EACH_SENSOR16(LAST_TEMP, TM_Sn_STATUS_OFF, 0, 11),
diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
index 0e7cf5236932..c361661779c4 100644
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
@@ -87,7 +87,7 @@ static const struct thermal_zone_of_device_ops tsens_of_ops = {
static int tsens_register(struct tsens_priv *priv)
{
- int i, ret, irq;
+ int i, ret, irq, irq_crit;
struct thermal_zone_device *tzd;
struct platform_device *pdev;
@@ -125,6 +125,28 @@ static int tsens_register(struct tsens_priv *priv)
goto err_put_device;
}
+ if (priv->feat->crit_int) {
+ irq_crit = platform_get_irq_byname(pdev, "critical");
+ if (irq_crit < 0) {
+ ret = irq_crit;
+ /* For old DTs with no IRQ defined */
+ if (irq_crit == -ENXIO)
+ ret = 0;
+ goto err_crit_int;
+ }
+ ret = devm_request_threaded_irq(&pdev->dev, irq_crit,
+ NULL, tsens_critical_irq_thread,
+ IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
+ dev_name(&pdev->dev), priv);
+ if (ret) {
+ dev_err(&pdev->dev, "%s: failed to get critical irq\n", __func__);
+ goto err_crit_int;
+ }
+
+ enable_irq_wake(irq_crit);
+ }
+
+err_crit_int:
enable_irq_wake(irq);
err_put_device:
diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h
index 70dc34c80537..05d5f7317868 100644
--- a/drivers/thermal/qcom/tsens.h
+++ b/drivers/thermal/qcom/tsens.h
@@ -23,6 +23,7 @@
struct tsens_priv;
+/* IP version numbers in ascending order */
enum tsens_ver {
VER_0_1 = 0,
VER_1_X,
@@ -32,6 +33,7 @@ enum tsens_ver {
enum tsens_irq_type {
LOWER,
UPPER,
+ CRITICAL,
};
/**
@@ -374,6 +376,70 @@ enum regfield_ids {
CRITICAL_STATUS_13,
CRITICAL_STATUS_14,
CRITICAL_STATUS_15,
+ CRIT_INT_STATUS_0, /* CRITICAL interrupt status */
+ CRIT_INT_STATUS_1,
+ CRIT_INT_STATUS_2,
+ CRIT_INT_STATUS_3,
+ CRIT_INT_STATUS_4,
+ CRIT_INT_STATUS_5,
+ CRIT_INT_STATUS_6,
+ CRIT_INT_STATUS_7,
+ CRIT_INT_STATUS_8,
+ CRIT_INT_STATUS_9,
+ CRIT_INT_STATUS_10,
+ CRIT_INT_STATUS_11,
+ CRIT_INT_STATUS_12,
+ CRIT_INT_STATUS_13,
+ CRIT_INT_STATUS_14,
+ CRIT_INT_STATUS_15,
+ CRIT_INT_CLEAR_0, /* CRITICAL interrupt clear */
+ CRIT_INT_CLEAR_1,
+ CRIT_INT_CLEAR_2,
+ CRIT_INT_CLEAR_3,
+ CRIT_INT_CLEAR_4,
+ CRIT_INT_CLEAR_5,
+ CRIT_INT_CLEAR_6,
+ CRIT_INT_CLEAR_7,
+ CRIT_INT_CLEAR_8,
+ CRIT_INT_CLEAR_9,
+ CRIT_INT_CLEAR_10,
+ CRIT_INT_CLEAR_11,
+ CRIT_INT_CLEAR_12,
+ CRIT_INT_CLEAR_13,
+ CRIT_INT_CLEAR_14,
+ CRIT_INT_CLEAR_15,
+ CRIT_INT_MASK_0, /* CRITICAL interrupt mask */
+ CRIT_INT_MASK_1,
+ CRIT_INT_MASK_2,
+ CRIT_INT_MASK_3,
+ CRIT_INT_MASK_4,
+ CRIT_INT_MASK_5,
+ CRIT_INT_MASK_6,
+ CRIT_INT_MASK_7,
+ CRIT_INT_MASK_8,
+ CRIT_INT_MASK_9,
+ CRIT_INT_MASK_10,
+ CRIT_INT_MASK_11,
+ CRIT_INT_MASK_12,
+ CRIT_INT_MASK_13,
+ CRIT_INT_MASK_14,
+ CRIT_INT_MASK_15,
+ CRIT_THRESH_0, /* CRITICAL threshold values */
+ CRIT_THRESH_1,
+ CRIT_THRESH_2,
+ CRIT_THRESH_3,
+ CRIT_THRESH_4,
+ CRIT_THRESH_5,
+ CRIT_THRESH_6,
+ CRIT_THRESH_7,
+ CRIT_THRESH_8,
+ CRIT_THRESH_9,
+ CRIT_THRESH_10,
+ CRIT_THRESH_11,
+ CRIT_THRESH_12,
+ CRIT_THRESH_13,
+ CRIT_THRESH_14,
+ CRIT_THRESH_15,
MIN_STATUS_0, /* MIN threshold violated */
MIN_STATUS_1,
MIN_STATUS_2,
@@ -460,6 +526,8 @@ struct tsens_context {
* @srot_map: pointer to SROT register address space
* @tm_offset: deal with old device trees that don't address TM and SROT
* address space separately
+ * @ul_lock: lock while processing upper/lower threshold interrupts
+ * @crit_lock: lock while processing critical threshold interrupts
* @rf: array of regmap_fields used to store value of the field
* @ctx: registers to be saved and restored during suspend/resume
* @feat: features of the IP
@@ -479,6 +547,9 @@ struct tsens_priv {
/* lock for upper/lower threshold interrupts */
spinlock_t ul_lock;
+ /* lock for critical threshold interrupts */
+ spinlock_t crit_lock;
+
struct regmap_field *rf[MAX_REGFIELDS];
struct tsens_context ctx;
struct tsens_features *feat;
@@ -500,6 +571,7 @@ int tsens_enable_irq(struct tsens_priv *priv);
void tsens_disable_irq(struct tsens_priv *priv);
int tsens_set_trips(void *_sensor, int low, int high);
irqreturn_t tsens_irq_thread(int irq, void *data);
+irqreturn_t tsens_critical_irq_thread(int irq, void *data);
/* TSENS target */
extern struct tsens_plat_data data_8960;
--
2.20.1
TSENS IP v2.3 onwards adds support for a watchdog to detect if the TSENS
HW FSM is stuck. Add support to detect and restart the FSM in the
driver. The watchdog is configured by the bootloader, we just enable the
feature in the kernel.
Signed-off-by: Amit Kucheria <[email protected]>
---
drivers/thermal/qcom/tsens-common.c | 38 +++++++++++++++++++++++++++++
drivers/thermal/qcom/tsens-v2.c | 10 ++++++++
drivers/thermal/qcom/tsens.h | 14 +++++++++++
3 files changed, 62 insertions(+)
diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c
index 4cf550766cf6..ecbc722eb348 100644
--- a/drivers/thermal/qcom/tsens-common.c
+++ b/drivers/thermal/qcom/tsens-common.c
@@ -377,6 +377,24 @@ irqreturn_t tsens_critical_irq_thread(int irq, void *data)
struct tsens_irq_data d;
unsigned long flags;
int temp, ret, i;
+ u32 wdog_status, wdog_count;
+
+ if (priv->feat->has_watchdog) {
+ /* Watchdog is present only on v2.3+ */
+ ret = regmap_field_read(priv->rf[WDOG_BARK_STATUS], &wdog_status);
+ if (ret)
+ return ret;
+
+ /* Clear WDOG interrupt */
+ regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 1);
+ regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 0);
+
+ ret = regmap_field_read(priv->rf[WDOG_BARK_COUNT], &wdog_count);
+ if (ret)
+ return ret;
+ if (wdog_count)
+ dev_dbg(priv->dev, "%s: watchdog count: %d\n", __func__, wdog_count);
+ }
for (i = 0; i < priv->num_sensors; i++) {
const struct tsens_sensor *s = &priv->sensor[i];
@@ -684,6 +702,7 @@ int __init init_common(struct tsens_priv *priv)
{
void __iomem *tm_base, *srot_base;
struct device *dev = priv->dev;
+ u32 ver_minor;
struct resource *res;
u32 enabled;
int ret, i, j;
@@ -733,6 +752,9 @@ int __init init_common(struct tsens_priv *priv)
if (IS_ERR(priv->rf[i]))
return PTR_ERR(priv->rf[i]);
}
+ ret = regmap_field_read(priv->rf[VER_MINOR], &ver_minor);
+ if (ret)
+ goto err_put_device;
}
priv->rf[TSENS_EN] = devm_regmap_field_alloc(dev, priv->srot_map,
@@ -793,6 +815,22 @@ int __init init_common(struct tsens_priv *priv)
}
}
+ if (tsens_version(priv) > VER_1_X && ver_minor > 2) {
+ /* Watchdog is present only on v2.3+ */
+ priv->feat->has_watchdog = 1;
+ for (i = WDOG_BARK_STATUS; i <= CC_MON_MASK; i++) {
+ priv->rf[i] = devm_regmap_field_alloc(dev, priv->tm_map,
+ priv->fields[i]);
+ if (IS_ERR(priv->rf[i])) {
+ ret = PTR_ERR(priv->rf[i]);
+ goto err_put_device;
+ }
+ }
+ /* Enable WDOG and disable cycle completion monitoring */
+ regmap_field_write(priv->rf[WDOG_BARK_MASK], 0);
+ regmap_field_write(priv->rf[CC_MON_MASK], 1);
+ }
+
spin_lock_init(&priv->ul_lock);
tsens_enable_irq(priv);
tsens_debug_init(op);
diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c
index ce5ef0055d13..b293ed32174b 100644
--- a/drivers/thermal/qcom/tsens-v2.c
+++ b/drivers/thermal/qcom/tsens-v2.c
@@ -24,6 +24,7 @@
#define TM_Sn_CRITICAL_THRESHOLD_OFF 0x0060
#define TM_Sn_STATUS_OFF 0x00a0
#define TM_TRDY_OFF 0x00e4
+#define TM_WDOG_LOG_OFF 0x013c
/* v2.x: 8996, 8998, sdm845 */
@@ -66,6 +67,15 @@ static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_CLEAR, TM_CRITICAL_INT_CLEAR_OFF),
REG_FIELD_SPLIT_BITS_0_15(CRIT_INT_MASK, TM_CRITICAL_INT_MASK_OFF),
+ /* WATCHDOG on v2.3 or later */
+ [WDOG_BARK_STATUS] = REG_FIELD(TM_CRITICAL_INT_STATUS_OFF, 31, 31),
+ [WDOG_BARK_CLEAR] = REG_FIELD(TM_CRITICAL_INT_CLEAR_OFF, 31, 31),
+ [WDOG_BARK_MASK] = REG_FIELD(TM_CRITICAL_INT_MASK_OFF, 31, 31),
+ [CC_MON_STATUS] = REG_FIELD(TM_CRITICAL_INT_STATUS_OFF, 30, 30),
+ [CC_MON_CLEAR] = REG_FIELD(TM_CRITICAL_INT_CLEAR_OFF, 30, 30),
+ [CC_MON_MASK] = REG_FIELD(TM_CRITICAL_INT_MASK_OFF, 30, 30),
+ [WDOG_BARK_COUNT] = REG_FIELD(TM_WDOG_LOG_OFF, 0, 7),
+
/* Sn_STATUS */
REG_FIELD_FOR_EACH_SENSOR16(LAST_TEMP, TM_Sn_STATUS_OFF, 0, 11),
REG_FIELD_FOR_EACH_SENSOR16(VALID, TM_Sn_STATUS_OFF, 21, 21),
diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h
index 05d5f7317868..f93f7509a5a4 100644
--- a/drivers/thermal/qcom/tsens.h
+++ b/drivers/thermal/qcom/tsens.h
@@ -440,6 +440,18 @@ enum regfield_ids {
CRIT_THRESH_13,
CRIT_THRESH_14,
CRIT_THRESH_15,
+
+ /* WATCHDOG */
+ WDOG_BARK_STATUS,
+ WDOG_BARK_CLEAR,
+ WDOG_BARK_MASK,
+ WDOG_BARK_COUNT,
+
+ /* CYCLE COMPLETION MONITOR */
+ CC_MON_STATUS,
+ CC_MON_CLEAR,
+ CC_MON_MASK,
+
MIN_STATUS_0, /* MIN threshold violated */
MIN_STATUS_1,
MIN_STATUS_2,
@@ -484,6 +496,7 @@ enum regfield_ids {
* @adc: do the sensors only output adc code (instead of temperature)?
* @srot_split: does the IP neatly splits the register space into SROT and TM,
* with SROT only being available to secure boot firmware?
+ * @has_watchdog: does this IP support watchdog functionality?
* @max_sensors: maximum sensors supported by this version of the IP
*/
struct tsens_features {
@@ -491,6 +504,7 @@ struct tsens_features {
unsigned int crit_int:1;
unsigned int adc:1;
unsigned int srot_split:1;
+ unsigned int has_watchdog:1;
unsigned int max_sensors;
};
--
2.20.1
Register critical interrupts for each of the two tsens controllers
Signed-off-by: Amit Kucheria <[email protected]>
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 4ca2e7b44559..fec0e50fe4fa 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -591,8 +591,9 @@
reg = <0x4a9000 0x1000>, /* TM */
<0x4a8000 0x1000>; /* SROT */
#qcom,sensors = <13>;
- interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "uplow";
+ interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow", "critical";
#thermal-sensor-cells = <1>;
};
@@ -601,8 +602,9 @@
reg = <0x4ad000 0x1000>, /* TM */
<0x4ac000 0x1000>; /* SROT */
#qcom,sensors = <8>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "uplow";
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow", "critical";
#thermal-sensor-cells = <1>;
};
--
2.20.1
Register critical interrupts for each of the two tsens controllers
Signed-off-by: Amit Kucheria <[email protected]>
Link: https://lore.kernel.org/r/3686bd40c99692feb955e936b608b080e2cb1826.1568624011.git.amit.kucheria@linaro.org
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index ddb1f23c936f..8986553cf2eb 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2950,8 +2950,9 @@
reg = <0 0x0c263000 0 0x1ff>, /* TM */
<0 0x0c222000 0 0x1ff>; /* SROT */
#qcom,sensors = <13>;
- interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "uplow";
+ interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow", "critical";
#thermal-sensor-cells = <1>;
};
@@ -2960,8 +2961,9 @@
reg = <0 0x0c265000 0 0x1ff>, /* TM */
<0 0x0c223000 0 0x1ff>; /* SROT */
#qcom,sensors = <8>;
- interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "uplow";
+ interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow", "critical";
#thermal-sensor-cells = <1>;
};
--
2.20.1
We already dereference the sensor and save it into a variable. Use the
variable directly to make the code easier to read.
Signed-off-by: Amit Kucheria <[email protected]>
---
drivers/thermal/qcom/tsens-common.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c
index c2df30a08b9e..1cbc5a6e5b4f 100644
--- a/drivers/thermal/qcom/tsens-common.c
+++ b/drivers/thermal/qcom/tsens-common.c
@@ -368,7 +368,7 @@ irqreturn_t tsens_irq_thread(int irq, void *data)
tsens_set_interrupt(priv, hw_id, UPPER, disable);
if (d.up_thresh > temp) {
dev_dbg(priv->dev, "[%u] %s: re-arm upper\n",
- priv->sensor[i].hw_id, __func__);
+ hw_id, __func__);
tsens_set_interrupt(priv, hw_id, UPPER, enable);
} else {
trigger = true;
@@ -379,7 +379,7 @@ irqreturn_t tsens_irq_thread(int irq, void *data)
tsens_set_interrupt(priv, hw_id, LOWER, disable);
if (d.low_thresh < temp) {
dev_dbg(priv->dev, "[%u] %s: re-arm low\n",
- priv->sensor[i].hw_id, __func__);
+ hw_id, __func__);
tsens_set_interrupt(priv, hw_id, LOWER, enable);
} else {
trigger = true;
@@ -392,7 +392,7 @@ irqreturn_t tsens_irq_thread(int irq, void *data)
if (trigger) {
dev_dbg(priv->dev, "[%u] %s: TZ update trigger (%d mC)\n",
hw_id, __func__, temp);
- thermal_zone_device_update(priv->sensor[i].tzd,
+ thermal_zone_device_update(s->tzd,
THERMAL_EVENT_UNSPECIFIED);
} else {
dev_dbg(priv->dev, "[%u] %s: no violation: %d\n",
@@ -435,7 +435,7 @@ int tsens_set_trips(void *_sensor, int low, int high)
spin_unlock_irqrestore(&priv->ul_lock, flags);
dev_dbg(dev, "[%u] %s: (%d:%d)->(%d:%d)\n",
- s->hw_id, __func__, d.low_thresh, d.up_thresh, cl_low, cl_high);
+ hw_id, __func__, d.low_thresh, d.up_thresh, cl_low, cl_high);
return 0;
}
--
2.20.1
Register critical interrupts for each of the two tsens controllers
Signed-off-by: Amit Kucheria <[email protected]>
---
arch/arm64/boot/dts/qcom/msm8998.dtsi | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi
index fc7838ea9a01..4b786b8651a9 100644
--- a/arch/arm64/boot/dts/qcom/msm8998.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi
@@ -817,8 +817,9 @@
reg = <0x010ab000 0x1000>, /* TM */
<0x010aa000 0x1000>; /* SROT */
#qcom,sensors = <14>;
- interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "uplow";
+ interrupts = <GIC_SPI 458 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow", "critical";
#thermal-sensor-cells = <1>;
};
@@ -827,8 +828,9 @@
reg = <0x010ae000 0x1000>, /* TM */
<0x010ad000 0x1000>; /* SROT */
#qcom,sensors = <8>;
- interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "uplow";
+ interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "uplow", "critical";
#thermal-sensor-cells = <1>;
};
--
2.20.1
On Thu 02 Jan 06:54 PST 2020, Amit Kucheria wrote:
> We already dereference the sensor and save it into a variable. Use the
> variable directly to make the code easier to read.
>
Reviewed-by: Bjorn Andersson <[email protected]>
> Signed-off-by: Amit Kucheria <[email protected]>
> ---
> drivers/thermal/qcom/tsens-common.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c
> index c2df30a08b9e..1cbc5a6e5b4f 100644
> --- a/drivers/thermal/qcom/tsens-common.c
> +++ b/drivers/thermal/qcom/tsens-common.c
> @@ -368,7 +368,7 @@ irqreturn_t tsens_irq_thread(int irq, void *data)
> tsens_set_interrupt(priv, hw_id, UPPER, disable);
> if (d.up_thresh > temp) {
> dev_dbg(priv->dev, "[%u] %s: re-arm upper\n",
> - priv->sensor[i].hw_id, __func__);
> + hw_id, __func__);
> tsens_set_interrupt(priv, hw_id, UPPER, enable);
> } else {
> trigger = true;
> @@ -379,7 +379,7 @@ irqreturn_t tsens_irq_thread(int irq, void *data)
> tsens_set_interrupt(priv, hw_id, LOWER, disable);
> if (d.low_thresh < temp) {
> dev_dbg(priv->dev, "[%u] %s: re-arm low\n",
> - priv->sensor[i].hw_id, __func__);
> + hw_id, __func__);
> tsens_set_interrupt(priv, hw_id, LOWER, enable);
> } else {
> trigger = true;
> @@ -392,7 +392,7 @@ irqreturn_t tsens_irq_thread(int irq, void *data)
> if (trigger) {
> dev_dbg(priv->dev, "[%u] %s: TZ update trigger (%d mC)\n",
> hw_id, __func__, temp);
> - thermal_zone_device_update(priv->sensor[i].tzd,
> + thermal_zone_device_update(s->tzd,
> THERMAL_EVENT_UNSPECIFIED);
> } else {
> dev_dbg(priv->dev, "[%u] %s: no violation: %d\n",
> @@ -435,7 +435,7 @@ int tsens_set_trips(void *_sensor, int low, int high)
> spin_unlock_irqrestore(&priv->ul_lock, flags);
>
> dev_dbg(dev, "[%u] %s: (%d:%d)->(%d:%d)\n",
> - s->hw_id, __func__, d.low_thresh, d.up_thresh, cl_low, cl_high);
> + hw_id, __func__, d.low_thresh, d.up_thresh, cl_low, cl_high);
>
> return 0;
> }
> --
> 2.20.1
>
On Thu 02 Jan 06:54 PST 2020, Amit Kucheria wrote:
> We don't currently call put_device in case of successfully initialising
> the device.
>
> Allow control to fall through so we can use same code for success and
> error paths to put_device.
>
Given the relationship between priv->dev and op I think this wouldn't be
a problem in practice, but there's two devm_ioremap_resource() done on
op->dev in this function. So you're depending on op->dev to stick
around, but with this patch you're no longer expressing that dependency.
That said, it looks iffy to do devm_ioremap_resource() on op->dev and
then create a regmap on priv->dev using that resource. So I think it
would be better to do platform_get_source() on op, and then
devm_ioremap_resource() on priv->dev, in which case the regmap backing
memory will be related to the same struct device as the regmap and it
makes perfect sense to put_device() the op->dev when you're done
inspecting it's resources.
Regards,
Bjorn
> Signed-off-by: Amit Kucheria <[email protected]>
> ---
> drivers/thermal/qcom/tsens-common.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c
> index 1cbc5a6e5b4f..e84e94a6f1a7 100644
> --- a/drivers/thermal/qcom/tsens-common.c
> +++ b/drivers/thermal/qcom/tsens-common.c
> @@ -687,8 +687,6 @@ int __init init_common(struct tsens_priv *priv)
> tsens_enable_irq(priv);
> tsens_debug_init(op);
>
> - return 0;
> -
> err_put_device:
> put_device(&op->dev);
> return ret;
> --
> 2.20.1
>
On Thu 02 Jan 06:54 PST 2020, Amit Kucheria wrote:
[..]
> @@ -189,6 +197,9 @@ static void tsens_set_interrupt_v1(struct tsens_priv *priv, u32 hw_id,
> case LOWER:
> index = LOW_INT_CLEAR_0 + hw_id;
> break;
> + case CRITICAL:
> + /* No critical interrupts before v2 */
> + break;
You need to break harder, right now you're just attempting to write
"enable" to VER_MAJOR in this case.
> }
> regmap_field_write(priv->rf[index], enable ? 0 : 1);
> }
[..]
> @@ -321,6 +357,64 @@ static inline u32 masked_irq(u32 hw_id, u32 mask, enum tsens_ver ver)
> return 0;
> }
>
> +/**
> + * tsens_critical_irq_thread - Threaded interrupt handler for critical interrupts
() on the function name to denote it being a function.
> + * @irq: irq number
> + * @data: tsens controller private data
> + *
> + * Check all sensors to find ones that violated their critical threshold limits.
> + * Clear and then re-enable the interrupt.
> + *
> + * The level-triggered interrupt might deassert if the temperature returned to
> + * within the threshold limits by the time the handler got scheduled. We
> + * consider the irq to have been handled in that case.
> + *
> + * Return: IRQ_HANDLED
> + */
> +irqreturn_t tsens_critical_irq_thread(int irq, void *data)
> +{
> + struct tsens_priv *priv = data;
> + struct tsens_irq_data d;
> + unsigned long flags;
> + int temp, ret, i;
> +
> + for (i = 0; i < priv->num_sensors; i++) {
> + const struct tsens_sensor *s = &priv->sensor[i];
> + u32 hw_id = s->hw_id;
> +
> + if (IS_ERR(s->tzd))
> + continue;
> + if (!tsens_threshold_violated(priv, hw_id, &d))
> + continue;
> + ret = get_temp_tsens_valid(s, &temp);
> + if (ret) {
> + dev_err(priv->dev, "[%u] %s: error reading sensor\n", hw_id, __func__);
> + continue;
> + }
> +
> + spin_lock_irqsave(&priv->ul_lock, flags);
You meant crit_lock here?
But perhaps more importantly, why do you need a lock here?
> +
> + tsens_read_irq_state(priv, hw_id, s, &d);
> +
> + if (d.crit_viol &&
> + !masked_irq(hw_id, d.crit_irq_mask, tsens_version(priv))) {
> + tsens_set_interrupt(priv, hw_id, CRITICAL, false);
> + if (d.crit_thresh > temp) {
> + dev_dbg(priv->dev, "[%u] %s: re-arm upper\n",
> + hw_id, __func__);
> + } else {
> + dev_dbg(priv->dev, "[%u] %s: TZ update trigger (%d mC)\n",
> + hw_id, __func__, temp);
> + }
> + tsens_set_interrupt(priv, hw_id, CRITICAL, true);
> + }
> +
> + spin_unlock_irqrestore(&priv->crit_lock, flags);
> + }
> +
> + return IRQ_HANDLED;
> +}
[..]
> @@ -125,6 +125,28 @@ static int tsens_register(struct tsens_priv *priv)
> goto err_put_device;
> }
>
> + if (priv->feat->crit_int) {
> + irq_crit = platform_get_irq_byname(pdev, "critical");
> + if (irq_crit < 0) {
> + ret = irq_crit;
> + /* For old DTs with no IRQ defined */
> + if (irq_crit == -ENXIO)
> + ret = 0;
> + goto err_crit_int;
> + }
> + ret = devm_request_threaded_irq(&pdev->dev, irq_crit,
> + NULL, tsens_critical_irq_thread,
> + IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
You should omit the IRQF_TRIGGER_HIGH here, it will be provided by the
system configuration (DT).
> + dev_name(&pdev->dev), priv);
> + if (ret) {
> + dev_err(&pdev->dev, "%s: failed to get critical irq\n", __func__);
> + goto err_crit_int;
> + }
> +
> + enable_irq_wake(irq_crit);
> + }
> +
> +err_crit_int:
> enable_irq_wake(irq);
>
> err_put_device:
> diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h
[..]
> @@ -460,6 +526,8 @@ struct tsens_context {
> * @srot_map: pointer to SROT register address space
> * @tm_offset: deal with old device trees that don't address TM and SROT
> * address space separately
> + * @ul_lock: lock while processing upper/lower threshold interrupts
This looks like an unrelated fixup to a previous patch? Please keep it
separate.
> + * @crit_lock: lock while processing critical threshold interrupts
> * @rf: array of regmap_fields used to store value of the field
> * @ctx: registers to be saved and restored during suspend/resume
> * @feat: features of the IP
> @@ -479,6 +547,9 @@ struct tsens_priv {
> /* lock for upper/lower threshold interrupts */
> spinlock_t ul_lock;
>
> + /* lock for critical threshold interrupts */
> + spinlock_t crit_lock;
You're lacking a spin_lock_init() of this.
> +
> struct regmap_field *rf[MAX_REGFIELDS];
> struct tsens_context ctx;
> struct tsens_features *feat;
> @@ -500,6 +571,7 @@ int tsens_enable_irq(struct tsens_priv *priv);
> void tsens_disable_irq(struct tsens_priv *priv);
> int tsens_set_trips(void *_sensor, int low, int high);
> irqreturn_t tsens_irq_thread(int irq, void *data);
> +irqreturn_t tsens_critical_irq_thread(int irq, void *data);
I think you should squash tsens.c and tsens-common.c into one file, so
you don't need to keep adding these extern declarations for every
function - separate of this series of course.
Regards,
Bjorn
>
> /* TSENS target */
> extern struct tsens_plat_data data_8960;
> --
> 2.20.1
>
On Thu 02 Jan 06:54 PST 2020, Amit Kucheria wrote:
[..]
> diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c
> index 4cf550766cf6..ecbc722eb348 100644
> --- a/drivers/thermal/qcom/tsens-common.c
> +++ b/drivers/thermal/qcom/tsens-common.c
> @@ -377,6 +377,24 @@ irqreturn_t tsens_critical_irq_thread(int irq, void *data)
> struct tsens_irq_data d;
> unsigned long flags;
> int temp, ret, i;
> + u32 wdog_status, wdog_count;
> +
> + if (priv->feat->has_watchdog) {
> + /* Watchdog is present only on v2.3+ */
Please omit this comment, you're carrying the motivation for this
decision when you set has_watchdog already.
> + ret = regmap_field_read(priv->rf[WDOG_BARK_STATUS], &wdog_status);
> + if (ret)
> + return ret;
> +
> + /* Clear WDOG interrupt */
> + regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 1);
> + regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 0);
Are you sure you need to zero the clear register?
> +
> + ret = regmap_field_read(priv->rf[WDOG_BARK_COUNT], &wdog_count);
> + if (ret)
> + return ret;
> + if (wdog_count)
> + dev_dbg(priv->dev, "%s: watchdog count: %d\n", __func__, wdog_count);
> + }
>
[..]
> @@ -793,6 +815,22 @@ int __init init_common(struct tsens_priv *priv)
> }
> }
>
> + if (tsens_version(priv) > VER_1_X && ver_minor > 2) {
> + /* Watchdog is present only on v2.3+ */
> + priv->feat->has_watchdog = 1;
> + for (i = WDOG_BARK_STATUS; i <= CC_MON_MASK; i++) {
> + priv->rf[i] = devm_regmap_field_alloc(dev, priv->tm_map,
> + priv->fields[i]);
> + if (IS_ERR(priv->rf[i])) {
> + ret = PTR_ERR(priv->rf[i]);
> + goto err_put_device;
> + }
> + }
> + /* Enable WDOG and disable cycle completion monitoring */
Commit message says you're not enabling it. Should this say "WDOG is
already configured, unmask the bark" or something along those lines?
> + regmap_field_write(priv->rf[WDOG_BARK_MASK], 0);
> + regmap_field_write(priv->rf[CC_MON_MASK], 1);
> + }
> +
> spin_lock_init(&priv->ul_lock);
> tsens_enable_irq(priv);
> tsens_debug_init(op);
Regards,
Bjorn
On Thu 02 Jan 06:54 PST 2020, Amit Kucheria wrote:
> Register critical interrupts for each of the two tsens controllers
>
> Signed-off-by: Amit Kucheria <[email protected]>
> Link: https://lore.kernel.org/r/3686bd40c99692feb955e936b608b080e2cb1826.1568624011.git.amit.kucheria@linaro.org
I was under the impression that this series was already picked up, so I
merged the three dts patches last week (it's a nop until the driver is
updated anyways).
Regards,
Bjorn
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++++++----
> 1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index ddb1f23c936f..8986553cf2eb 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -2950,8 +2950,9 @@
> reg = <0 0x0c263000 0 0x1ff>, /* TM */
> <0 0x0c222000 0 0x1ff>; /* SROT */
> #qcom,sensors = <13>;
> - interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "uplow";
> + interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "uplow", "critical";
> #thermal-sensor-cells = <1>;
> };
>
> @@ -2960,8 +2961,9 @@
> reg = <0 0x0c265000 0 0x1ff>, /* TM */
> <0 0x0c223000 0 0x1ff>; /* SROT */
> #qcom,sensors = <8>;
> - interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "uplow";
> + interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "uplow", "critical";
> #thermal-sensor-cells = <1>;
> };
>
> --
> 2.20.1
>
On Fri, Jan 3, 2020 at 1:15 AM Bjorn Andersson
<[email protected]> wrote:
>
> On Thu 02 Jan 06:54 PST 2020, Amit Kucheria wrote:
> [..]
> > @@ -189,6 +197,9 @@ static void tsens_set_interrupt_v1(struct tsens_priv *priv, u32 hw_id,
> > case LOWER:
> > index = LOW_INT_CLEAR_0 + hw_id;
> > break;
> > + case CRITICAL:
> > + /* No critical interrupts before v2 */
> > + break;
>
> You need to break harder, right now you're just attempting to write
> "enable" to VER_MAJOR in this case.
Will fix.
>
> > }
> > regmap_field_write(priv->rf[index], enable ? 0 : 1);
> > }
> [..]
> > @@ -321,6 +357,64 @@ static inline u32 masked_irq(u32 hw_id, u32 mask, enum tsens_ver ver)
> > return 0;
> > }
> >
> > +/**
> > + * tsens_critical_irq_thread - Threaded interrupt handler for critical interrupts
>
> () on the function name to denote it being a function.
Will fix.
>
> > + * @irq: irq number
> > + * @data: tsens controller private data
> > + *
> > + * Check all sensors to find ones that violated their critical threshold limits.
> > + * Clear and then re-enable the interrupt.
> > + *
> > + * The level-triggered interrupt might deassert if the temperature returned to
> > + * within the threshold limits by the time the handler got scheduled. We
> > + * consider the irq to have been handled in that case.
> > + *
> > + * Return: IRQ_HANDLED
> > + */
> > +irqreturn_t tsens_critical_irq_thread(int irq, void *data)
> > +{
> > + struct tsens_priv *priv = data;
> > + struct tsens_irq_data d;
> > + unsigned long flags;
> > + int temp, ret, i;
> > +
> > + for (i = 0; i < priv->num_sensors; i++) {
> > + const struct tsens_sensor *s = &priv->sensor[i];
> > + u32 hw_id = s->hw_id;
> > +
> > + if (IS_ERR(s->tzd))
> > + continue;
> > + if (!tsens_threshold_violated(priv, hw_id, &d))
> > + continue;
> > + ret = get_temp_tsens_valid(s, &temp);
> > + if (ret) {
> > + dev_err(priv->dev, "[%u] %s: error reading sensor\n", hw_id, __func__);
> > + continue;
> > + }
> > +
> > + spin_lock_irqsave(&priv->ul_lock, flags);
>
> You meant crit_lock here?
Good catch, will fix.
>
> But perhaps more importantly, why do you need a lock here?
I'm reading and changing interrupt state registers in this section and
there can be multiple interrupts occurring simultaneously. Without a
lock, the interrupt threads could potentially stomp over each other's
register state.
Having said that, I think I found a potential problem in porting the
downstream driver code. Basically, we only need critical interrupt to
enable watchdog support. The critical interrupt HW line can be
asserted by watchdog and by actual critical interrupts. One to one
mapping of tsens critical interrupts to trip type CRITICAL in Linux
leads to a HW shutdown. And we can use the trip type PASSIVE with
multiple ranges of temperatures to handle several levels of trip.
So I'll change the code below to mask the critical interrupts in the
event it is triggered and only use the irq thread to handle watchdog
interrupts.
> > +
> > + tsens_read_irq_state(priv, hw_id, s, &d);
> > +
> > + if (d.crit_viol &&
> > + !masked_irq(hw_id, d.crit_irq_mask, tsens_version(priv))) {
> > + tsens_set_interrupt(priv, hw_id, CRITICAL, false);
> > + if (d.crit_thresh > temp) {
> > + dev_dbg(priv->dev, "[%u] %s: re-arm upper\n",
> > + hw_id, __func__);
> > + } else {
> > + dev_dbg(priv->dev, "[%u] %s: TZ update trigger (%d mC)\n",
> > + hw_id, __func__, temp);
> > + }
> > + tsens_set_interrupt(priv, hw_id, CRITICAL, true);
> > + }
> > +
> > + spin_unlock_irqrestore(&priv->crit_lock, flags);
> > + }
> > +
> > + return IRQ_HANDLED;
> > +}
> [..]
> > @@ -125,6 +125,28 @@ static int tsens_register(struct tsens_priv *priv)
> > goto err_put_device;
> > }
> >
> > + if (priv->feat->crit_int) {
> > + irq_crit = platform_get_irq_byname(pdev, "critical");
> > + if (irq_crit < 0) {
> > + ret = irq_crit;
> > + /* For old DTs with no IRQ defined */
> > + if (irq_crit == -ENXIO)
> > + ret = 0;
> > + goto err_crit_int;
> > + }
> > + ret = devm_request_threaded_irq(&pdev->dev, irq_crit,
> > + NULL, tsens_critical_irq_thread,
> > + IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
>
> You should omit the IRQF_TRIGGER_HIGH here, it will be provided by the
> system configuration (DT).
Will fix.
>
> > + dev_name(&pdev->dev), priv);
> > + if (ret) {
> > + dev_err(&pdev->dev, "%s: failed to get critical irq\n", __func__);
> > + goto err_crit_int;
> > + }
> > +
> > + enable_irq_wake(irq_crit);
> > + }
> > +
> > +err_crit_int:
> > enable_irq_wake(irq);
> >
> > err_put_device:
> > diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h
> [..]
> > @@ -460,6 +526,8 @@ struct tsens_context {
> > * @srot_map: pointer to SROT register address space
> > * @tm_offset: deal with old device trees that don't address TM and SROT
> > * address space separately
> > + * @ul_lock: lock while processing upper/lower threshold interrupts
>
> This looks like an unrelated fixup to a previous patch? Please keep it
> separate.
Will remove.
> > + * @crit_lock: lock while processing critical threshold interrupts
> > * @rf: array of regmap_fields used to store value of the field
> > * @ctx: registers to be saved and restored during suspend/resume
> > * @feat: features of the IP
> > @@ -479,6 +547,9 @@ struct tsens_priv {
> > /* lock for upper/lower threshold interrupts */
> > spinlock_t ul_lock;
> >
> > + /* lock for critical threshold interrupts */
> > + spinlock_t crit_lock;
>
> You're lacking a spin_lock_init() of this.
Will fix.
> > +
> > struct regmap_field *rf[MAX_REGFIELDS];
> > struct tsens_context ctx;
> > struct tsens_features *feat;
> > @@ -500,6 +571,7 @@ int tsens_enable_irq(struct tsens_priv *priv);
> > void tsens_disable_irq(struct tsens_priv *priv);
> > int tsens_set_trips(void *_sensor, int low, int high);
> > irqreturn_t tsens_irq_thread(int irq, void *data);
> > +irqreturn_t tsens_critical_irq_thread(int irq, void *data);
>
> I think you should squash tsens.c and tsens-common.c into one file, so
> you don't need to keep adding these extern declarations for every
> function - separate of this series of course.
Agreed. The separation no longer makes sense.
Thanks for the review.
On Fri, Jan 3, 2020 at 1:25 AM Bjorn Andersson
<[email protected]> wrote:
>
> On Thu 02 Jan 06:54 PST 2020, Amit Kucheria wrote:
> [..]
> > diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c
> > index 4cf550766cf6..ecbc722eb348 100644
> > --- a/drivers/thermal/qcom/tsens-common.c
> > +++ b/drivers/thermal/qcom/tsens-common.c
> > @@ -377,6 +377,24 @@ irqreturn_t tsens_critical_irq_thread(int irq, void *data)
> > struct tsens_irq_data d;
> > unsigned long flags;
> > int temp, ret, i;
> > + u32 wdog_status, wdog_count;
> > +
> > + if (priv->feat->has_watchdog) {
> > + /* Watchdog is present only on v2.3+ */
>
> Please omit this comment, you're carrying the motivation for this
> decision when you set has_watchdog already.
Will fix.
>
> > + ret = regmap_field_read(priv->rf[WDOG_BARK_STATUS], &wdog_status);
> > + if (ret)
> > + return ret;
> > +
> > + /* Clear WDOG interrupt */
> > + regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 1);
> > + regmap_field_write(priv->rf[WDOG_BARK_CLEAR], 0);
>
> Are you sure you need to zero the clear register?
Yes, the corresponding downstream code is as follows:
/*
* Clear watchdog interrupt and
* increment global wd count
*/
writel_relaxed(wd_mask | TSENS_TM_CRITICAL_WD_BARK,
(TSENS_TM_CRITICAL_INT_CLEAR
(tm->tsens_tm_addr)));
writel_relaxed(wd_mask & ~(TSENS_TM_CRITICAL_WD_BARK),
(TSENS_TM_CRITICAL_INT_CLEAR
(tm->tsens_tm_addr)));
> > +
> > + ret = regmap_field_read(priv->rf[WDOG_BARK_COUNT], &wdog_count);
> > + if (ret)
> > + return ret;
> > + if (wdog_count)
> > + dev_dbg(priv->dev, "%s: watchdog count: %d\n", __func__, wdog_count);
> > + }
> >
> [..]
> > @@ -793,6 +815,22 @@ int __init init_common(struct tsens_priv *priv)
> > }
> > }
> >
> > + if (tsens_version(priv) > VER_1_X && ver_minor > 2) {
> > + /* Watchdog is present only on v2.3+ */
> > + priv->feat->has_watchdog = 1;
> > + for (i = WDOG_BARK_STATUS; i <= CC_MON_MASK; i++) {
> > + priv->rf[i] = devm_regmap_field_alloc(dev, priv->tm_map,
> > + priv->fields[i]);
> > + if (IS_ERR(priv->rf[i])) {
> > + ret = PTR_ERR(priv->rf[i]);
> > + goto err_put_device;
> > + }
> > + }
> > + /* Enable WDOG and disable cycle completion monitoring */
>
> Commit message says you're not enabling it. Should this say "WDOG is
> already configured, unmask the bark" or something along those lines?
Will reword
>
> > + regmap_field_write(priv->rf[WDOG_BARK_MASK], 0);
> > + regmap_field_write(priv->rf[CC_MON_MASK], 1);
> > + }
> > +
> > spin_lock_init(&priv->ul_lock);
> > tsens_enable_irq(priv);
> > tsens_debug_init(op);
>
> Regards,
> Bjorn
Thanks for the review.
On Fri, Jan 3, 2020 at 12:59 AM Bjorn Andersson
<[email protected]> wrote:
>
> On Thu 02 Jan 06:54 PST 2020, Amit Kucheria wrote:
>
> > We don't currently call put_device in case of successfully initialising
> > the device.
> >
> > Allow control to fall through so we can use same code for success and
> > error paths to put_device.
> >
>
> Given the relationship between priv->dev and op I think this wouldn't be
> a problem in practice, but there's two devm_ioremap_resource() done on
> op->dev in this function. So you're depending on op->dev to stick
> around, but with this patch you're no longer expressing that dependency.
>
> That said, it looks iffy to do devm_ioremap_resource() on op->dev and
> then create a regmap on priv->dev using that resource. So I think it
> would be better to do platform_get_source() on op, and then
> devm_ioremap_resource() on priv->dev, in which case the regmap backing
> memory will be related to the same struct device as the regmap and it
> makes perfect sense to put_device() the op->dev when you're done
> inspecting it's resources.
>
Indeed, thanks for reviewing.
Will fix.
> > Signed-off-by: Amit Kucheria <[email protected]>
> > ---
> > drivers/thermal/qcom/tsens-common.c | 2 --
> > 1 file changed, 2 deletions(-)
> >
> > diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c
> > index 1cbc5a6e5b4f..e84e94a6f1a7 100644
> > --- a/drivers/thermal/qcom/tsens-common.c
> > +++ b/drivers/thermal/qcom/tsens-common.c
> > @@ -687,8 +687,6 @@ int __init init_common(struct tsens_priv *priv)
> > tsens_enable_irq(priv);
> > tsens_debug_init(op);
> >
> > - return 0;
> > -
> > err_put_device:
> > put_device(&op->dev);
> > return ret;
> > --
> > 2.20.1
> >