2022-10-31 12:02:53

by Gaosheng Cui

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Subject: [PATCH] x86/cpu: fix undefined behavior in bit shift for intel_detect_tlb

Shifting signed 32-bit value by 31 bits is undefined, so changing
significant bit to unsigned. The UBSAN warning calltrace like below:

UBSAN: shift-out-of-bounds in arch/x86/kernel/cpu/intel.c:948:21
left shift of 1 by 31 places cannot be represented in type 'int'
Call Trace:
<TASK>
dump_stack_lvl+0x7d/0xa5
dump_stack+0x15/0x1b
ubsan_epilogue+0xe/0x4e
__ubsan_handle_shift_out_of_bounds+0x1e7/0x20c
intel_detect_tlb+0x114/0xbd0
identify_boot_cpu+0x29/0x9e
check_bugs+0x2f/0x15a5
start_kernel+0xc3f/0xc78
x86_64_start_reservations+0x24/0x2a
x86_64_start_kernel+0xed/0xf8
secondary_startup_64_no_verify+0xe5/0xeb
</TASK>

Fixes: e0ba94f14f74 ("x86/tlb_info: get last level TLB entry number of CPU")
Signed-off-by: Gaosheng Cui <[email protected]>
---
arch/x86/kernel/cpu/intel.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 2d7ea5480ec3..121c1c38162a 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -945,7 +945,7 @@ static void intel_detect_tlb(struct cpuinfo_x86 *c)

/* If bit 31 is set, this is an unknown format */
for (j = 0 ; j < 3 ; j++)
- if (regs[j] & (1 << 31))
+ if (regs[j] & (1U << 31))
regs[j] = 0;

/* Byte 0 is level count, not a descriptor */
--
2.25.1



2022-10-31 12:54:47

by Alex Shi

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Subject: Re: [PATCH] x86/cpu: fix undefined behavior in bit shift for intel_detect_tlb

On Mon, Oct 31, 2022 at 7:43 PM Gaosheng Cui <[email protected]> wrote:
>
> Shifting signed 32-bit value by 31 bits is undefined, so changing
> significant bit to unsigned. The UBSAN warning calltrace like below:
>
> UBSAN: shift-out-of-bounds in arch/x86/kernel/cpu/intel.c:948:21
> left shift of 1 by 31 places cannot be represented in type 'int'
> Call Trace:
> <TASK>
> dump_stack_lvl+0x7d/0xa5
> dump_stack+0x15/0x1b
> ubsan_epilogue+0xe/0x4e
> __ubsan_handle_shift_out_of_bounds+0x1e7/0x20c
> intel_detect_tlb+0x114/0xbd0
> identify_boot_cpu+0x29/0x9e
> check_bugs+0x2f/0x15a5
> start_kernel+0xc3f/0xc78
> x86_64_start_reservations+0x24/0x2a
> x86_64_start_kernel+0xed/0xf8
> secondary_startup_64_no_verify+0xe5/0xeb
> </TASK>
>
> Fixes: e0ba94f14f74 ("x86/tlb_info: get last level TLB entry number of CPU")
> Signed-off-by: Gaosheng Cui <[email protected]>

Reviewed-by: Alex Shi <[email protected]>

> ---
> arch/x86/kernel/cpu/intel.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
> index 2d7ea5480ec3..121c1c38162a 100644
> --- a/arch/x86/kernel/cpu/intel.c
> +++ b/arch/x86/kernel/cpu/intel.c
> @@ -945,7 +945,7 @@ static void intel_detect_tlb(struct cpuinfo_x86 *c)
>
> /* If bit 31 is set, this is an unknown format */
> for (j = 0 ; j < 3 ; j++)
> - if (regs[j] & (1 << 31))
> + if (regs[j] & (1U << 31))
> regs[j] = 0;
>
> /* Byte 0 is level count, not a descriptor */
> --
> 2.25.1
>

2022-10-31 13:02:25

by Peter Zijlstra

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Subject: Re: [PATCH] x86/cpu: fix undefined behavior in bit shift for intel_detect_tlb

On Mon, Oct 31, 2022 at 07:43:40PM +0800, Gaosheng Cui wrote:
> Shifting signed 32-bit value by 31 bits is undefined, so changing
> significant bit to unsigned. The UBSAN warning calltrace like below:
>
> UBSAN: shift-out-of-bounds in arch/x86/kernel/cpu/intel.c:948:21
> left shift of 1 by 31 places cannot be represented in type 'int'

Is it really? Shouldn't -fstrict-overflow define this case?

2022-10-31 13:04:42

by Peter Zijlstra

[permalink] [raw]
Subject: Re: [PATCH] x86/cpu: fix undefined behavior in bit shift for intel_detect_tlb

On Mon, Oct 31, 2022 at 01:30:57PM +0100, Peter Zijlstra wrote:
> On Mon, Oct 31, 2022 at 07:43:40PM +0800, Gaosheng Cui wrote:
> > Shifting signed 32-bit value by 31 bits is undefined, so changing
> > significant bit to unsigned. The UBSAN warning calltrace like below:
> >
> > UBSAN: shift-out-of-bounds in arch/x86/kernel/cpu/intel.c:948:21
> > left shift of 1 by 31 places cannot be represented in type 'int'
>
> Is it really? Shouldn't -fstrict-overflow define this case?

-fno-strict-overflow that is, which implies -fwrapv which ensures 2s
complement, at which point shifting signed numbers is fully defined.

2022-11-01 12:03:17

by Gaosheng Cui

[permalink] [raw]
Subject: Re: [PATCH] x86/cpu: fix undefined behavior in bit shift for intel_detect_tlb

We don't need to add UBSAN calltrace, so I have merged the patch with another
patch("x86/cpu: replacing the open-coded shift with BIT(x)"), please ignore
this patch,thanks for review this patch!

On 2022/10/31 20:32, Peter Zijlstra wrote:
> On Mon, Oct 31, 2022 at 01:30:57PM +0100, Peter Zijlstra wrote:
>> On Mon, Oct 31, 2022 at 07:43:40PM +0800, Gaosheng Cui wrote:
>>> Shifting signed 32-bit value by 31 bits is undefined, so changing
>>> significant bit to unsigned. The UBSAN warning calltrace like below:
>>>
>>> UBSAN: shift-out-of-bounds in arch/x86/kernel/cpu/intel.c:948:21
>>> left shift of 1 by 31 places cannot be represented in type 'int'
>> Is it really? Shouldn't -fstrict-overflow define this case?
> -fno-strict-overflow that is, which implies -fwrapv which ensures 2s
> complement, at which point shifting signed numbers is fully defined.
>
> .