Hi,
This series converts Loongson PCI into a generic PCI controller
driver and adds support for LS2K SoC and LS7A PCH's PCI support.
Is it possible to let patch 1~4 go through PCI tree and patch
5~6 go through MIPS tree?
Thanks.
Jiaxun Yang (6):
PCI: OF: Don't remap iospace on unsupported platform
PCI: Don't disable decoding when mmio_always_on is set
PCI: Add Loongson PCI Controller support
dt-bindings: Document Loongson PCI Host Controller
MIPS: DTS: Loongson64: Add PCI Controller Node
MIPS: Loongson64: Switch to generic PCI driver
.../devicetree/bindings/pci/loongson.yaml | 62 +++++
arch/mips/Kconfig | 1 +
arch/mips/boot/dts/loongson/rs780e-pch.dtsi | 17 +-
arch/mips/loongson64/Makefile | 2 +-
arch/mips/loongson64/vbios_quirk.c | 29 ++
arch/mips/pci/Makefile | 1 -
arch/mips/pci/fixup-loongson3.c | 71 -----
arch/mips/pci/ops-loongson3.c | 116 --------
drivers/pci/controller/Kconfig | 9 +
drivers/pci/controller/Makefile | 1 +
drivers/pci/controller/pci-loongson.c | 257 ++++++++++++++++++
drivers/pci/of.c | 9 +
drivers/pci/probe.c | 2 +-
13 files changed, 386 insertions(+), 191 deletions(-)
create mode 100644 Documentation/devicetree/bindings/pci/loongson.yaml
create mode 100644 arch/mips/loongson64/vbios_quirk.c
delete mode 100644 arch/mips/pci/fixup-loongson3.c
delete mode 100644 arch/mips/pci/ops-loongson3.c
create mode 100644 drivers/pci/controller/pci-loongson.c
--
2.26.0.rc2
There are some platforms that don't support I/O space remapping
like MIPS. However, our PCI code will try to remap iospace
unconditionally and reject io resources on these platforms.
So we should remove I/O space remapping check and use a range
check instead on these platforms.
Signed-off-by: Jiaxun Yang <[email protected]>
--
v4: Fix a typo in commit message.
v5: Commit message massage
---
drivers/pci/of.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/drivers/pci/of.c b/drivers/pci/of.c
index 81ceeaa6f1d5..36e8761b66c6 100644
--- a/drivers/pci/of.c
+++ b/drivers/pci/of.c
@@ -547,12 +547,21 @@ int pci_parse_request_of_pci_ranges(struct device *dev,
switch (resource_type(res)) {
case IORESOURCE_IO:
+#if defined(PCI_IOBASE) && defined(CONFIG_MMU)
err = devm_pci_remap_iospace(dev, res, iobase);
if (err) {
dev_warn(dev, "error %d: failed to map resource %pR\n",
err, res);
resource_list_destroy_entry(win);
}
+#else
+ /* Simply check if IO is inside the range */
+ if (res->end > IO_SPACE_LIMIT) {
+ dev_warn(dev, "resource %pR out of the I/O range\n",
+ res);
+ resource_list_destroy_entry(win);
+ }
+#endif
break;
case IORESOURCE_MEM:
res_valid |= !(res->flags & IORESOURCE_PREFETCH);
--
2.26.0.rc2
PCI host controller found on Loongson PCHs and SoCs.
Signed-off-by: Jiaxun Yang <[email protected]>
--
v3: Fix ranges
---
.../devicetree/bindings/pci/loongson.yaml | 62 +++++++++++++++++++
1 file changed, 62 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/loongson.yaml
diff --git a/Documentation/devicetree/bindings/pci/loongson.yaml b/Documentation/devicetree/bindings/pci/loongson.yaml
new file mode 100644
index 000000000000..20b4cf3fe696
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/loongson.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/loongson.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Loongson PCI Host Controller
+
+maintainers:
+ - Jiaxun Yang <[email protected]>
+
+description: |+
+ PCI host controller found on Loongson PCHs and SoCs.
+
+allOf:
+ - $ref: /schemas/pci/pci-bus.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - const: loongson,rs780e-pci
+ - const: loongson,ls7a-pci
+ - const: loongson,ls2k-pci
+
+ reg:
+ minItems: 1
+ maxItems: 2
+ items:
+ - description: CFG0 standard config space register
+ - description: CFG1 extended config space register
+
+ ranges:
+ minItems: 1
+ maxItems: 3
+
+
+required:
+ - compatible
+ - reg
+ - ranges
+
+examples:
+ - |
+
+ bus {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ pcie@1a000000 {
+ compatible = "loongson,rs780e-pci";
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ // CPU_PHYSICAL(2) SIZE(2)
+ reg = <0x0 0x1a000000 0x0 0x2000000>;
+
+ // BUS_ADDRESS(3) CPU_PHYSICAL(2) SIZE(2)
+ ranges = <0x01000000 0x0 0x00004000 0x0 0x00004000 0x0 0x00004000>,
+ <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
+ };
+ };
+...
--
2.26.0.rc2
Add PCI Host controller node for Loongson64 with RS780E PCH dts.
Note that PCI interrupts are probed via legacy way, as different
machine have different interrupt arrangement, we can't cover all
of them in dt.
Signed-off-by: Jiaxun Yang <[email protected]>
--
v2: Clean-up
---
arch/mips/boot/dts/loongson/rs780e-pch.dtsi | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/arch/mips/boot/dts/loongson/rs780e-pch.dtsi b/arch/mips/boot/dts/loongson/rs780e-pch.dtsi
index 8687c4f7370a..5e68ceae20ca 100644
--- a/arch/mips/boot/dts/loongson/rs780e-pch.dtsi
+++ b/arch/mips/boot/dts/loongson/rs780e-pch.dtsi
@@ -5,10 +5,25 @@ bus@10000000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
- ranges = <0 0x10000000 0 0x10000000 0 0x10000000
+ ranges = <0 0x00000000 0 0x00000000 0 0x00010000 /* I/O Ports */
+ 0 0x10000000 0 0x10000000 0 0x10000000
0 0x40000000 0 0x40000000 0 0x40000000
0xfd 0xfe000000 0xfd 0xfe000000 0 0x2000000 /* PCI Config Space */>;
+ pci@1a000000 {
+ compatible = "loongson,rs780e-pci";
+ device_type = "pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ reg = <0 0x1a000000 0 0x02000000>;
+
+ ranges = <0x01000000 0 0x00004000 0 0x00004000 0 0x00004000>,
+ <0x02000000 0 0x40000000 0 0x40000000 0 0x40000000>;
+
+ bus-range = <0x00 0xff>;
+ };
+
isa {
compatible = "isa";
#address-cells = <2>;
--
2.26.0.rc2
On Fri, Apr 24, 2020 at 8:09 AM Jiaxun Yang <[email protected]> wrote:
>
> There are some platforms that don't support I/O space remapping
> like MIPS. However, our PCI code will try to remap iospace
> unconditionally and reject io resources on these platforms.
>
> So we should remove I/O space remapping check and use a range
> check instead on these platforms.
>
> Signed-off-by: Jiaxun Yang <[email protected]>
> --
> v4: Fix a typo in commit message.
> v5: Commit message massage
> ---
> drivers/pci/of.c | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/drivers/pci/of.c b/drivers/pci/of.c
> index 81ceeaa6f1d5..36e8761b66c6 100644
> --- a/drivers/pci/of.c
> +++ b/drivers/pci/of.c
> @@ -547,12 +547,21 @@ int pci_parse_request_of_pci_ranges(struct device *dev,
>
> switch (resource_type(res)) {
> case IORESOURCE_IO:
> +#if defined(PCI_IOBASE) && defined(CONFIG_MMU)
We already have the same condition in pci_remap_iospace(). All this
does is suppress a WARN. If a WARN is not desired, then change it.
Perhaps just a single line rather than backtrace would be okay.
Whether to WARN or not shouldn't be a decision for firmware code.
Though really, if I/O space can never be supported, then it's an error
in your DT to describe it.
> err = devm_pci_remap_iospace(dev, res, iobase);
> if (err) {
> dev_warn(dev, "error %d: failed to map resource %pR\n",
> err, res);
> resource_list_destroy_entry(win);
> }
> +#else
> + /* Simply check if IO is inside the range */
Why do you care if it's never used?
> + if (res->end > IO_SPACE_LIMIT) {
> + dev_warn(dev, "resource %pR out of the I/O range\n",
> + res);
> + resource_list_destroy_entry(win);
> + }
> +#endif
> break;
> case IORESOURCE_MEM:
> res_valid |= !(res->flags & IORESOURCE_PREFETCH);
> --
> 2.26.0.rc2
>
于 2020年4月25日 GMT+08:00 上午1:47:23, Rob Herring <[email protected]> 写到:
>On Fri, Apr 24, 2020 at 8:09 AM Jiaxun Yang <[email protected]> wrote:
>>
>> There are some platforms that don't support I/O space remapping
>> like MIPS. However, our PCI code will try to remap iospace
>> unconditionally and reject io resources on these platforms.
>>
>> So we should remove I/O space remapping check and use a range
>> check instead on these platforms.
>>
>> Signed-off-by: Jiaxun Yang <[email protected]>
>> --
>> v4: Fix a typo in commit message.
>> v5: Commit message massage
>> ---
>> drivers/pci/of.c | 9 +++++++++
>> 1 file changed, 9 insertions(+)
>>
>> diff --git a/drivers/pci/of.c b/drivers/pci/of.c
>> index 81ceeaa6f1d5..36e8761b66c6 100644
>> --- a/drivers/pci/of.c
>> +++ b/drivers/pci/of.c
>> @@ -547,12 +547,21 @@ int pci_parse_request_of_pci_ranges(struct device *dev,
>>
>> switch (resource_type(res)) {
>> case IORESOURCE_IO:
>> +#if defined(PCI_IOBASE) && defined(CONFIG_MMU)
>
>We already have the same condition in pci_remap_iospace(). All this
>does is suppress a WARN. If a WARN is not desired, then change it.
>Perhaps just a single line rather than backtrace would be okay.
>Whether to WARN or not shouldn't be a decision for firmware code.
>
>Though really, if I/O space can never be supported, then it's an error
>in your DT to describe it.
In MIPS world, we do have inb/oub family of I/O functions
to support I/O space. But we're not using remap_iospace as it's breaking
some of our assumptions.
We have our own inb/outb implementation.
In that case, I think make a range check instead of remapping would
be more practical.
Thanks.
>
>> err = devm_pci_remap_iospace(dev, res, iobase);
>> if (err) {
>> dev_warn(dev, "error %d: failed to map resource %pR\n",
>> err, res);
>> resource_list_destroy_entry(win);
>> }
>> +#else
>> + /* Simply check if IO is inside the range */
>
>Why do you care if it's never used?
>
>> + if (res->end > IO_SPACE_LIMIT) {
>> + dev_warn(dev, "resource %pR out of the I/O range\n",
>> + res);
>> + resource_list_destroy_entry(win);
>> + }
>> +#endif
>> break;
>> case IORESOURCE_MEM:
>> res_valid |= !(res->flags & IORESOURCE_PREFETCH);
>> --
>> 2.26.0.rc2
>>
--
Jiaxun Yang
On Fri, Apr 24, 2020 at 8:10 AM Jiaxun Yang <[email protected]> wrote:
>
> PCI host controller found on Loongson PCHs and SoCs.
>
> Signed-off-by: Jiaxun Yang <[email protected]>
>
> --
> v3: Fix ranges
> ---
> .../devicetree/bindings/pci/loongson.yaml | 62 +++++++++++++++++++
> 1 file changed, 62 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pci/loongson.yaml
Reviewed-by: Rob Herring <[email protected]>
On Fri, Apr 24, 2020 at 1:03 PM Jiaxun Yang <[email protected]> wrote:
>
>
>
> 于 2020年4月25日 GMT+08:00 上午1:47:23, Rob Herring <[email protected]> 写到:
> >On Fri, Apr 24, 2020 at 8:09 AM Jiaxun Yang <[email protected]> wrote:
> >>
> >> There are some platforms that don't support I/O space remapping
> >> like MIPS. However, our PCI code will try to remap iospace
> >> unconditionally and reject io resources on these platforms.
> >>
> >> So we should remove I/O space remapping check and use a range
> >> check instead on these platforms.
> >>
> >> Signed-off-by: Jiaxun Yang <[email protected]>
> >> --
> >> v4: Fix a typo in commit message.
> >> v5: Commit message massage
> >> ---
> >> drivers/pci/of.c | 9 +++++++++
> >> 1 file changed, 9 insertions(+)
> >>
> >> diff --git a/drivers/pci/of.c b/drivers/pci/of.c
> >> index 81ceeaa6f1d5..36e8761b66c6 100644
> >> --- a/drivers/pci/of.c
> >> +++ b/drivers/pci/of.c
> >> @@ -547,12 +547,21 @@ int pci_parse_request_of_pci_ranges(struct device *dev,
> >>
> >> switch (resource_type(res)) {
> >> case IORESOURCE_IO:
> >> +#if defined(PCI_IOBASE) && defined(CONFIG_MMU)
> >
> >We already have the same condition in pci_remap_iospace(). All this
> >does is suppress a WARN. If a WARN is not desired, then change it.
> >Perhaps just a single line rather than backtrace would be okay.
> >Whether to WARN or not shouldn't be a decision for firmware code.
> >
> >Though really, if I/O space can never be supported, then it's an error
> >in your DT to describe it.
>
> In MIPS world, we do have inb/oub family of I/O functions
> to support I/O space. But we're not using remap_iospace as it's breaking
> some of our assumptions.
I suspect that's largely because most MIPS drivers pre-date the common
iospace handling. Really MIPS should start using this.
> We have our own inb/outb implementation.
That's orthogonal to mapping the iospace.
> In that case, I think make a range check instead of remapping would
> be more practical.
Not the kernel's job to validate the DT especially if you aren't using
this data anywhere.
Just remove the WARN, make it a single line print, or add
!IS_ENABLED(CONFIG_MIPS) where the warning is.
Rob
On Fri, Apr 24, 2020 at 8:10 AM Jiaxun Yang <[email protected]> wrote:
>
> Add PCI Host controller node for Loongson64 with RS780E PCH dts.
> Note that PCI interrupts are probed via legacy way, as different
> machine have different interrupt arrangement, we can't cover all
> of them in dt.
>
> Signed-off-by: Jiaxun Yang <[email protected]>
> --
> v2: Clean-up
> ---
> arch/mips/boot/dts/loongson/rs780e-pch.dtsi | 17 ++++++++++++++++-
> 1 file changed, 16 insertions(+), 1 deletion(-)
>
> diff --git a/arch/mips/boot/dts/loongson/rs780e-pch.dtsi b/arch/mips/boot/dts/loongson/rs780e-pch.dtsi
> index 8687c4f7370a..5e68ceae20ca 100644
> --- a/arch/mips/boot/dts/loongson/rs780e-pch.dtsi
> +++ b/arch/mips/boot/dts/loongson/rs780e-pch.dtsi
> @@ -5,10 +5,25 @@ bus@10000000 {
> compatible = "simple-bus";
> #address-cells = <2>;
> #size-cells = <2>;
> - ranges = <0 0x10000000 0 0x10000000 0 0x10000000
> + ranges = <0 0x00000000 0 0x00000000 0 0x00010000 /* I/O Ports */
You're changing the first entry, so bus@10000000 unit-address should change.
Are i/o addresses really at 0x0 physical address?
> + 0 0x10000000 0 0x10000000 0 0x10000000
> 0 0x40000000 0 0x40000000 0 0x40000000
> 0xfd 0xfe000000 0xfd 0xfe000000 0 0x2000000 /* PCI Config Space */>;
>
> + pci@1a000000 {
> + compatible = "loongson,rs780e-pci";
> + device_type = "pci";
> + #address-cells = <3>;
> + #size-cells = <2>;
> +
> + reg = <0 0x1a000000 0 0x02000000>;
> +
> + ranges = <0x01000000 0 0x00004000 0 0x00004000 0 0x00004000>,
> + <0x02000000 0 0x40000000 0 0x40000000 0 0x40000000>;
> +
> + bus-range = <0x00 0xff>;
Not needed.
> + };
> +
> isa {
> compatible = "isa";
> #address-cells = <2>;
> --
> 2.26.0.rc2
>