This patch series converts the iProc PCIe binding to YAML. Given there
is a majority of DTS changes, it would make sense for me to pull this
via the Broadcom ARM SoC git tree.
Thanks!
Changes in v3:
- converted Cygnus PCIe PHY binding
- removed interrupt-controller from being a mandatory property
Changes in v2:
- document msi sub-node compatible string
Florian Fainelli (6):
ARM: dts: Cygnus: Fixed iProc PCIe controller properties
ARM: dts: Cygnus: Update PCIe PHY node unit name(s)
ARM: dts: HR2: Fixed iProc PCIe MSI sub-node
ARM: dts: NSP: Fixed iProc PCIe MSI sub-node
dt-bindings: phy: Convert Cygnus PCIe PHY to YAML
dt-bindings: pci: Convert iProc PCIe to YAML
.../bindings/pci/brcm,iproc-pcie.txt | 133 -------------
.../bindings/pci/brcm,iproc-pcie.yaml | 176 ++++++++++++++++++
.../bindings/phy/brcm,cygnus-pcie-phy.txt | 47 -----
.../bindings/phy/brcm,cygnus-pcie-phy.yaml | 76 ++++++++
arch/arm/boot/dts/bcm-cygnus.dtsi | 19 +-
arch/arm/boot/dts/bcm-hr2.dtsi | 4 +-
arch/arm/boot/dts/bcm-nsp.dtsi | 6 +-
7 files changed, 267 insertions(+), 194 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
create mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
delete mode 100644 Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt
create mode 100644 Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml
--
2.25.1
Rename the msi controller unit name to 'msi' to avoid collisions
with the 'msi-controller' boolean property and add the missing
'interrupt-controller' property which is necessary. We also need to
re-arrange the 'ranges' property to show the two cells as being separate
instead of combined since the DT checker is not able to differentiate
otherwise.
Signed-off-by: Florian Fainelli <[email protected]>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index 8ecb7861ce10..d6e2b2ba3a19 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -274,8 +274,8 @@ pcie0: pcie@18012000 {
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- ranges = <0x81000000 0 0 0x28000000 0 0x00010000
- 0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
+ ranges = <0x81000000 0 0 0x28000000 0 0x00010000>,
+ <0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
phys = <&pcie0_phy>;
phy-names = "pcie-phy";
@@ -283,7 +283,7 @@ pcie0: pcie@18012000 {
status = "disabled";
msi-parent = <&msi0>;
- msi0: msi-controller {
+ msi0: msi {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
@@ -298,6 +298,7 @@ pcie1: pcie@18013000 {
compatible = "brcm,iproc-pcie";
reg = <0x18013000 0x1000>;
+ interrupt-controller;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
@@ -309,8 +310,8 @@ pcie1: pcie@18013000 {
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
- ranges = <0x81000000 0 0 0x48000000 0 0x00010000
- 0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
+ ranges = <0x81000000 0 0 0x48000000 0 0x00010000>,
+ <0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
phys = <&pcie1_phy>;
phy-names = "pcie-phy";
@@ -318,7 +319,7 @@ pcie1: pcie@18013000 {
status = "disabled";
msi-parent = <&msi1>;
- msi1: msi-controller {
+ msi1: msi {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
--
2.25.1
Update the PCIe PHY node unit name and its sub-nodes to help with
upcoming changes converting the Cygnus PCIe PHY DT binding to YAML and
later the iProc PCIe controller binding to YAML.
Signed-off-by: Florian Fainelli <[email protected]>
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index d6e2b2ba3a19..8153b60c87b7 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -112,18 +112,18 @@ otp: otp@301c800 {
status = "disabled";
};
- pcie_phy: phy@301d0a0 {
+ pcie_phy: pcie_phy@301d0a0 {
compatible = "brcm,cygnus-pcie-phy";
reg = <0x0301d0a0 0x14>;
#address-cells = <1>;
#size-cells = <0>;
- pcie0_phy: phy@0 {
+ pcie0_phy: pcie-phy@0 {
reg = <0>;
#phy-cells = <0>;
};
- pcie1_phy: phy@1 {
+ pcie1_phy: pcie-phy@1 {
reg = <1>;
#phy-cells = <0>;
};
--
2.25.1
Rename the msi controller unit name to 'msi' to avoid collisions with
the 'msi-controller' boolean property.
Signed-off-by: Florian Fainelli <[email protected]>
---
arch/arm/boot/dts/bcm-hr2.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-hr2.dtsi b/arch/arm/boot/dts/bcm-hr2.dtsi
index 84cda16f68a2..33e6ba63a1ee 100644
--- a/arch/arm/boot/dts/bcm-hr2.dtsi
+++ b/arch/arm/boot/dts/bcm-hr2.dtsi
@@ -318,7 +318,7 @@ pcie0: pcie@18012000 {
status = "disabled";
msi-parent = <&msi0>;
- msi0: msi-controller {
+ msi0: msi {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
@@ -354,7 +354,7 @@ pcie1: pcie@18013000 {
status = "disabled";
msi-parent = <&msi1>;
- msi1: msi-controller {
+ msi1: msi {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
--
2.25.1
Rename the msi controller unit name to 'msi' to avoid collisions with
the 'msi-controller' boolean property.
Signed-off-by: Florian Fainelli <[email protected]>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index 1c08daa18858..f242763c3bde 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -587,7 +587,7 @@ pcie0: pcie@18012000 {
status = "disabled";
msi-parent = <&msi0>;
- msi0: msi-controller {
+ msi0: msi {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
@@ -624,7 +624,7 @@ pcie1: pcie@18013000 {
status = "disabled";
msi-parent = <&msi1>;
- msi1: msi-controller {
+ msi1: msi {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
@@ -661,7 +661,7 @@ pcie2: pcie@18014000 {
status = "disabled";
msi-parent = <&msi2>;
- msi2: msi-controller {
+ msi2: msi {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
--
2.25.1
Convert the Broadcom Cygnus PCIe PHY Device Tree binding t YAML to help
with validation.
Signed-off-by: Florian Fainelli <[email protected]>
---
.../bindings/phy/brcm,cygnus-pcie-phy.txt | 47 ------------
.../bindings/phy/brcm,cygnus-pcie-phy.yaml | 76 +++++++++++++++++++
2 files changed, 76 insertions(+), 47 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt
create mode 100644 Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml
diff --git a/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt b/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt
deleted file mode 100644
index 10efff28b52b..000000000000
--- a/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.txt
+++ /dev/null
@@ -1,47 +0,0 @@
-Broadcom Cygnus PCIe PHY
-
-Required properties:
-- compatible: must be "brcm,cygnus-pcie-phy"
-- reg: base address and length of the PCIe PHY block
-- #address-cells: must be 1
-- #size-cells: must be 0
-
-Each PCIe PHY should be represented by a child node
-
-Required properties For the child node:
-- reg: the PHY ID
-0 - PCIe RC 0
-1 - PCIe RC 1
-- #phy-cells: must be 0
-
-Example:
- pcie_phy: phy@301d0a0 {
- compatible = "brcm,cygnus-pcie-phy";
- reg = <0x0301d0a0 0x14>;
-
- pcie0_phy: phy@0 {
- reg = <0>;
- #phy-cells = <0>;
- };
-
- pcie1_phy: phy@1 {
- reg = <1>;
- #phy-cells = <0>;
- };
- };
-
- /* users of the PCIe phy */
-
- pcie0: pcie@18012000 {
- ...
- ...
- phys = <&pcie0_phy>;
- phy-names = "pcie-phy";
- };
-
- pcie1: pcie@18013000 {
- ...
- ...
- phys = <pcie1_phy>;
- phy-names = "pcie-phy";
- };
diff --git a/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml
new file mode 100644
index 000000000000..045699c65779
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/brcm,cygnus-pcie-phy.yaml
@@ -0,0 +1,76 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/brcm,cygnus-pcie-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom Cygnus PCIe PHY
+
+maintainers:
+ - Ray Jui <[email protected]>
+ - Scott Branden <[email protected]>
+
+properties:
+ $nodename:
+ pattern: "^pcie[-|_]phy(@.*)?$"
+
+ compatible:
+ items:
+ - const: brcm,cygnus-pcie-phy
+
+ reg:
+ maxItems: 1
+ description: >
+ Base address and length of the PCIe PHY block
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+patternProperties:
+ "^pcie-phy@[0-9]+$":
+ type: object
+ description: >
+ PCIe PHY child nodes
+
+ properties:
+ reg:
+ maxItems: 1
+ description: >
+ The PCIe PHY port number
+
+ "#phy-cells":
+ const: 0
+
+ required:
+ - reg
+ - "#phy-cells"
+
+required:
+ - compatible
+ - reg
+ - "#address-cells"
+ - "#size-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+ pcie_phy: pcie_phy@301d0a0 {
+ compatible = "brcm,cygnus-pcie-phy";
+ reg = <0x0301d0a0 0x14>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pcie0_phy: pcie-phy@0 {
+ reg = <0>;
+ #phy-cells = <0>;
+ };
+
+ pcie1_phy: pcie-phy@1 {
+ reg = <1>;
+ #phy-cells = <0>;
+ };
+ };
--
2.25.1
Conver the iProc PCIe controller Device Tree binding to YAML now that
all DTS in arch/arm and arch/arm64 have been fixed to be compliant.
Signed-off-by: Florian Fainelli <[email protected]>
---
.../bindings/pci/brcm,iproc-pcie.txt | 133 -------------
.../bindings/pci/brcm,iproc-pcie.yaml | 176 ++++++++++++++++++
2 files changed, 176 insertions(+), 133 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
create mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
diff --git a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
deleted file mode 100644
index df065aa53a83..000000000000
--- a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
+++ /dev/null
@@ -1,133 +0,0 @@
-* Broadcom iProc PCIe controller with the platform bus interface
-
-Required properties:
-- compatible:
- "brcm,iproc-pcie" for the first generation of PAXB based controller,
-used in SoCs including NSP, Cygnus, NS2, and Pegasus
- "brcm,iproc-pcie-paxb-v2" for the second generation of PAXB-based
-controllers, used in Stingray
- "brcm,iproc-pcie-paxc" for the first generation of PAXC based
-controller, used in NS2
- "brcm,iproc-pcie-paxc-v2" for the second generation of PAXC based
-controller, used in Stingray
- PAXB-based root complex is used for external endpoint devices. PAXC-based
-root complex is connected to emulated endpoint devices internal to the ASIC
-- reg: base address and length of the PCIe controller I/O register space
-- #interrupt-cells: set to <1>
-- interrupt-map-mask and interrupt-map, standard PCI properties to define the
- mapping of the PCIe interface to interrupt numbers
-- linux,pci-domain: PCI domain ID. Should be unique for each host controller
-- bus-range: PCI bus numbers covered
-- #address-cells: set to <3>
-- #size-cells: set to <2>
-- device_type: set to "pci"
-- ranges: ranges for the PCI memory and I/O regions
-
-Optional properties:
-- phys: phandle of the PCIe PHY device
-- phy-names: must be "pcie-phy"
-- dma-coherent: present if DMA operations are coherent
-- dma-ranges: Some PAXB-based root complexes do not have inbound mapping done
- by the ASIC after power on reset. In this case, SW is required to configure
-the mapping, based on inbound memory regions specified by this property.
-
-- brcm,pcie-ob: Some iProc SoCs do not have the outbound address mapping done
-by the ASIC after power on reset. In this case, SW needs to configure it
-
-If the brcm,pcie-ob property is present, the following properties become
-effective:
-
-Required:
-- brcm,pcie-ob-axi-offset: The offset from the AXI address to the internal
-address used by the iProc PCIe core (not the PCIe address)
-
-MSI support (optional):
-
-For older platforms without MSI integrated in the GIC, iProc PCIe core provides
-an event queue based MSI support. The iProc MSI uses host memories to store
-MSI posted writes in the event queues
-
-On newer iProc platforms, gicv2m or gicv3-its based MSI support should be used
-
-- msi-map: Maps a Requester ID to an MSI controller and associated MSI
-sideband data
-
-- msi-parent: Link to the device node of the MSI controller, used when no MSI
-sideband data is passed between the iProc PCIe controller and the MSI
-controller
-
-Refer to the following binding documents for more detailed description on
-the use of 'msi-map' and 'msi-parent':
- Documentation/devicetree/bindings/pci/pci-msi.txt
- Documentation/devicetree/bindings/interrupt-controller/msi.txt
-
-When the iProc event queue based MSI is used, one needs to define the
-following properties in the MSI device node:
-- compatible: Must be "brcm,iproc-msi"
-- msi-controller: claims itself as an MSI controller
-- interrupts: List of interrupt IDs from its parent interrupt device
-
-Optional properties:
-- brcm,pcie-msi-inten: Needs to be present for some older iProc platforms that
-require the interrupt enable registers to be set explicitly to enable MSI
-
-Example:
- pcie0: pcie@18012000 {
- compatible = "brcm,iproc-pcie";
- reg = <0x18012000 0x1000>;
-
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
-
- linux,pci-domain = <0>;
-
- bus-range = <0x00 0xff>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x81000000 0 0 0x28000000 0 0x00010000
- 0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
-
- phys = <&phy 0 5>;
- phy-names = "pcie-phy";
-
- brcm,pcie-ob;
- brcm,pcie-ob-axi-offset = <0x00000000>;
-
- msi-parent = <&msi0>;
-
- /* iProc event queue based MSI */
- msi0: msi@18012000 {
- compatible = "brcm,iproc-msi";
- msi-controller;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,
- <GIC_SPI 97 IRQ_TYPE_NONE>,
- <GIC_SPI 98 IRQ_TYPE_NONE>,
- <GIC_SPI 99 IRQ_TYPE_NONE>,
- };
- };
-
- pcie1: pcie@18013000 {
- compatible = "brcm,iproc-pcie";
- reg = <0x18013000 0x1000>;
-
- #interrupt-cells = <1>;
- interrupt-map-mask = <0 0 0 0>;
- interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
-
- linux,pci-domain = <1>;
-
- bus-range = <0x00 0xff>;
-
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- ranges = <0x81000000 0 0 0x48000000 0 0x00010000
- 0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
-
- phys = <&phy 1 6>;
- phy-names = "pcie-phy";
- };
diff --git a/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
new file mode 100644
index 000000000000..a9d21d89a970
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
@@ -0,0 +1,176 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pci/brcm,iproc-pcie.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom iProc PCIe controller with the platform bus interface
+
+maintainers:
+ - Ray Jui <[email protected]>
+ - Scott Branden <[email protected]>
+
+allOf:
+ - $ref: /schemas/pci/pci-bus.yaml#
+ - $ref: /schemas/interrupt-controller/msi-controller.yaml#
+
+properties:
+ compatible:
+ items:
+ - enum:
+ # for the first generation of PAXB based controller, used in SoCs
+ # including NSP, Cygnus, NS2, and Pegasus
+ - brcm,iproc-pcie
+ # for the second generation of PAXB-based controllers, used in
+ # Stingray
+ - brcm,iproc-pcie-paxb-v2
+ # For the first generation of PAXC based controller, used in NS2
+ - brcm,iproc-pcie-paxc
+ # For the second generation of PAXC based controller, used in Stingray
+ - brcm,iproc-pcie-paxc-v2
+
+ reg:
+ maxItems: 1
+ description: >
+ Base address and length of the PCIe controller I/O register space
+
+ interrupt-map: true
+
+ interrupt-map-mask: true
+
+ "#interrupt-cells":
+ const: 1
+
+ ranges:
+ minItems: 1
+ maxItems: 2
+ description: >
+ Ranges for the PCI memory and I/O regions
+
+ phys:
+ maxItems: 1
+
+ phy-names:
+ items:
+ - const: pcie-phy
+
+ dma-coherent: true
+
+ "brcm,pcie-ob":
+ type: boolean
+ description: >
+ Some iProc SoCs do not have the outbound address mapping done by the
+ ASIC after power on reset. In this case, SW needs to configure it
+
+ "brcm,pcie-ob-axi-offset":
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: >
+ The offset from the AXI address to the internal address used by the
+ iProc PCIe core (not the PCIe address)
+
+ msi:
+ type: object
+ properties:
+ compatible:
+ items:
+ - const: brcm,iproc-msi
+
+ msi-parent: true
+
+ msi-controller: true
+
+ "brcm,pcie-msi-inten":
+ type: boolean
+ description: >
+ Needs to be present for some older iProc platforms that require the
+ interrupt enable registers to be set explicitly to enable MSI
+
+dependencies:
+ "brcm,pcie-ob-axi-offset": ["brcm,pcie-ob"]
+ "brcm,pcie-msi-inten": [msi-controller]
+
+required:
+ - compatible
+ - reg
+ - ranges
+
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - brcm,iproc-pcie
+then:
+ required:
+ - interrupt-map
+ - interrupt-map-mask
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ bus {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ pcie0: pcie@18012000 {
+ compatible = "brcm,iproc-pcie";
+ reg = <0x18012000 0x1000>;
+
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 100 IRQ_TYPE_NONE>;
+
+ linux,pci-domain = <0>;
+
+ bus-range = <0x00 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x81000000 0 0 0x28000000 0 0x00010000>,
+ <0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
+
+ phys = <&phy 0 5>;
+ phy-names = "pcie-phy";
+
+ brcm,pcie-ob;
+ brcm,pcie-ob-axi-offset = <0x00000000>;
+
+ msi-parent = <&msi0>;
+
+ /* iProc event queue based MSI */
+ msi0: msi {
+ compatible = "brcm,iproc-msi";
+ msi-controller;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>,
+ <GIC_SPI 97 IRQ_TYPE_NONE>,
+ <GIC_SPI 98 IRQ_TYPE_NONE>,
+ <GIC_SPI 99 IRQ_TYPE_NONE>;
+ };
+ };
+
+ pcie1: pcie@18013000 {
+ compatible = "brcm,iproc-pcie";
+ reg = <0x18013000 0x1000>;
+
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0>;
+ interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_NONE>;
+
+ linux,pci-domain = <1>;
+
+ bus-range = <0x00 0xff>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x81000000 0 0 0x48000000 0 0x00010000>,
+ <0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
+
+ phys = <&phy 1 6>;
+ phy-names = "pcie-phy";
+ };
+ };
--
2.25.1
On Tue, 07 Dec 2021 20:04:32 -0800, Florian Fainelli wrote:
> Conver the iProc PCIe controller Device Tree binding to YAML now that
> all DTS in arch/arm and arch/arm64 have been fixed to be compliant.
>
> Signed-off-by: Florian Fainelli <[email protected]>
> ---
> .../bindings/pci/brcm,iproc-pcie.txt | 133 -------------
> .../bindings/pci/brcm,iproc-pcie.yaml | 176 ++++++++++++++++++
> 2 files changed, 176 insertions(+), 133 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
> create mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/1565076
pcie@18012000: msi-controller: 'oneOf' conditional failed, one must be fixed:
arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dt.yaml
arch/arm/boot/dts/bcm911360_entphn.dt.yaml
arch/arm/boot/dts/bcm911360k.dt.yaml
arch/arm/boot/dts/bcm958300k.dt.yaml
arch/arm/boot/dts/bcm958305k.dt.yaml
arch/arm/boot/dts/bcm958522er.dt.yaml
arch/arm/boot/dts/bcm958525er.dt.yaml
arch/arm/boot/dts/bcm958525xmc.dt.yaml
arch/arm/boot/dts/bcm958622hr.dt.yaml
arch/arm/boot/dts/bcm958623hr.dt.yaml
arch/arm/boot/dts/bcm958625hr.dt.yaml
arch/arm/boot/dts/bcm958625k.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx64.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx64w.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx65.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx65w.dt.yaml
arch/arm/boot/dts/bcm988312hr.dt.yaml
pcie@18012000: ranges: 'oneOf' conditional failed, one must be fixed:
arch/arm/boot/dts/bcm911360_entphn.dt.yaml
arch/arm/boot/dts/bcm911360_entphn.dt.yaml
arch/arm/boot/dts/bcm911360k.dt.yaml
arch/arm/boot/dts/bcm911360k.dt.yaml
arch/arm/boot/dts/bcm958300k.dt.yaml
arch/arm/boot/dts/bcm958300k.dt.yaml
arch/arm/boot/dts/bcm958305k.dt.yaml
arch/arm/boot/dts/bcm958305k.dt.yaml
pcie@18012000: Unevaluated properties are not allowed ('linux,pci-domain', 'bus-range', '#address-cells', '#size-cells', 'device_type' were unexpected)
arch/arm/boot/dts/bcm911360_entphn.dt.yaml
arch/arm/boot/dts/bcm911360k.dt.yaml
arch/arm/boot/dts/bcm958300k.dt.yaml
arch/arm/boot/dts/bcm958305k.dt.yaml
pcie@18013000: msi-controller: 'oneOf' conditional failed, one must be fixed:
arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dt.yaml
arch/arm/boot/dts/bcm911360_entphn.dt.yaml
arch/arm/boot/dts/bcm911360k.dt.yaml
arch/arm/boot/dts/bcm958300k.dt.yaml
arch/arm/boot/dts/bcm958305k.dt.yaml
arch/arm/boot/dts/bcm958522er.dt.yaml
arch/arm/boot/dts/bcm958525er.dt.yaml
arch/arm/boot/dts/bcm958525xmc.dt.yaml
arch/arm/boot/dts/bcm958622hr.dt.yaml
arch/arm/boot/dts/bcm958623hr.dt.yaml
arch/arm/boot/dts/bcm958625hr.dt.yaml
arch/arm/boot/dts/bcm958625k.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx64.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx64w.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx65.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx65w.dt.yaml
arch/arm/boot/dts/bcm988312hr.dt.yaml
pcie@18013000: ranges: 'oneOf' conditional failed, one must be fixed:
arch/arm/boot/dts/bcm911360_entphn.dt.yaml
arch/arm/boot/dts/bcm911360_entphn.dt.yaml
arch/arm/boot/dts/bcm911360k.dt.yaml
arch/arm/boot/dts/bcm911360k.dt.yaml
arch/arm/boot/dts/bcm958300k.dt.yaml
arch/arm/boot/dts/bcm958300k.dt.yaml
arch/arm/boot/dts/bcm958305k.dt.yaml
arch/arm/boot/dts/bcm958305k.dt.yaml
pcie@18013000: Unevaluated properties are not allowed ('linux,pci-domain', 'bus-range', '#address-cells', '#size-cells', 'device_type' were unexpected)
arch/arm/boot/dts/bcm911360_entphn.dt.yaml
arch/arm/boot/dts/bcm911360k.dt.yaml
arch/arm/boot/dts/bcm958300k.dt.yaml
arch/arm/boot/dts/bcm958305k.dt.yaml
pcie@18014000: msi-controller: 'oneOf' conditional failed, one must be fixed:
arch/arm/boot/dts/bcm958522er.dt.yaml
arch/arm/boot/dts/bcm958525er.dt.yaml
arch/arm/boot/dts/bcm958525xmc.dt.yaml
arch/arm/boot/dts/bcm958622hr.dt.yaml
arch/arm/boot/dts/bcm958623hr.dt.yaml
arch/arm/boot/dts/bcm958625hr.dt.yaml
arch/arm/boot/dts/bcm958625k.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx64.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx64w.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx65.dt.yaml
arch/arm/boot/dts/bcm958625-meraki-mx65w.dt.yaml
arch/arm/boot/dts/bcm988312hr.dt.yaml
On Tue, Dec 7, 2021 at 10:04 PM Florian Fainelli <[email protected]> wrote:
>
> Rename the msi controller unit name to 'msi' to avoid collisions
> with the 'msi-controller' boolean property and add the missing
> 'interrupt-controller' property which is necessary. We also need to
'interrupt-controller'part should be dropped...
> re-arrange the 'ranges' property to show the two cells as being separate
> instead of combined since the DT checker is not able to differentiate
> otherwise.
>
> Signed-off-by: Florian Fainelli <[email protected]>
> ---
> arch/arm/boot/dts/bcm-cygnus.dtsi | 13 +++++++------
> 1 file changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
> index 8ecb7861ce10..d6e2b2ba3a19 100644
> --- a/arch/arm/boot/dts/bcm-cygnus.dtsi
> +++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
> @@ -274,8 +274,8 @@ pcie0: pcie@18012000 {
> #address-cells = <3>;
> #size-cells = <2>;
> device_type = "pci";
> - ranges = <0x81000000 0 0 0x28000000 0 0x00010000
> - 0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
> + ranges = <0x81000000 0 0 0x28000000 0 0x00010000>,
> + <0x82000000 0 0x20000000 0x20000000 0 0x04000000>;
>
> phys = <&pcie0_phy>;
> phy-names = "pcie-phy";
> @@ -283,7 +283,7 @@ pcie0: pcie@18012000 {
> status = "disabled";
>
> msi-parent = <&msi0>;
> - msi0: msi-controller {
> + msi0: msi {
> compatible = "brcm,iproc-msi";
> msi-controller;
> interrupt-parent = <&gic>;
> @@ -298,6 +298,7 @@ pcie1: pcie@18013000 {
> compatible = "brcm,iproc-pcie";
> reg = <0x18013000 0x1000>;
>
> + interrupt-controller;
Missed dropping this?
> #interrupt-cells = <1>;
> interrupt-map-mask = <0 0 0 0>;
> interrupt-map = <0 0 0 0 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
> @@ -309,8 +310,8 @@ pcie1: pcie@18013000 {
> #address-cells = <3>;
> #size-cells = <2>;
> device_type = "pci";
> - ranges = <0x81000000 0 0 0x48000000 0 0x00010000
> - 0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
> + ranges = <0x81000000 0 0 0x48000000 0 0x00010000>,
> + <0x82000000 0 0x40000000 0x40000000 0 0x04000000>;
>
> phys = <&pcie1_phy>;
> phy-names = "pcie-phy";
> @@ -318,7 +319,7 @@ pcie1: pcie@18013000 {
> status = "disabled";
>
> msi-parent = <&msi1>;
> - msi1: msi-controller {
> + msi1: msi {
> compatible = "brcm,iproc-msi";
> msi-controller;
> interrupt-parent = <&gic>;
> --
> 2.25.1
>
On 12/8/21 5:44 AM, Rob Herring wrote:
> On Tue, 07 Dec 2021 20:04:32 -0800, Florian Fainelli wrote:
>> Conver the iProc PCIe controller Device Tree binding to YAML now that
>> all DTS in arch/arm and arch/arm64 have been fixed to be compliant.
>>
>> Signed-off-by: Florian Fainelli <[email protected]>
>> ---
>> .../bindings/pci/brcm,iproc-pcie.txt | 133 -------------
>> .../bindings/pci/brcm,iproc-pcie.yaml | 176 ++++++++++++++++++
>> 2 files changed, 176 insertions(+), 133 deletions(-)
>> delete mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
>> create mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
>>
>
> Running 'make dtbs_check' with the schema in this patch gives the
> following warnings. Consider if they are expected or the schema is
> incorrect. These may not be new warnings.
>
> Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> This will change in the future.
>
> Full log is available here: https://patchwork.ozlabs.org/patch/1565076
>
>
> pcie@18012000: msi-controller: 'oneOf' conditional failed, one must be fixed:
> arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dt.yaml
> arch/arm/boot/dts/bcm911360_entphn.dt.yaml
> arch/arm/boot/dts/bcm911360k.dt.yaml
> arch/arm/boot/dts/bcm958300k.dt.yaml
> arch/arm/boot/dts/bcm958305k.dt.yaml
> arch/arm/boot/dts/bcm958522er.dt.yaml
> arch/arm/boot/dts/bcm958525er.dt.yaml
> arch/arm/boot/dts/bcm958525xmc.dt.yaml
> arch/arm/boot/dts/bcm958622hr.dt.yaml
> arch/arm/boot/dts/bcm958623hr.dt.yaml
> arch/arm/boot/dts/bcm958625hr.dt.yaml
> arch/arm/boot/dts/bcm958625k.dt.yaml
> arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dt.yaml
> arch/arm/boot/dts/bcm958625-meraki-mx64.dt.yaml
> arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dt.yaml
> arch/arm/boot/dts/bcm958625-meraki-mx64w.dt.yaml
> arch/arm/boot/dts/bcm958625-meraki-mx65.dt.yaml
> arch/arm/boot/dts/bcm958625-meraki-mx65w.dt.yaml
> arch/arm/boot/dts/bcm988312hr.dt.yaml
Those would mean that the binding patch was applied without the DTS
patches earlier in the series?
--
Florian
On Wed, Dec 8, 2021 at 11:32 AM Florian Fainelli <[email protected]> wrote:
>
> On 12/8/21 5:44 AM, Rob Herring wrote:
> > On Tue, 07 Dec 2021 20:04:32 -0800, Florian Fainelli wrote:
> >> Conver the iProc PCIe controller Device Tree binding to YAML now that
> >> all DTS in arch/arm and arch/arm64 have been fixed to be compliant.
> >>
> >> Signed-off-by: Florian Fainelli <[email protected]>
> >> ---
> >> .../bindings/pci/brcm,iproc-pcie.txt | 133 -------------
> >> .../bindings/pci/brcm,iproc-pcie.yaml | 176 ++++++++++++++++++
> >> 2 files changed, 176 insertions(+), 133 deletions(-)
> >> delete mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
> >> create mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
> >>
> >
> > Running 'make dtbs_check' with the schema in this patch gives the
> > following warnings. Consider if they are expected or the schema is
> > incorrect. These may not be new warnings.
> >
> > Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> > This will change in the future.
> >
> > Full log is available here: https://patchwork.ozlabs.org/patch/1565076
> >
> >
> > pcie@18012000: msi-controller: 'oneOf' conditional failed, one must be fixed:
> > arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dt.yaml
> > arch/arm/boot/dts/bcm911360_entphn.dt.yaml
> > arch/arm/boot/dts/bcm911360k.dt.yaml
> > arch/arm/boot/dts/bcm958300k.dt.yaml
> > arch/arm/boot/dts/bcm958305k.dt.yaml
> > arch/arm/boot/dts/bcm958522er.dt.yaml
> > arch/arm/boot/dts/bcm958525er.dt.yaml
> > arch/arm/boot/dts/bcm958525xmc.dt.yaml
> > arch/arm/boot/dts/bcm958622hr.dt.yaml
> > arch/arm/boot/dts/bcm958623hr.dt.yaml
> > arch/arm/boot/dts/bcm958625hr.dt.yaml
> > arch/arm/boot/dts/bcm958625k.dt.yaml
> > arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dt.yaml
> > arch/arm/boot/dts/bcm958625-meraki-mx64.dt.yaml
> > arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dt.yaml
> > arch/arm/boot/dts/bcm958625-meraki-mx64w.dt.yaml
> > arch/arm/boot/dts/bcm958625-meraki-mx65.dt.yaml
> > arch/arm/boot/dts/bcm958625-meraki-mx65w.dt.yaml
> > arch/arm/boot/dts/bcm988312hr.dt.yaml
>
> Those would mean that the binding patch was applied without the DTS
> patches earlier in the series?
Right. I generally don't look at dts patches, but I did look at these
and don't see how this one is fixed (nor caused):
pcie@18012000: Unevaluated properties are not allowed
('linux,pci-domain', 'bus-range', '#address-cells', '#size-cells',
'device_type' were unexpected)
arch/arm/boot/dts/bcm911360_entphn.dt.yaml
arch/arm/boot/dts/bcm911360k.dt.yaml
arch/arm/boot/dts/bcm958300k.dt.yaml
arch/arm/boot/dts/bcm958305k.dt.yaml
On Wed, Dec 8, 2021 at 4:21 PM Rob Herring <[email protected]> wrote:
>
> On Wed, Dec 8, 2021 at 11:32 AM Florian Fainelli <[email protected]> wrote:
> >
> > On 12/8/21 5:44 AM, Rob Herring wrote:
> > > On Tue, 07 Dec 2021 20:04:32 -0800, Florian Fainelli wrote:
> > >> Conver the iProc PCIe controller Device Tree binding to YAML now that
> > >> all DTS in arch/arm and arch/arm64 have been fixed to be compliant.
> > >>
> > >> Signed-off-by: Florian Fainelli <[email protected]>
> > >> ---
> > >> .../bindings/pci/brcm,iproc-pcie.txt | 133 -------------
> > >> .../bindings/pci/brcm,iproc-pcie.yaml | 176 ++++++++++++++++++
> > >> 2 files changed, 176 insertions(+), 133 deletions(-)
> > >> delete mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
> > >> create mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.yaml
> > >>
> > >
> > > Running 'make dtbs_check' with the schema in this patch gives the
> > > following warnings. Consider if they are expected or the schema is
> > > incorrect. These may not be new warnings.
> > >
> > > Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> > > This will change in the future.
> > >
> > > Full log is available here: https://patchwork.ozlabs.org/patch/1565076
> > >
> > >
> > > pcie@18012000: msi-controller: 'oneOf' conditional failed, one must be fixed:
> > > arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dt.yaml
> > > arch/arm/boot/dts/bcm911360_entphn.dt.yaml
> > > arch/arm/boot/dts/bcm911360k.dt.yaml
> > > arch/arm/boot/dts/bcm958300k.dt.yaml
> > > arch/arm/boot/dts/bcm958305k.dt.yaml
> > > arch/arm/boot/dts/bcm958522er.dt.yaml
> > > arch/arm/boot/dts/bcm958525er.dt.yaml
> > > arch/arm/boot/dts/bcm958525xmc.dt.yaml
> > > arch/arm/boot/dts/bcm958622hr.dt.yaml
> > > arch/arm/boot/dts/bcm958623hr.dt.yaml
> > > arch/arm/boot/dts/bcm958625hr.dt.yaml
> > > arch/arm/boot/dts/bcm958625k.dt.yaml
> > > arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dt.yaml
> > > arch/arm/boot/dts/bcm958625-meraki-mx64.dt.yaml
> > > arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dt.yaml
> > > arch/arm/boot/dts/bcm958625-meraki-mx64w.dt.yaml
> > > arch/arm/boot/dts/bcm958625-meraki-mx65.dt.yaml
> > > arch/arm/boot/dts/bcm958625-meraki-mx65w.dt.yaml
> > > arch/arm/boot/dts/bcm988312hr.dt.yaml
> >
> > Those would mean that the binding patch was applied without the DTS
> > patches earlier in the series?
>
> Right. I generally don't look at dts patches, but I did look at these
> and don't see how this one is fixed (nor caused):
Note that unevaluatedProperties is only enabled in the dtschema main branch.
Rob