The work consisted of:
- Fixed typo in ufshcd-pltfrm.c
- Tweak ufshcd.c for UFS 2.0 support
- Implement ufshcd-dwc which contains all DWC HW specific code
- Unipro attributes were added and new registers were added to the driver
- Implement a tc-dwc-g210 containing G210 MPHY specific code
- Implement a tc-dwc-g210 glue platform driver
- Implement a tc-dwc-g210 glue pci driver
- Documentation update
Remark: The individual patches are not atomic, depending on other patches of
the set. The patch set was made like this to improve readability.
Joao Pinto (6):
fixed typo in ufshcd-pltfrm
added UFS 2.0 capabilities
added support for DesignWare Controller
added support for Synopsys G210 Test Chip
add TC G210 platform driver
add TC G210 pci driver
.../devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt | 26 ++
.../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 4 +-
MAINTAINERS | 6 +
drivers/scsi/ufs/Kconfig | 25 ++
drivers/scsi/ufs/Makefile | 4 +
drivers/scsi/ufs/tc-dwc-g210-pci.c | 178 ++++++++++++
drivers/scsi/ufs/tc-dwc-g210-pltfrm.c | 109 +++++++
drivers/scsi/ufs/tc-dwc-g210.c | 315 +++++++++++++++++++++
drivers/scsi/ufs/tc-dwc-g210.h | 19 ++
drivers/scsi/ufs/ufshcd-dwc.c | 150 ++++++++++
drivers/scsi/ufs/ufshcd-dwc.h | 26 ++
drivers/scsi/ufs/ufshcd-pltfrm.c | 2 +-
drivers/scsi/ufs/ufshcd.c | 29 +-
drivers/scsi/ufs/ufshcd.h | 2 +
drivers/scsi/ufs/ufshci-dwc.h | 42 +++
drivers/scsi/ufs/ufshci.h | 1 +
drivers/scsi/ufs/unipro.h | 39 +++
17 files changed, 970 insertions(+), 7 deletions(-)
create mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
create mode 100644 drivers/scsi/ufs/tc-dwc-g210-pci.c
create mode 100644 drivers/scsi/ufs/tc-dwc-g210-pltfrm.c
create mode 100644 drivers/scsi/ufs/tc-dwc-g210.c
create mode 100644 drivers/scsi/ufs/tc-dwc-g210.h
create mode 100644 drivers/scsi/ufs/ufshcd-dwc.c
create mode 100644 drivers/scsi/ufs/ufshcd-dwc.h
create mode 100644 drivers/scsi/ufs/ufshci-dwc.h
--
1.8.1.5
Fixed typo in ufshcd-pltfrm.
Signed-off-by: Joao Pinto <[email protected]>
---
Changes v0->v10:
- Nothing changed (just to keep up with patch set version).
drivers/scsi/ufs/ufshcd-pltfrm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/scsi/ufs/ufshcd-pltfrm.c b/drivers/scsi/ufs/ufshcd-pltfrm.c
index d2a7b12..0522891 100644
--- a/drivers/scsi/ufs/ufshcd-pltfrm.c
+++ b/drivers/scsi/ufs/ufshcd-pltfrm.c
@@ -353,6 +353,6 @@ EXPORT_SYMBOL_GPL(ufshcd_pltfrm_init);
MODULE_AUTHOR("Santosh Yaragnavi <[email protected]>");
MODULE_AUTHOR("Vinayak Holikatti <[email protected]>");
-MODULE_DESCRIPTION("UFS host controller Pltform bus based glue driver");
+MODULE_DESCRIPTION("UFS host controller Platform bus based glue driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(UFSHCD_DRIVER_VERSION);
--
1.8.1.5
Adding UFS 2.0 support to the UFS core driver.
Signed-off-by: Joao Pinto <[email protected]>
---
Changes v8->v10:
- Nothing changed (just to keep up with patch set version).
Changes v7->v8:
- Added "jedec, ufs-2.0" to the ufschd-platform compatibility strings
Changes v0->v7:
- Nothing changed (just to keep up with patch set version).
.../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 4 +--
drivers/scsi/ufs/ufshcd.c | 29 +++++++++++++++++++---
drivers/scsi/ufs/ufshci.h | 1 +
3 files changed, 28 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
index 03c0e98..8d9a9d2 100644
--- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
+++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
@@ -4,8 +4,8 @@ UFSHC nodes are defined to describe on-chip UFS host controllers.
Each UFS controller instance should have its own node.
Required properties:
-- compatible : must contain "jedec,ufs-1.1", may also list one or more
- of the following:
+- compatible : must contain "jedec,ufs-1.1" or "jedec,ufs-2.0", may
+ also list one or more of the following:
"qcom,msm8994-ufshc"
"qcom,msm8996-ufshc"
"qcom,ufshc"
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
index 85cd256..2b5f2bf 100644
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -1223,6 +1223,7 @@ static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
ret = -EINVAL;
}
break;
+ case UTP_CMD_TYPE_UFS_STORAGE:
case UTP_CMD_TYPE_DEV_MANAGE:
ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
@@ -1287,6 +1288,7 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
struct ufshcd_lrb *lrbp;
struct ufs_hba *hba;
unsigned long flags;
+ u32 upiu_flags;
int tag;
int err = 0;
@@ -1343,10 +1345,23 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
lrbp->task_tag = tag;
lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
- lrbp->command_type = UTP_CMD_TYPE_SCSI;
+
+ if (hba->ufs_version == UFSHCI_VERSION_20)
+ lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
+ else
+ lrbp->command_type = UTP_CMD_TYPE_SCSI;
/* form UPIU before issuing the command */
- ufshcd_compose_upiu(hba, lrbp);
+ if (hba->ufs_version == UFSHCI_VERSION_20) {
+ if (likely(lrbp->cmd)) {
+ ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
+ lrbp->cmd->sc_data_direction);
+ ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
+ } else
+ err = -EINVAL;
+ } else
+ ufshcd_compose_upiu(hba, lrbp);
+
err = ufshcd_map_sg(lrbp);
if (err) {
lrbp->cmd = NULL;
@@ -1371,7 +1386,12 @@ static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
lrbp->sense_buffer = NULL;
lrbp->task_tag = tag;
lrbp->lun = 0; /* device management cmd is not specific to any LUN */
- lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
+
+ if (hba->ufs_version == UFSHCI_VERSION_20)
+ lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
+ else
+ lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
+
lrbp->intr_cmd = true; /* No interrupt aggregation */
hba->dev_cmd.type = cmd_type;
@@ -3187,7 +3207,8 @@ static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
/* Do not touch lrbp after scsi done */
cmd->scsi_done(cmd);
__ufshcd_release(hba);
- } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) {
+ } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
+ lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
if (hba->dev_cmd.complete)
complete(hba->dev_cmd.complete);
}
diff --git a/drivers/scsi/ufs/ufshci.h b/drivers/scsi/ufs/ufshci.h
index 0ae0967..8dba0e7 100644
--- a/drivers/scsi/ufs/ufshci.h
+++ b/drivers/scsi/ufs/ufshci.h
@@ -273,6 +273,7 @@ enum {
UTP_CMD_TYPE_SCSI = 0x0,
UTP_CMD_TYPE_UFS = 0x1,
UTP_CMD_TYPE_DEV_MANAGE = 0x2,
+ UTP_CMD_TYPE_UFS_STORAGE = 0x11,
};
enum {
--
1.8.1.5
This patch adds support for Synopsys G210 Test Chip.
Signed-off-by: Joao Pinto <[email protected]>
---
Changes v0->v10:
- This patch only appeared in v10
drivers/scsi/ufs/Kconfig | 4 +
drivers/scsi/ufs/Makefile | 1 +
drivers/scsi/ufs/tc-dwc-g210.c | 315 +++++++++++++++++++++++++++++++++++++++++
drivers/scsi/ufs/tc-dwc-g210.h | 19 +++
4 files changed, 339 insertions(+)
create mode 100644 drivers/scsi/ufs/tc-dwc-g210.c
create mode 100644 drivers/scsi/ufs/tc-dwc-g210.h
diff --git a/drivers/scsi/ufs/Kconfig b/drivers/scsi/ufs/Kconfig
index 647c324..9d218f9 100644
--- a/drivers/scsi/ufs/Kconfig
+++ b/drivers/scsi/ufs/Kconfig
@@ -86,3 +86,7 @@ config SCSI_UFS_QCOM
config SCSI_UFS_DWC
bool
+
+config SCSI_UFS_DWC_TC
+ bool
+ select SCSI_UFS_DWC
diff --git a/drivers/scsi/ufs/Makefile b/drivers/scsi/ufs/Makefile
index ccbad53..9468d7b 100644
--- a/drivers/scsi/ufs/Makefile
+++ b/drivers/scsi/ufs/Makefile
@@ -1,5 +1,6 @@
# UFSHCD makefile
obj-$(CONFIG_SCSI_UFS_DWC) += ufshcd-dwc.o
+obj-$(CONFIG_SCSI_UFS_DWC_TC) += tc-dwc-g210.o
obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
diff --git a/drivers/scsi/ufs/tc-dwc-g210.c b/drivers/scsi/ufs/tc-dwc-g210.c
new file mode 100644
index 0000000..181f208
--- /dev/null
+++ b/drivers/scsi/ufs/tc-dwc-g210.c
@@ -0,0 +1,315 @@
+/*
+ * Synopsys G210 Test Chip driver
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (http://www.synopsys.com)
+ *
+ * Authors: Joao Pinto <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "ufshcd.h"
+#include "unipro.h"
+
+#include "ufshcd-dwc.h"
+#include "ufshci-dwc.h"
+
+/**
+ * tc_dwc_g210_setup_40bit_rmmi()
+ * This function configures Synopsys TC specific atributes (40-bit RMMI)
+ * @hba: Pointer to drivers structure
+ *
+ * Returns 0 on success or non-zero value on failure
+ */
+static int tc_dwc_g210_setup_40bit_rmmi(struct ufs_hba *hba)
+{
+ const struct ufshcd_dme_attr_val setup_attrs[] = {
+ { UIC_ARG_MIB(TX_GLOBALHIBERNATE), 0x00, DME_LOCAL },
+ { UIC_ARG_MIB(REFCLKMODE), 0x01, DME_LOCAL },
+ { UIC_ARG_MIB(CDIRECTCTRL6), 0x80, DME_LOCAL },
+ { UIC_ARG_MIB(CBDIVFACTOR), 0x08, DME_LOCAL },
+ { UIC_ARG_MIB(CBDCOCTRL5), 0x64, DME_LOCAL },
+ { UIC_ARG_MIB(CBPRGTUNING), 0x09, DME_LOCAL },
+ { UIC_ARG_MIB(RTOBSERVESELECT), 0x00, DME_LOCAL },
+ { UIC_ARG_MIB_SEL(TX_REFCLKFREQ, SELIND_LN0_TX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(TX_CFGCLKFREQVAL, SELIND_LN0_TX), 0x19,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGEXTRATTR, SELIND_LN0_TX), 0x14,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(DITHERCTRL2, SELIND_LN0_TX), 0xd6,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RX_REFCLKFREQ, SELIND_LN0_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RX_CFGCLKFREQVAL, SELIND_LN0_RX), 0x19,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGWIDEINLN, SELIND_LN0_RX), 4,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXCDR8, SELIND_LN0_RX), 0x80,
+ DME_LOCAL },
+ { UIC_ARG_MIB(DIRECTCTRL10), 0x04, DME_LOCAL },
+ { UIC_ARG_MIB(DIRECTCTRL19), 0x02, DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXCDR8, SELIND_LN0_RX), 0x80,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG4, SELIND_LN0_RX), 0x03,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR8, SELIND_LN0_RX), 0x16,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXDIRECTCTRL2, SELIND_LN0_RX), 0x42,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG3, SELIND_LN0_RX), 0xa4,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXCALCTRL, SELIND_LN0_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG2, SELIND_LN0_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR4, SELIND_LN0_RX), 0x28,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXSQCTRL, SELIND_LN0_RX), 0x1E,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR6, SELIND_LN0_RX), 0x2f,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR6, SELIND_LN0_RX), 0x2f,
+ DME_LOCAL },
+ { UIC_ARG_MIB(CBPRGPLL2), 0x00, DME_LOCAL },
+ };
+
+ return ufshcd_dwc_dme_set_attrs(hba, setup_attrs,
+ ARRAY_SIZE(setup_attrs));
+}
+
+/**
+ * tc_dwc_g210_setup_20bit_rmmi_lane0()
+ * This function configures Synopsys TC 20-bit RMMI Lane 0
+ * @hba: Pointer to drivers structure
+ *
+ * Returns 0 on success or non-zero value on failure
+ */
+static int tc_dwc_g210_setup_20bit_rmmi_lane0(struct ufs_hba *hba)
+{
+ const struct ufshcd_dme_attr_val setup_attrs[] = {
+ { UIC_ARG_MIB_SEL(TX_REFCLKFREQ, SELIND_LN0_TX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(TX_CFGCLKFREQVAL, SELIND_LN0_TX), 0x19,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RX_CFGCLKFREQVAL, SELIND_LN0_RX), 0x19,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGEXTRATTR, SELIND_LN0_TX), 0x12,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(DITHERCTRL2, SELIND_LN0_TX), 0xd6,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RX_REFCLKFREQ, SELIND_LN0_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGWIDEINLN, SELIND_LN0_RX), 2,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXCDR8, SELIND_LN0_RX), 0x80,
+ DME_LOCAL },
+ { UIC_ARG_MIB(DIRECTCTRL10), 0x04, DME_LOCAL },
+ { UIC_ARG_MIB(DIRECTCTRL19), 0x02, DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG4, SELIND_LN0_RX), 0x03,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR8, SELIND_LN0_RX), 0x16,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXDIRECTCTRL2, SELIND_LN0_RX), 0x42,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG3, SELIND_LN0_RX), 0xa4,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXCALCTRL, SELIND_LN0_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG2, SELIND_LN0_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR4, SELIND_LN0_RX), 0x28,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXSQCTRL, SELIND_LN0_RX), 0x1E,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR6, SELIND_LN0_RX), 0x2f,
+ DME_LOCAL },
+ { UIC_ARG_MIB(CBPRGPLL2), 0x00, DME_LOCAL },
+ };
+
+ return ufshcd_dwc_dme_set_attrs(hba, setup_attrs,
+ ARRAY_SIZE(setup_attrs));
+}
+
+/**
+ * tc_dwc_g210_setup_20bit_rmmi_lane1()
+ * This function configures Synopsys TC 20-bit RMMI Lane 1
+ * @hba: Pointer to drivers structure
+ *
+ * Returns 0 on success or non-zero value on failure
+ */
+static int tc_dwc_g210_setup_20bit_rmmi_lane1(struct ufs_hba *hba)
+{
+ int connected_rx_lanes = 0;
+ int connected_tx_lanes = 0;
+ int ret = 0;
+
+ const struct ufshcd_dme_attr_val setup_tx_attrs[] = {
+ { UIC_ARG_MIB_SEL(TX_REFCLKFREQ, SELIND_LN1_TX), 0x0d,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(TX_CFGCLKFREQVAL, SELIND_LN1_TX), 0x19,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGEXTRATTR, SELIND_LN1_TX), 0x12,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(DITHERCTRL2, SELIND_LN0_TX), 0xd6,
+ DME_LOCAL },
+ };
+
+ const struct ufshcd_dme_attr_val setup_rx_attrs[] = {
+ { UIC_ARG_MIB_SEL(RX_REFCLKFREQ, SELIND_LN1_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RX_CFGCLKFREQVAL, SELIND_LN1_RX), 0x19,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGWIDEINLN, SELIND_LN1_RX), 2,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXCDR8, SELIND_LN1_RX), 0x80,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG4, SELIND_LN1_RX), 0x03,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR8, SELIND_LN1_RX), 0x16,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXDIRECTCTRL2, SELIND_LN1_RX), 0x42,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG3, SELIND_LN1_RX), 0xa4,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXCALCTRL, SELIND_LN1_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(ENARXDIRECTCFG2, SELIND_LN1_RX), 0x01,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR4, SELIND_LN1_RX), 0x28,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(RXSQCTRL, SELIND_LN1_RX), 0x1E,
+ DME_LOCAL },
+ { UIC_ARG_MIB_SEL(CFGRXOVR6, SELIND_LN1_RX), 0x2f,
+ DME_LOCAL },
+ };
+
+ /* Get the available lane count */
+ ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
+ &connected_rx_lanes);
+ ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
+ &connected_tx_lanes);
+
+ if (connected_tx_lanes == 2) {
+
+ ret = ufshcd_dwc_dme_set_attrs(hba, setup_tx_attrs,
+ ARRAY_SIZE(setup_tx_attrs));
+
+ if (ret)
+ goto out;
+ }
+
+ if (connected_rx_lanes == 2) {
+ ret = ufshcd_dwc_dme_set_attrs(hba, setup_rx_attrs,
+ ARRAY_SIZE(setup_rx_attrs));
+ }
+
+out:
+ return ret;
+}
+
+/**
+ * tc_dwc_g210_setup_20bit_rmmi()
+ * This function configures Synopsys TC specific atributes (20-bit RMMI)
+ * @hba: Pointer to drivers structure
+ *
+ * Returns 0 on success or non-zero value on failure
+ */
+static int tc_dwc_g210_setup_20bit_rmmi(struct ufs_hba *hba)
+{
+ int ret = 0;
+
+ const struct ufshcd_dme_attr_val setup_attrs[] = {
+ { UIC_ARG_MIB(TX_GLOBALHIBERNATE), 0x00, DME_LOCAL },
+ { UIC_ARG_MIB(REFCLKMODE), 0x01, DME_LOCAL },
+ { UIC_ARG_MIB(CDIRECTCTRL6), 0xc0, DME_LOCAL },
+ { UIC_ARG_MIB(CBDIVFACTOR), 0x44, DME_LOCAL },
+ { UIC_ARG_MIB(CBDCOCTRL5), 0x64, DME_LOCAL },
+ { UIC_ARG_MIB(CBPRGTUNING), 0x09, DME_LOCAL },
+ { UIC_ARG_MIB(RTOBSERVESELECT), 0x00, DME_LOCAL },
+ };
+
+ ret = ufshcd_dwc_dme_set_attrs(hba, setup_attrs,
+ ARRAY_SIZE(setup_attrs));
+ if (ret)
+ goto out;
+
+ /* Lane 0 configuration*/
+ ret = tc_dwc_g210_setup_20bit_rmmi_lane0(hba);
+ if (ret)
+ goto out;
+
+ /* Lane 1 configuration*/
+ ret = tc_dwc_g210_setup_20bit_rmmi_lane1(hba);
+ if (ret)
+ goto out;
+
+out:
+ return ret;
+}
+
+/**
+ * tc_dwc_g210_config_40_bit()
+ * This function configures Local (host) Synopsys 40-bit TC specific attributes
+ *
+ * @hba: Pointer to drivers structure
+ *
+ * Returns 0 on success non-zero value on failure
+ */
+int tc_dwc_g210_config_40_bit(struct ufs_hba *hba)
+{
+ int ret = 0;
+
+ dev_info(hba->dev, "Configuring Test Chip 40-bit RMMI\n");
+ ret = tc_dwc_g210_setup_40bit_rmmi(hba);
+ if (ret) {
+ dev_err(hba->dev, "Configuration failed\n");
+ goto out;
+ }
+
+ /* To write Shadow register bank to effective configuration block */
+ ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYCFGUPDT), 0x01);
+ if (ret)
+ goto out;
+
+ /* To configure Debug OMC */
+ ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_DEBUGOMC), 0x01);
+
+out:
+ return ret;
+}
+EXPORT_SYMBOL(tc_dwc_g210_config_40_bit);
+
+/**
+ * tc_dwc_g210_config_20_bit()
+ * This function configures Local (host) Synopsys 20-bit TC specific attributes
+ *
+ * @hba: Pointer to drivers structure
+ *
+ * Returns 0 on success non-zero value on failure
+ */
+int tc_dwc_g210_config_20_bit(struct ufs_hba *hba)
+{
+ int ret = 0;
+
+ dev_info(hba->dev, "Configuring Test Chip 20-bit RMMI\n");
+ ret = tc_dwc_g210_setup_20bit_rmmi(hba);
+ if (ret) {
+ dev_err(hba->dev, "Configuration failed\n");
+ goto out;
+ }
+
+ /* To write Shadow register bank to effective configuration block */
+ ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_MPHYCFGUPDT), 0x01);
+ if (ret)
+ goto out;
+
+ /* To configure Debug OMC */
+ ret = ufshcd_dme_set(hba, UIC_ARG_MIB(VS_DEBUGOMC), 0x01);
+
+out:
+ return ret;
+}
+EXPORT_SYMBOL(tc_dwc_g210_config_20_bit);
diff --git a/drivers/scsi/ufs/tc-dwc-g210.h b/drivers/scsi/ufs/tc-dwc-g210.h
new file mode 100644
index 0000000..fb177db
--- /dev/null
+++ b/drivers/scsi/ufs/tc-dwc-g210.h
@@ -0,0 +1,19 @@
+/*
+ * Synopsys G210 Test Chip driver
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (http://www.synopsys.com)
+ *
+ * Authors: Joao Pinto <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _TC_DWC_G210_H
+#define _TC_DWC_G210_H
+
+int tc_dwc_g210_config_40_bit(struct ufs_hba *hba);
+int tc_dwc_g210_config_20_bit(struct ufs_hba *hba);
+
+#endif /* End of Header */
--
1.8.1.5
This patch adds a glue platform driver for the Synopsys G210 Test Chip.
Signed-off-by: Joao Pinto <[email protected]>
---
Changes v0->v10:
- This patch only appeared in v10
.../devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt | 26 +++++
drivers/scsi/ufs/Kconfig | 9 ++
drivers/scsi/ufs/Makefile | 1 +
drivers/scsi/ufs/tc-dwc-g210-pltfrm.c | 109 +++++++++++++++++++++
4 files changed, 145 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
create mode 100644 drivers/scsi/ufs/tc-dwc-g210-pltfrm.c
diff --git a/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt b/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
new file mode 100644
index 0000000..6ec9647
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
@@ -0,0 +1,26 @@
+* Universal Flash Storage (UFS) DesignWare Host Controller
+
+DWC_UFS nodes are defined to describe on-chip UFS host controllers and MPHY.
+Each UFS controller instance should have its own node.
+
+Required properties:
+- compatible : compatible list must contain the PHY type & version:
+ "snps, g210-tc-6.00-20bit"
+ "snps, g210-tc-6.00-40bit"
+ complemented with the Controller IP version:
+ "snps, dwc-ufshcd-1.40a"
+ complemented with the JEDEC version:
+ "jedec,ufs-1.1"
+ "jedec,ufs-2.0"
+
+- reg : <registers mapping>
+- interrupts : <interrupt mapping for UFS host controller IRQ>
+
+Example for a setup using a 1.40a DWC Controller with a 6.00 G210 40-bit TC:
+ dwc_ufs@d0000000 {
+ compatible = "snps, g210-tc-6.00-40bit",
+ "snps, dwc-ufshcd-1.40a",
+ "jedec,ufs-2.0";
+ reg = < 0xd0000000 0x10000 >;
+ interrupts = < 24 >;
+ };
diff --git a/drivers/scsi/ufs/Kconfig b/drivers/scsi/ufs/Kconfig
index 9d218f9..5cfa87b 100644
--- a/drivers/scsi/ufs/Kconfig
+++ b/drivers/scsi/ufs/Kconfig
@@ -90,3 +90,12 @@ config SCSI_UFS_DWC
config SCSI_UFS_DWC_TC
bool
select SCSI_UFS_DWC
+
+config SCSI_UFS_DWC_TC_PLATFORM
+ tristate "DesignWare platform support using a G210 Test Chip"
+ depends on SCSI_UFSHCD_PLATFORM
+ select SCSI_UFS_DWC_TC
+ ---help---
+ Synopsys Test Chip is a PHY for prototyping purposes.
+
+ If unsure, say N."
diff --git a/drivers/scsi/ufs/Makefile b/drivers/scsi/ufs/Makefile
index 9468d7b..a977fe0 100644
--- a/drivers/scsi/ufs/Makefile
+++ b/drivers/scsi/ufs/Makefile
@@ -1,6 +1,7 @@
# UFSHCD makefile
obj-$(CONFIG_SCSI_UFS_DWC) += ufshcd-dwc.o
obj-$(CONFIG_SCSI_UFS_DWC_TC) += tc-dwc-g210.o
+obj-$(CONFIG_SCSI_UFS_DWC_TC_PLATFORM) += tc-dwc-g210-pltfrm.o
obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
diff --git a/drivers/scsi/ufs/tc-dwc-g210-pltfrm.c b/drivers/scsi/ufs/tc-dwc-g210-pltfrm.c
new file mode 100644
index 0000000..c91d4b9
--- /dev/null
+++ b/drivers/scsi/ufs/tc-dwc-g210-pltfrm.c
@@ -0,0 +1,109 @@
+/*
+ * Synopsys G210 Test Chip driver
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (http://www.synopsys.com)
+ *
+ * Authors: Joao Pinto <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/delay.h>
+
+#include "ufshcd-pltfrm.h"
+#include "ufshcd-dwc.h"
+#include "tc-dwc-g210.h"
+
+/**
+ * struct ufs_hba_dwc_vops - UFS DWC specific variant operations
+ */
+static struct ufs_hba_variant_ops tc_dwc_g210_pltfm_hba_vops = {
+ .name = "tc-dwc-g210-pltfm",
+ .link_startup_notify = ufshcd_dwc_link_startup_notify,
+};
+
+/**
+ * tc_dwc_g210_pltfm_probe()
+ * @pdev: pointer to platform device structure
+ *
+ */
+static int tc_dwc_g210_pltfm_probe(struct platform_device *pdev)
+{
+ int err;
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+
+ /* Check Test Chip type and set the specific setup routine */
+ if (of_device_is_compatible(np, "snps, g210-tc-6.00-20bit")) {
+ tc_dwc_g210_pltfm_hba_vops.custom_phy_initialization =
+ tc_dwc_g210_config_20_bit;
+ } else if (of_device_is_compatible(np, "snps, g210-tc-6.00-40bit")) {
+ tc_dwc_g210_pltfm_hba_vops.custom_phy_initialization =
+ tc_dwc_g210_config_40_bit;
+ }
+
+ /* Perform generic probe */
+ err = ufshcd_pltfrm_init(pdev, &tc_dwc_g210_pltfm_hba_vops);
+ if (err)
+ dev_err(dev, "ufshcd_pltfrm_init() failed %d\n", err);
+
+ return err;
+}
+
+/**
+ * tc_dwc_g210_pltfm_remove()
+ * @pdev: pointer to platform device structure
+ *
+ */
+static int tc_dwc_g210_pltfm_remove(struct platform_device *pdev)
+{
+ struct ufs_hba *hba = platform_get_drvdata(pdev);
+
+ pm_runtime_get_sync(&(pdev)->dev);
+ ufshcd_remove(hba);
+
+ return 0;
+}
+
+static const struct of_device_id tc_dwc_g210_pltfm_match[] = {
+ {
+ .compatible = "snps, g210-tc-6.00-20bit"
+ },
+ {
+ .compatible = "snps, g210-tc-6.00-40bit"
+ },
+ { },
+};
+MODULE_DEVICE_TABLE(of, tc_dwc_g210_pltfm_match);
+
+static const struct dev_pm_ops tc_dwc_g210_pltfm_pm_ops = {
+ .suspend = ufshcd_pltfrm_suspend,
+ .resume = ufshcd_pltfrm_resume,
+ .runtime_suspend = ufshcd_pltfrm_runtime_suspend,
+ .runtime_resume = ufshcd_pltfrm_runtime_resume,
+ .runtime_idle = ufshcd_pltfrm_runtime_idle,
+};
+
+static struct platform_driver tc_dwc_g210_pltfm_driver = {
+ .probe = tc_dwc_g210_pltfm_probe,
+ .remove = tc_dwc_g210_pltfm_remove,
+ .shutdown = ufshcd_pltfrm_shutdown,
+ .driver = {
+ .name = "tc-dwc-g210-pltfm",
+ .pm = &tc_dwc_g210_pltfm_pm_ops,
+ .of_match_table = of_match_ptr(tc_dwc_g210_pltfm_match),
+ },
+};
+
+module_platform_driver(tc_dwc_g210_pltfm_driver);
+
+MODULE_ALIAS("platform:tc-dwc-g210-pltfm");
+MODULE_DESCRIPTION("Synopsys Test Chip G210 platform glue driver");
+MODULE_AUTHOR("Joao Pinto <[email protected]>");
+MODULE_LICENSE("Dual BSD/GPL");
--
1.8.1.5
This patch adds a glue pci driver for the Synopsys G210 Test Chip.
Signed-off-by: Joao Pinto <[email protected]>
---
Changes v0->v10:
- This patch only appeared in v10
drivers/scsi/ufs/Kconfig | 9 ++
drivers/scsi/ufs/Makefile | 1 +
drivers/scsi/ufs/tc-dwc-g210-pci.c | 178 +++++++++++++++++++++++++++++++++++++
3 files changed, 188 insertions(+)
create mode 100644 drivers/scsi/ufs/tc-dwc-g210-pci.c
diff --git a/drivers/scsi/ufs/Kconfig b/drivers/scsi/ufs/Kconfig
index 5cfa87b..5a3fde7 100644
--- a/drivers/scsi/ufs/Kconfig
+++ b/drivers/scsi/ufs/Kconfig
@@ -99,3 +99,12 @@ config SCSI_UFS_DWC_TC_PLATFORM
Synopsys Test Chip is a PHY for prototyping purposes.
If unsure, say N."
+
+config SCSI_UFS_DWC_TC_PCI
+ tristate "DesignWare pci support using a G210 Test Chip"
+ depends on SCSI_UFSHCD_PCI
+ select SCSI_UFS_DWC_TC
+ ---help---
+ Synopsys Test Chip is a PHY for prototyping purposes.
+
+ If unsure, say N."
diff --git a/drivers/scsi/ufs/Makefile b/drivers/scsi/ufs/Makefile
index a977fe0..5303d85 100644
--- a/drivers/scsi/ufs/Makefile
+++ b/drivers/scsi/ufs/Makefile
@@ -2,6 +2,7 @@
obj-$(CONFIG_SCSI_UFS_DWC) += ufshcd-dwc.o
obj-$(CONFIG_SCSI_UFS_DWC_TC) += tc-dwc-g210.o
obj-$(CONFIG_SCSI_UFS_DWC_TC_PLATFORM) += tc-dwc-g210-pltfrm.o
+obj-$(CONFIG_SCSI_UFS_DWC_TC_PCI) += tc-dwc-g210-pci.o
obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
diff --git a/drivers/scsi/ufs/tc-dwc-g210-pci.c b/drivers/scsi/ufs/tc-dwc-g210-pci.c
new file mode 100644
index 0000000..cac8fae
--- /dev/null
+++ b/drivers/scsi/ufs/tc-dwc-g210-pci.c
@@ -0,0 +1,178 @@
+/*
+ * Synopsys G210 Test Chip driver
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (http://www.synopsys.com)
+ *
+ * Authors: Joao Pinto <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "ufshcd.h"
+#include "ufshcd-dwc.h"
+#include "tc-dwc-g210.h"
+
+#include <linux/pci.h>
+#include <linux/pm_runtime.h>
+
+/* Test Chip type expected values */
+#define TC_G210_20BIT 20
+#define TC_G210_40BIT 40
+#define TC_G210_DEFAULTBIT 40
+
+static int tc_type = TC_G210_DEFAULTBIT;
+module_param(tc_type, int, 0);
+MODULE_PARM_DESC(tc_type, "Test Chip Type (20 = 20-bit, 40 = 40-bit)");
+
+static int tc_dwc_g210_pci_suspend(struct device *dev)
+{
+ return ufshcd_system_suspend(dev_get_drvdata(dev));
+}
+
+static int tc_dwc_g210_pci_resume(struct device *dev)
+{
+ return ufshcd_system_resume(dev_get_drvdata(dev));
+}
+
+static int tc_dwc_g210_pci_runtime_suspend(struct device *dev)
+{
+ return ufshcd_runtime_suspend(dev_get_drvdata(dev));
+}
+
+static int tc_dwc_g210_pci_runtime_resume(struct device *dev)
+{
+ return ufshcd_runtime_resume(dev_get_drvdata(dev));
+}
+
+static int tc_dwc_g210_pci_runtime_idle(struct device *dev)
+{
+ return ufshcd_runtime_idle(dev_get_drvdata(dev));
+}
+
+/**
+ * struct ufs_hba_dwc_vops - UFS DWC specific variant operations
+ */
+static struct ufs_hba_variant_ops tc_dwc_g210_pci_hba_vops = {
+ .name = "tc-dwc-g210-pci",
+ .link_startup_notify = ufshcd_dwc_link_startup_notify,
+};
+
+/**
+ * tc_dwc_g210_pci_shutdown - main function to put the controller in reset state
+ * @pdev: pointer to PCI device handle
+ */
+static void tc_dwc_g210_pci_shutdown(struct pci_dev *pdev)
+{
+ ufshcd_shutdown((struct ufs_hba *)pci_get_drvdata(pdev));
+}
+
+/**
+ * tc_dwc_g210_pci_remove - de-allocate PCI/SCSI host and host memory space
+ * data structure memory
+ * @pdev - pointer to PCI handle
+ */
+static void tc_dwc_g210_pci_remove(struct pci_dev *pdev)
+{
+ struct ufs_hba *hba = pci_get_drvdata(pdev);
+
+ pm_runtime_forbid(&pdev->dev);
+ pm_runtime_get_noresume(&pdev->dev);
+ ufshcd_remove(hba);
+}
+
+/**
+ * tc_dwc_g210_pci_probe - probe routine of the driver
+ * @pdev: pointer to PCI device handle
+ * @id: PCI device id
+ *
+ * Returns 0 on success, non-zero value on failure
+ */
+static int
+tc_dwc_g210_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+{
+ struct ufs_hba *hba;
+ void __iomem *mmio_base;
+ int err;
+
+ /* Check Test Chip type and set the specific setup routine */
+ if (tc_type == TC_G210_20BIT) {
+ tc_dwc_g210_pci_hba_vops.custom_phy_initialization =
+ tc_dwc_g210_config_20_bit;
+ } else if (tc_type == TC_G210_40BIT) {
+ tc_dwc_g210_pci_hba_vops.custom_phy_initialization =
+ tc_dwc_g210_config_40_bit;
+ }
+
+ err = pcim_enable_device(pdev);
+ if (err) {
+ dev_err(&pdev->dev, "pcim_enable_device failed\n");
+ return err;
+ }
+
+ pci_set_master(pdev);
+
+ err = pcim_iomap_regions(pdev, 1 << 0, UFSHCD);
+ if (err < 0) {
+ dev_err(&pdev->dev, "request and iomap failed\n");
+ return err;
+ }
+
+ mmio_base = pcim_iomap_table(pdev)[0];
+
+ err = ufshcd_alloc_host(&pdev->dev, &hba);
+ if (err) {
+ dev_err(&pdev->dev, "Allocation failed\n");
+ return err;
+ }
+
+ INIT_LIST_HEAD(&hba->clk_list_head);
+
+ hba->vops = &tc_dwc_g210_pci_hba_vops;
+
+ err = ufshcd_init(hba, mmio_base, pdev->irq);
+ if (err) {
+ dev_err(&pdev->dev, "Initialization failed\n");
+ return err;
+ }
+
+ pci_set_drvdata(pdev, hba);
+ pm_runtime_put_noidle(&pdev->dev);
+ pm_runtime_allow(&pdev->dev);
+
+ return 0;
+}
+
+static const struct dev_pm_ops tc_dwc_g210_pci_pm_ops = {
+ .suspend = tc_dwc_g210_pci_suspend,
+ .resume = tc_dwc_g210_pci_resume,
+ .runtime_suspend = tc_dwc_g210_pci_runtime_suspend,
+ .runtime_resume = tc_dwc_g210_pci_runtime_resume,
+ .runtime_idle = tc_dwc_g210_pci_runtime_idle,
+};
+
+static const struct pci_device_id tc_dwc_g210_pci_tbl[] = {
+ { PCI_VENDOR_ID_SYNOPSYS, 0xB101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
+ { PCI_VENDOR_ID_SYNOPSYS, 0xB102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
+ { } /* terminate list */
+};
+
+MODULE_DEVICE_TABLE(pci, tc_dwc_g210_pci_tbl);
+
+static struct pci_driver tc_dwc_g210_pci_driver = {
+ .name = UFSHCD,
+ .id_table = tc_dwc_g210_pci_tbl,
+ .probe = tc_dwc_g210_pci_probe,
+ .remove = tc_dwc_g210_pci_remove,
+ .shutdown = tc_dwc_g210_pci_shutdown,
+ .driver = {
+ .pm = &tc_dwc_g210_pci_pm_ops
+ },
+};
+
+module_pci_driver(tc_dwc_g210_pci_driver);
+
+MODULE_AUTHOR("Joao Pinto <[email protected]>");
+MODULE_DESCRIPTION("Synopsys Test Chip G210 PCI glue driver");
+MODULE_LICENSE("Dual BSD/GPL");
--
1.8.1.5
This patch has the goal to add support for DesignWare UFS Controller
specific operations.
Signed-off-by: Joao Pinto <[email protected]>
---
Changes v9->v10 (Arnd Bergmann):
- Patch now only has DWC controller specific code
- Added custom_phy_initialization callback for PHY specific code
Changes v8->v9 (Robert Herring):
- drop 0x in the node declaration
- most specific compatibility string declared first
Changes v7->v8 (Akinobu Mita):
- DME sets were simplified for easier reading
- CLK DIV default values definitions names were changed to match the
register's name
- New line added to dev_err and dev_info statements
Changes v6->v7 (Arnd Bergmann):
- Changed DT node name (to ufs only) and the memory address (to 0xd000000)
- Removed CONFIG_PM from the PCI glue driver (pm.h already does this)
- No other changes are necessary in ufshcd.c because of the link up notify
function usage (it is simpler now)
- Removed the PHY mentioning since the Test Chip is not a real PHY for real
world usage, since it is a test chip for prototyping with a very specific
usage
- Added again the Test Chip 20-bit option
Changes v5->v6:
- Patch bad format fixed
Changes v4->v5 (Akinobu Mita):
- All functions used only locally in ufshcd-dwc are now declared as static
- ufshcd_dwc_configuration() was removed in ufshcd-dwc and a notify
function (ufshcd_dwc_link_startup_notify) was created to deal with the
DWC specific init routines
- 20-bit RMMI option was removed from Kconfig. Now if MPHY TC is selected
and 40-bit is not then it assumes a 20-bit config
Changes v3->v4 (Arnd Bergmann and Mark Rutland):
- SCSI_UFS_DWC_HOOKS is now silent and selected by the SCSI_UFS_DWC_PLAT
or SCSI_UFS_DWC_PCI
- Compatibility string has the ufs core version for info purposes since
the driver is capable of getting the controller version from its
registers
- Created ufs-dwc-pci glue driver with specific DWC data
- MPHY configuration remains in the ufshcd-dwc since it is unipro
attribute writting only not following the a linux phy framework logic
Changes v2->v3 (Julian Calaby):
- Implement a common DWC code to be used by the platform and pci glue
drivers
- Synopsys ID & Class added to the existing pci driver and specific DWC
was also added to the pci driver
Changes v1->v2 (Akinobu Mita):
- Implement a platform driver that uses the existing UFS core driver
- Add DWC specific code to the existing UFS core driver
MAINTAINERS | 6 ++
drivers/scsi/ufs/Kconfig | 3 +
drivers/scsi/ufs/Makefile | 1 +
drivers/scsi/ufs/ufshcd-dwc.c | 150 ++++++++++++++++++++++++++++++++++++++++++
drivers/scsi/ufs/ufshcd-dwc.h | 26 ++++++++
drivers/scsi/ufs/ufshcd.h | 2 +
drivers/scsi/ufs/ufshci-dwc.h | 42 ++++++++++++
drivers/scsi/ufs/unipro.h | 39 +++++++++++
8 files changed, 269 insertions(+)
create mode 100644 drivers/scsi/ufs/ufshcd-dwc.c
create mode 100644 drivers/scsi/ufs/ufshcd-dwc.h
create mode 100644 drivers/scsi/ufs/ufshci-dwc.h
diff --git a/MAINTAINERS b/MAINTAINERS
index d2f94e2..3db3c4c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -11006,6 +11006,12 @@ S: Supported
F: Documentation/scsi/ufs.txt
F: drivers/scsi/ufs/
+UNIVERSAL FLASH STORAGE HOST CONTROLLER DRIVER DWC HOOKS
+M: Joao Pinto <[email protected]>
+L: [email protected]
+S: Supported
+F: drivers/scsi/ufs/*dwc*
+
UNSORTED BLOCK IMAGES (UBI)
M: Artem Bityutskiy <[email protected]>
M: Richard Weinberger <[email protected]>
diff --git a/drivers/scsi/ufs/Kconfig b/drivers/scsi/ufs/Kconfig
index 5f45307..647c324 100644
--- a/drivers/scsi/ufs/Kconfig
+++ b/drivers/scsi/ufs/Kconfig
@@ -83,3 +83,6 @@ config SCSI_UFS_QCOM
Select this if you have UFS controller on QCOM chipset.
If unsure, say N.
+
+config SCSI_UFS_DWC
+ bool
diff --git a/drivers/scsi/ufs/Makefile b/drivers/scsi/ufs/Makefile
index 8303bcc..ccbad53 100644
--- a/drivers/scsi/ufs/Makefile
+++ b/drivers/scsi/ufs/Makefile
@@ -1,4 +1,5 @@
# UFSHCD makefile
+obj-$(CONFIG_SCSI_UFS_DWC) += ufshcd-dwc.o
obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
diff --git a/drivers/scsi/ufs/ufshcd-dwc.c b/drivers/scsi/ufs/ufshcd-dwc.c
new file mode 100644
index 0000000..c1b8a7f
--- /dev/null
+++ b/drivers/scsi/ufs/ufshcd-dwc.c
@@ -0,0 +1,150 @@
+/*
+ * UFS Host driver for Synopsys Designware Core
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (http://www.synopsys.com)
+ *
+ * Authors: Joao Pinto <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "ufshcd.h"
+#include "unipro.h"
+
+#include "ufshcd-dwc.h"
+#include "ufshci-dwc.h"
+
+int ufshcd_dwc_dme_set_attrs(struct ufs_hba *hba,
+ const struct ufshcd_dme_attr_val *v, int n)
+{
+ int ret = 0;
+ int attr_node = 0;
+
+ for (attr_node = 0; attr_node < n; attr_node++) {
+ ret = ufshcd_dme_set_attr(hba, v[attr_node].attr_sel,
+ ATTR_SET_NOR, v[attr_node].mib_val, v[attr_node].peer);
+
+ if (ret)
+ return ret;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(ufshcd_dwc_dme_set_attrs);
+
+/**
+ * ufshcd_dwc_program_clk_div()
+ * This function programs the clk divider value. This value is needed to
+ * provide 1 microsecond tick to unipro layer.
+ * @hba: Private Structure pointer
+ * @divider_val: clock divider value to be programmed
+ *
+ */
+static void ufshcd_dwc_program_clk_div(struct ufs_hba *hba, u32 divider_val)
+{
+ ufshcd_writel(hba, divider_val, DWC_UFS_REG_HCLKDIV);
+}
+
+/**
+ * ufshcd_dwc_link_is_up()
+ * Check if link is up
+ * @hba: private structure poitner
+ *
+ * Returns 0 on success, non-zero value on failure
+ */
+static int ufshcd_dwc_link_is_up(struct ufs_hba *hba)
+{
+ int dme_result = 0;
+
+ ufshcd_dme_get(hba, UIC_ARG_MIB(VS_POWERSTATE), &dme_result);
+
+ if (dme_result == UFSHCD_LINK_IS_UP) {
+ ufshcd_set_link_active(hba);
+ return 0;
+ }
+
+ return 1;
+}
+
+/**
+ * ufshcd_dwc_connection_setup()
+ * This function configures both the local side (host) and the peer side
+ * (device) unipro attributes to establish the connection to application/
+ * cport.
+ * This function is not required if the hardware is properly configured to
+ * have this connection setup on reset. But invoking this function does no
+ * harm and should be fine even working with any ufs device.
+ *
+ * @hba: pointer to drivers private data
+ *
+ * Returns 0 on success non-zero value on failure
+ */
+static int ufshcd_dwc_connection_setup(struct ufs_hba *hba)
+{
+ const struct ufshcd_dme_attr_val setup_attrs[] = {
+ { UIC_ARG_MIB(T_CONNECTIONSTATE), 0, DME_LOCAL },
+ { UIC_ARG_MIB(N_DEVICEID), 0, DME_LOCAL },
+ { UIC_ARG_MIB(N_DEVICEID_VALID), 0, DME_LOCAL },
+ { UIC_ARG_MIB(T_PEERDEVICEID), 1, DME_LOCAL },
+ { UIC_ARG_MIB(T_PEERCPORTID), 0, DME_LOCAL },
+ { UIC_ARG_MIB(T_TRAFFICCLASS), 0, DME_LOCAL },
+ { UIC_ARG_MIB(T_CPORTFLAGS), 0x6, DME_LOCAL },
+ { UIC_ARG_MIB(T_CPORTMODE), 1, DME_LOCAL },
+ { UIC_ARG_MIB(T_CONNECTIONSTATE), 1, DME_LOCAL },
+ { UIC_ARG_MIB(T_CONNECTIONSTATE), 0, DME_PEER },
+ { UIC_ARG_MIB(N_DEVICEID), 1, DME_PEER },
+ { UIC_ARG_MIB(N_DEVICEID_VALID), 1, DME_PEER },
+ { UIC_ARG_MIB(T_PEERDEVICEID), 1, DME_PEER },
+ { UIC_ARG_MIB(T_PEERCPORTID), 0, DME_PEER },
+ { UIC_ARG_MIB(T_TRAFFICCLASS), 0, DME_PEER },
+ { UIC_ARG_MIB(T_CPORTFLAGS), 0x6, DME_PEER },
+ { UIC_ARG_MIB(T_CPORTMODE), 1, DME_PEER },
+ { UIC_ARG_MIB(T_CONNECTIONSTATE), 1, DME_PEER }
+ };
+
+ return ufshcd_dwc_dme_set_attrs(hba, setup_attrs, ARRAY_SIZE(setup_attrs));
+}
+
+/**
+ * ufshcd_dwc_link_startup_notify()
+ * UFS Host DWC specific link startup sequence
+ * @hba: private structure poitner
+ * @status: Callback notify status
+ *
+ * Returns 0 on success, non-zero value on failure
+ */
+int ufshcd_dwc_link_startup_notify(struct ufs_hba *hba,
+ enum ufs_notify_change_status status)
+{
+ int err = 0;
+
+ if (status == PRE_CHANGE) {
+ ufshcd_dwc_program_clk_div(hba, DWC_UFS_REG_HCLKDIV_DIV_125);
+
+ if (hba->vops->custom_phy_initialization) {
+ err = hba->vops->custom_phy_initialization(hba);
+ if (err) {
+ dev_err(hba->dev, "Phy setup failed (%d)\n",
+ err);
+ goto out;
+ }
+ }
+ } else { /* POST_CHANGE */
+ err = ufshcd_dwc_link_is_up(hba);
+ if (err) {
+ dev_err(hba->dev, "Link is not up\n");
+ goto out;
+ }
+
+ err = ufshcd_dwc_connection_setup(hba);
+ if (err)
+ dev_err(hba->dev, "Connection setup failed (%d)\n",
+ err);
+ }
+
+out:
+ return err;
+}
+EXPORT_SYMBOL(ufshcd_dwc_link_startup_notify);
diff --git a/drivers/scsi/ufs/ufshcd-dwc.h b/drivers/scsi/ufs/ufshcd-dwc.h
new file mode 100644
index 0000000..c8be295
--- /dev/null
+++ b/drivers/scsi/ufs/ufshcd-dwc.h
@@ -0,0 +1,26 @@
+/*
+ * UFS Host driver for Synopsys Designware Core
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (http://www.synopsys.com)
+ *
+ * Authors: Joao Pinto <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _UFSHCD_DWC_H
+#define _UFSHCD_DWC_H
+
+struct ufshcd_dme_attr_val {
+ u32 attr_sel;
+ u32 mib_val;
+ u8 peer;
+};
+
+int ufshcd_dwc_link_startup_notify(struct ufs_hba *hba,
+ enum ufs_notify_change_status status);
+int ufshcd_dwc_dme_set_attrs(struct ufs_hba *hba,
+ const struct ufshcd_dme_attr_val *v, int n);
+#endif /* End of Header */
diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h
index 2570d94..8b0cdf0 100644
--- a/drivers/scsi/ufs/ufshcd.h
+++ b/drivers/scsi/ufs/ufshcd.h
@@ -262,6 +262,7 @@ struct ufs_pwr_mode_info {
* @suspend: called during host controller PM callback
* @resume: called during host controller PM callback
* @dbg_register_dump: used to dump controller debug information
+ * @custom_phy_initialization: used to initialize phys in DWC Cores
*/
struct ufs_hba_variant_ops {
const char *name;
@@ -283,6 +284,7 @@ struct ufs_hba_variant_ops {
int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
int (*resume)(struct ufs_hba *, enum ufs_pm_op);
void (*dbg_register_dump)(struct ufs_hba *hba);
+ int (*custom_phy_initialization)(struct ufs_hba *);
};
/* clock gating state */
diff --git a/drivers/scsi/ufs/ufshci-dwc.h b/drivers/scsi/ufs/ufshci-dwc.h
new file mode 100644
index 0000000..947a75c
--- /dev/null
+++ b/drivers/scsi/ufs/ufshci-dwc.h
@@ -0,0 +1,42 @@
+/*
+ * UFS Host driver for Synopsys Designware Core
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (http://www.synopsys.com)
+ *
+ * Authors: Joao Pinto <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _UFSHCI_DWC_H
+#define _UFSHCI_DWC_H
+
+/* DWC HC UFSHCI specific Registers */
+enum dwc_specific_registers {
+ DWC_UFS_REG_HCLKDIV = 0xFC,
+};
+
+/* Link Status*/
+enum link_status {
+ UFSHCD_LINK_IS_DOWN = 1,
+ UFSHCD_LINK_IS_UP = 2,
+};
+
+/* Clock Divider Values: Hex equivalent of frequency in MHz */
+enum clk_div_values {
+ DWC_UFS_REG_HCLKDIV_DIV_62_5 = 0x3e,
+ DWC_UFS_REG_HCLKDIV_DIV_125 = 0x7d,
+ DWC_UFS_REG_HCLKDIV_DIV_200 = 0xc8,
+};
+
+/* Selector Index */
+enum selector_index {
+ SELIND_LN0_TX = 0x00,
+ SELIND_LN1_TX = 0x01,
+ SELIND_LN0_RX = 0x04,
+ SELIND_LN1_RX = 0x05,
+};
+
+#endif /* End of Header */
diff --git a/drivers/scsi/ufs/unipro.h b/drivers/scsi/ufs/unipro.h
index 816a8a4..da16254 100644
--- a/drivers/scsi/ufs/unipro.h
+++ b/drivers/scsi/ufs/unipro.h
@@ -35,6 +35,10 @@
#define TX_LCC_SEQUENCER 0x0032
#define TX_MIN_ACTIVATETIME 0x0033
#define TX_PWM_G6_G7_SYNC_LENGTH 0x0034
+#define TX_REFCLKFREQ 0x00EB
+#define TX_CFGCLKFREQVAL 0x00EC
+#define CFGEXTRATTR 0x00F0
+#define DITHERCTRL2 0x00F1
/*
* M-RX Configuration Attributes
@@ -48,8 +52,38 @@
#define RX_ENTER_HIBERN8 0x00A7
#define RX_BYPASS_8B10B_ENABLE 0x00A8
#define RX_TERMINATION_FORCE_ENABLE 0x0089
+#define RX_REFCLKFREQ 0x00EB
+#define RX_CFGCLKFREQVAL 0x00EC
+#define CFGWIDEINLN 0x00F0
+#define CFGRXCDR8 0x00BA
+#define ENARXDIRECTCFG4 0x00F2
+#define CFGRXOVR8 0x00BD
+#define RXDIRECTCTRL2 0x00C7
+#define ENARXDIRECTCFG3 0x00F3
+#define RXCALCTRL 0x00B4
+#define ENARXDIRECTCFG2 0x00F4
+#define CFGRXOVR4 0x00E9
+#define RXSQCTRL 0x00B5
+#define CFGRXOVR6 0x00BF
#define is_mphy_tx_attr(attr) (attr < RX_MODE)
+
+/*
+ * Common Block Attributes
+ */
+#define TX_GLOBALHIBERNATE UNIPRO_CB_OFFSET(0x002B)
+#define REFCLKMODE UNIPRO_CB_OFFSET(0x00BF)
+#define DIRECTCTRL19 UNIPRO_CB_OFFSET(0x00CD)
+#define DIRECTCTRL10 UNIPRO_CB_OFFSET(0x00E6)
+#define CDIRECTCTRL6 UNIPRO_CB_OFFSET(0x00EA)
+#define RTOBSERVESELECT UNIPRO_CB_OFFSET(0x00F0)
+#define CBDIVFACTOR UNIPRO_CB_OFFSET(0x00F1)
+#define CBDCOCTRL5 UNIPRO_CB_OFFSET(0x00F3)
+#define CBPRGPLL2 UNIPRO_CB_OFFSET(0x00F8)
+#define CBPRGTUNING UNIPRO_CB_OFFSET(0x00FB)
+
+#define UNIPRO_CB_OFFSET(x) (0x8000 | x)
+
/*
* PHY Adpater attributes
*/
@@ -110,6 +144,11 @@
#define PA_STALLNOCONFIGTIME 0x15A3
#define PA_SAVECONFIGTIME 0x15A4
+/*Other attributes*/
+#define VS_MPHYCFGUPDT 0xD085
+#define VS_DEBUGOMC 0xD09E
+#define VS_POWERSTATE 0xD083
+
/* PA power modes */
enum {
FAST_MODE = 1,
--
1.8.1.5
On Friday 04 March 2016 17:22:15 Joao Pinto wrote:
> Adding UFS 2.0 support to the UFS core driver.
>
> Signed-off-by: Joao Pinto <[email protected]>
>
Acked-by: Arnd Bergmann <[email protected]>
On Friday 04 March 2016 17:22:16 Joao Pinto wrote:
> This patch has the goal to add support for DesignWare UFS Controller
> specific operations.
>
> Signed-off-by: Joao Pinto <[email protected]>
>
Acked-by: Arnd Bergmann <[email protected]>
On Friday 04 March 2016 17:22:17 Joao Pinto wrote:
> This patch adds support for Synopsys G210 Test Chip.
>
> Signed-off-by: Joao Pinto <[email protected]>
>
Acked-by: Arnd Bergmann <[email protected]>
On Friday 04 March 2016 17:22:18 Joao Pinto wrote:
> This patch adds a glue platform driver for the Synopsys G210 Test Chip.
>
> Signed-off-by: Joao Pinto <[email protected]>
Looks basically ok, but I think it can be simplified a little:
> +/**
> + * struct ufs_hba_dwc_vops - UFS DWC specific variant operations
> + */
> +static struct ufs_hba_variant_ops tc_dwc_g210_pltfm_hba_vops = {
> + .name = "tc-dwc-g210-pltfm",
> + .link_startup_notify = ufshcd_dwc_link_startup_notify,
> +};
> +
> +/**
> + * tc_dwc_g210_pltfm_probe()
> + * @pdev: pointer to platform device structure
> + *
> + */
> +static int tc_dwc_g210_pltfm_probe(struct platform_device *pdev)
> +{
> + int err;
> + struct device *dev = &pdev->dev;
> + struct device_node *np = dev->of_node;
> +
> + /* Check Test Chip type and set the specific setup routine */
> + if (of_device_is_compatible(np, "snps, g210-tc-6.00-20bit")) {
> + tc_dwc_g210_pltfm_hba_vops.custom_phy_initialization =
> + tc_dwc_g210_config_20_bit;
> + } else if (of_device_is_compatible(np, "snps, g210-tc-6.00-40bit")) {
> + tc_dwc_g210_pltfm_hba_vops.custom_phy_initialization =
> + tc_dwc_g210_config_40_bit;
> + }
Instead of manually checking the compatible string, define two copies
of the ufs_hba_variant_ops, and put a pointer to them into the
.data field of tc_dwc_g210_pltfm_match.
Arnd
On Friday 04 March 2016 17:22:19 Joao Pinto wrote:
> This patch adds a glue pci driver for the Synopsys G210 Test Chip.
>
> Signed-off-by: Joao Pinto <[email protected]>
Mostly ok, just a few suggestions:
> +
> +/* Test Chip type expected values */
> +#define TC_G210_20BIT 20
> +#define TC_G210_40BIT 40
> +#define TC_G210_DEFAULTBIT 40
> +
> +static int tc_type = TC_G210_DEFAULTBIT;
> +module_param(tc_type, int, 0);
> +MODULE_PARM_DESC(tc_type, "Test Chip Type (20 = 20-bit, 40 = 40-bit)");
>
What is the effect of setting the wrong one here? I was thinking
it would be best to have the default be 'invalid' and then return
an error from the probe() function when you neither value is
set.
> +
> + /* Check Test Chip type and set the specific setup routine */
> + if (tc_type == TC_G210_20BIT) {
> + tc_dwc_g210_pci_hba_vops.custom_phy_initialization =
> + tc_dwc_g210_config_20_bit;
> + } else if (tc_type == TC_G210_40BIT) {
> + tc_dwc_g210_pci_hba_vops.custom_phy_initialization =
> + tc_dwc_g210_config_40_bit;
> + }
As for the platform driver, I would define two separate structures here,
and then mark the operations as 'const'.
> +static const struct pci_device_id tc_dwc_g210_pci_tbl[] = {
> + { PCI_VENDOR_ID_SYNOPSYS, 0xB101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
> + { PCI_VENDOR_ID_SYNOPSYS, 0xB102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
> + { } /* terminate list */
> +};
Is there any difference between these two IDs?
Arnd
On Friday 04 March 2016 17:22:14 Joao Pinto wrote:
> Fixed typo in ufshcd-pltfrm.
>
> Signed-off-by: Joao Pinto <[email protected]>
Acked-by: Arnd Bergmann <[email protected]>
Hi,
On 3/4/2016 9:12 PM, Arnd Bergmann wrote:
> On Friday 04 March 2016 17:22:18 Joao Pinto wrote:
>> This patch adds a glue platform driver for the Synopsys G210 Test Chip.
>>
>> Signed-off-by: Joao Pinto <[email protected]>
>
> Looks basically ok, but I think it can be simplified a little:
>
>> +/**
>> + * struct ufs_hba_dwc_vops - UFS DWC specific variant operations
>> + */
>> +static struct ufs_hba_variant_ops tc_dwc_g210_pltfm_hba_vops = {
>> + .name = "tc-dwc-g210-pltfm",
>> + .link_startup_notify = ufshcd_dwc_link_startup_notify,
>> +};
>> +
>> +/**
>> + * tc_dwc_g210_pltfm_probe()
>> + * @pdev: pointer to platform device structure
>> + *
>> + */
>> +static int tc_dwc_g210_pltfm_probe(struct platform_device *pdev)
>> +{
>> + int err;
>> + struct device *dev = &pdev->dev;
>> + struct device_node *np = dev->of_node;
>> +
>> + /* Check Test Chip type and set the specific setup routine */
>> + if (of_device_is_compatible(np, "snps, g210-tc-6.00-20bit")) {
>> + tc_dwc_g210_pltfm_hba_vops.custom_phy_initialization =
>> + tc_dwc_g210_config_20_bit;
>> + } else if (of_device_is_compatible(np, "snps, g210-tc-6.00-40bit")) {
>> + tc_dwc_g210_pltfm_hba_vops.custom_phy_initialization =
>> + tc_dwc_g210_config_40_bit;
>> + }
>
> Instead of manually checking the compatible string, define two copies
> of the ufs_hba_variant_ops, and put a pointer to them into the
> .data field of tc_dwc_g210_pltfm_match.
Sounds nice. I'll do that!
>
> Arnd
>
Joao
Hi,
On 3/4/2016 9:17 PM, Arnd Bergmann wrote:
> On Friday 04 March 2016 17:22:19 Joao Pinto wrote:
>> This patch adds a glue pci driver for the Synopsys G210 Test Chip.
>>
>> Signed-off-by: Joao Pinto <[email protected]>
>
> Mostly ok, just a few suggestions:
>
>> +
>> +/* Test Chip type expected values */
>> +#define TC_G210_20BIT 20
>> +#define TC_G210_40BIT 40
>> +#define TC_G210_DEFAULTBIT 40
>> +
>> +static int tc_type = TC_G210_DEFAULTBIT;
>> +module_param(tc_type, int, 0);
>> +MODULE_PARM_DESC(tc_type, "Test Chip Type (20 = 20-bit, 40 = 40-bit)");
>>
>
> What is the effect of setting the wrong one here? I was thinking
> it would be best to have the default be 'invalid' and then return
> an error from the probe() function when you neither value is
> set.
You're right. Maybe an TC_G210_20BIT_INV by default and also check if the
inserted value is TC_G210_20BIT or TC_G210_40BIT. if not, then abort the probe.
>
>> +
>> + /* Check Test Chip type and set the specific setup routine */
>> + if (tc_type == TC_G210_20BIT) {
>> + tc_dwc_g210_pci_hba_vops.custom_phy_initialization =
>> + tc_dwc_g210_config_20_bit;
>> + } else if (tc_type == TC_G210_40BIT) {
>> + tc_dwc_g210_pci_hba_vops.custom_phy_initialization =
>> + tc_dwc_g210_config_40_bit;
>> + }
>
> As for the platform driver, I would define two separate structures here,
> and then mark the operations as 'const'.
>
>> +static const struct pci_device_id tc_dwc_g210_pci_tbl[] = {
>> + { PCI_VENDOR_ID_SYNOPSYS, 0xB101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
>> + { PCI_VENDOR_ID_SYNOPSYS, 0xB102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
>> + { } /* terminate list */
>> +};
>
> Is there any difference between these two IDs?
The Synopsys can be identified by one of these 2 IDs. There is no particular reason.
>
> Arnd
>
Joao
This patch adds a glue pci driver for the Synopsys G210 Test Chip.
Signed-off-by: Joao Pinto <[email protected]>
---
Changes v10->v11 (Arnd Bergmann):
- tc_type is now initialized to TC_G210_INV
- probe function checks if the test chip version is specified
Changes v0->v10:
- This patch only appeared in v10
drivers/scsi/ufs/Kconfig | 9 ++
drivers/scsi/ufs/Makefile | 1 +
drivers/scsi/ufs/tc-dwc-g210-pci.c | 181 +++++++++++++++++++++++++++++++++++++
3 files changed, 191 insertions(+)
create mode 100644 drivers/scsi/ufs/tc-dwc-g210-pci.c
diff --git a/drivers/scsi/ufs/Kconfig b/drivers/scsi/ufs/Kconfig
index 5cfa87b..5a3fde7 100644
--- a/drivers/scsi/ufs/Kconfig
+++ b/drivers/scsi/ufs/Kconfig
@@ -99,3 +99,12 @@ config SCSI_UFS_DWC_TC_PLATFORM
Synopsys Test Chip is a PHY for prototyping purposes.
If unsure, say N."
+
+config SCSI_UFS_DWC_TC_PCI
+ tristate "DesignWare pci support using a G210 Test Chip"
+ depends on SCSI_UFSHCD_PCI
+ select SCSI_UFS_DWC_TC
+ ---help---
+ Synopsys Test Chip is a PHY for prototyping purposes.
+
+ If unsure, say N."
diff --git a/drivers/scsi/ufs/Makefile b/drivers/scsi/ufs/Makefile
index a977fe0..5303d85 100644
--- a/drivers/scsi/ufs/Makefile
+++ b/drivers/scsi/ufs/Makefile
@@ -2,6 +2,7 @@
obj-$(CONFIG_SCSI_UFS_DWC) += ufshcd-dwc.o
obj-$(CONFIG_SCSI_UFS_DWC_TC) += tc-dwc-g210.o
obj-$(CONFIG_SCSI_UFS_DWC_TC_PLATFORM) += tc-dwc-g210-pltfrm.o
+obj-$(CONFIG_SCSI_UFS_DWC_TC_PCI) += tc-dwc-g210-pci.o
obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
diff --git a/drivers/scsi/ufs/tc-dwc-g210-pci.c b/drivers/scsi/ufs/tc-dwc-g210-pci.c
new file mode 100644
index 0000000..be8790f
--- /dev/null
+++ b/drivers/scsi/ufs/tc-dwc-g210-pci.c
@@ -0,0 +1,181 @@
+/*
+ * Synopsys G210 Test Chip driver
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (http://www.synopsys.com)
+ *
+ * Authors: Joao Pinto <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "ufshcd.h"
+#include "ufshcd-dwc.h"
+#include "tc-dwc-g210.h"
+
+#include <linux/pci.h>
+#include <linux/pm_runtime.h>
+
+/* Test Chip type expected values */
+#define TC_G210_20BIT 20
+#define TC_G210_40BIT 40
+#define TC_G210_INV 0
+
+static int tc_type = TC_G210_INV;
+module_param(tc_type, int, 0);
+MODULE_PARM_DESC(tc_type, "Test Chip Type (20 = 20-bit, 40 = 40-bit)");
+
+static int tc_dwc_g210_pci_suspend(struct device *dev)
+{
+ return ufshcd_system_suspend(dev_get_drvdata(dev));
+}
+
+static int tc_dwc_g210_pci_resume(struct device *dev)
+{
+ return ufshcd_system_resume(dev_get_drvdata(dev));
+}
+
+static int tc_dwc_g210_pci_runtime_suspend(struct device *dev)
+{
+ return ufshcd_runtime_suspend(dev_get_drvdata(dev));
+}
+
+static int tc_dwc_g210_pci_runtime_resume(struct device *dev)
+{
+ return ufshcd_runtime_resume(dev_get_drvdata(dev));
+}
+
+static int tc_dwc_g210_pci_runtime_idle(struct device *dev)
+{
+ return ufshcd_runtime_idle(dev_get_drvdata(dev));
+}
+
+/**
+ * struct ufs_hba_dwc_vops - UFS DWC specific variant operations
+ */
+static struct ufs_hba_variant_ops tc_dwc_g210_pci_hba_vops = {
+ .name = "tc-dwc-g210-pci",
+ .link_startup_notify = ufshcd_dwc_link_startup_notify,
+};
+
+/**
+ * tc_dwc_g210_pci_shutdown - main function to put the controller in reset state
+ * @pdev: pointer to PCI device handle
+ */
+static void tc_dwc_g210_pci_shutdown(struct pci_dev *pdev)
+{
+ ufshcd_shutdown((struct ufs_hba *)pci_get_drvdata(pdev));
+}
+
+/**
+ * tc_dwc_g210_pci_remove - de-allocate PCI/SCSI host and host memory space
+ * data structure memory
+ * @pdev - pointer to PCI handle
+ */
+static void tc_dwc_g210_pci_remove(struct pci_dev *pdev)
+{
+ struct ufs_hba *hba = pci_get_drvdata(pdev);
+
+ pm_runtime_forbid(&pdev->dev);
+ pm_runtime_get_noresume(&pdev->dev);
+ ufshcd_remove(hba);
+}
+
+/**
+ * tc_dwc_g210_pci_probe - probe routine of the driver
+ * @pdev: pointer to PCI device handle
+ * @id: PCI device id
+ *
+ * Returns 0 on success, non-zero value on failure
+ */
+static int
+tc_dwc_g210_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+{
+ struct ufs_hba *hba;
+ void __iomem *mmio_base;
+ int err;
+
+ /* Check Test Chip type and set the specific setup routine */
+ if (tc_type == TC_G210_20BIT) {
+ tc_dwc_g210_pci_hba_vops.custom_phy_initialization =
+ tc_dwc_g210_config_20_bit;
+ } else if (tc_type == TC_G210_40BIT) {
+ tc_dwc_g210_pci_hba_vops.custom_phy_initialization =
+ tc_dwc_g210_config_40_bit;
+ } else {
+ dev_err(&pdev->dev, "test chip version not specified\n");
+ return -EPERM;
+ }
+
+ err = pcim_enable_device(pdev);
+ if (err) {
+ dev_err(&pdev->dev, "pcim_enable_device failed\n");
+ return err;
+ }
+
+ pci_set_master(pdev);
+
+ err = pcim_iomap_regions(pdev, 1 << 0, UFSHCD);
+ if (err < 0) {
+ dev_err(&pdev->dev, "request and iomap failed\n");
+ return err;
+ }
+
+ mmio_base = pcim_iomap_table(pdev)[0];
+
+ err = ufshcd_alloc_host(&pdev->dev, &hba);
+ if (err) {
+ dev_err(&pdev->dev, "Allocation failed\n");
+ return err;
+ }
+
+ INIT_LIST_HEAD(&hba->clk_list_head);
+
+ hba->vops = &tc_dwc_g210_pci_hba_vops;
+
+ err = ufshcd_init(hba, mmio_base, pdev->irq);
+ if (err) {
+ dev_err(&pdev->dev, "Initialization failed\n");
+ return err;
+ }
+
+ pci_set_drvdata(pdev, hba);
+ pm_runtime_put_noidle(&pdev->dev);
+ pm_runtime_allow(&pdev->dev);
+
+ return 0;
+}
+
+static const struct dev_pm_ops tc_dwc_g210_pci_pm_ops = {
+ .suspend = tc_dwc_g210_pci_suspend,
+ .resume = tc_dwc_g210_pci_resume,
+ .runtime_suspend = tc_dwc_g210_pci_runtime_suspend,
+ .runtime_resume = tc_dwc_g210_pci_runtime_resume,
+ .runtime_idle = tc_dwc_g210_pci_runtime_idle,
+};
+
+static const struct pci_device_id tc_dwc_g210_pci_tbl[] = {
+ { PCI_VENDOR_ID_SYNOPSYS, 0xB101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
+ { PCI_VENDOR_ID_SYNOPSYS, 0xB102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
+ { } /* terminate list */
+};
+
+MODULE_DEVICE_TABLE(pci, tc_dwc_g210_pci_tbl);
+
+static struct pci_driver tc_dwc_g210_pci_driver = {
+ .name = UFSHCD,
+ .id_table = tc_dwc_g210_pci_tbl,
+ .probe = tc_dwc_g210_pci_probe,
+ .remove = tc_dwc_g210_pci_remove,
+ .shutdown = tc_dwc_g210_pci_shutdown,
+ .driver = {
+ .pm = &tc_dwc_g210_pci_pm_ops
+ },
+};
+
+module_pci_driver(tc_dwc_g210_pci_driver);
+
+MODULE_AUTHOR("Joao Pinto <[email protected]>");
+MODULE_DESCRIPTION("Synopsys Test Chip G210 PCI glue driver");
+MODULE_LICENSE("Dual BSD/GPL");
--
1.8.1.5
This patch adds a glue platform driver for the Synopsys G210 Test Chip.
Signed-off-by: Joao Pinto <[email protected]>
---
Changes v10->v11 (Arnd Bergmann):
- vops structs are now passed in .data
Changes v0->v10:
- This patch only appeared in v10
.../devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt | 26 +++++
drivers/scsi/ufs/Kconfig | 9 ++
drivers/scsi/ufs/Makefile | 1 +
drivers/scsi/ufs/tc-dwc-g210-pltfrm.c | 113 +++++++++++++++++++++
4 files changed, 149 insertions(+)
create mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
create mode 100644 drivers/scsi/ufs/tc-dwc-g210-pltfrm.c
diff --git a/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt b/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
new file mode 100644
index 0000000..6ec9647
--- /dev/null
+++ b/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
@@ -0,0 +1,26 @@
+* Universal Flash Storage (UFS) DesignWare Host Controller
+
+DWC_UFS nodes are defined to describe on-chip UFS host controllers and MPHY.
+Each UFS controller instance should have its own node.
+
+Required properties:
+- compatible : compatible list must contain the PHY type & version:
+ "snps, g210-tc-6.00-20bit"
+ "snps, g210-tc-6.00-40bit"
+ complemented with the Controller IP version:
+ "snps, dwc-ufshcd-1.40a"
+ complemented with the JEDEC version:
+ "jedec,ufs-1.1"
+ "jedec,ufs-2.0"
+
+- reg : <registers mapping>
+- interrupts : <interrupt mapping for UFS host controller IRQ>
+
+Example for a setup using a 1.40a DWC Controller with a 6.00 G210 40-bit TC:
+ dwc_ufs@d0000000 {
+ compatible = "snps, g210-tc-6.00-40bit",
+ "snps, dwc-ufshcd-1.40a",
+ "jedec,ufs-2.0";
+ reg = < 0xd0000000 0x10000 >;
+ interrupts = < 24 >;
+ };
diff --git a/drivers/scsi/ufs/Kconfig b/drivers/scsi/ufs/Kconfig
index 9d218f9..5cfa87b 100644
--- a/drivers/scsi/ufs/Kconfig
+++ b/drivers/scsi/ufs/Kconfig
@@ -90,3 +90,12 @@ config SCSI_UFS_DWC
config SCSI_UFS_DWC_TC
bool
select SCSI_UFS_DWC
+
+config SCSI_UFS_DWC_TC_PLATFORM
+ tristate "DesignWare platform support using a G210 Test Chip"
+ depends on SCSI_UFSHCD_PLATFORM
+ select SCSI_UFS_DWC_TC
+ ---help---
+ Synopsys Test Chip is a PHY for prototyping purposes.
+
+ If unsure, say N."
diff --git a/drivers/scsi/ufs/Makefile b/drivers/scsi/ufs/Makefile
index 9468d7b..a977fe0 100644
--- a/drivers/scsi/ufs/Makefile
+++ b/drivers/scsi/ufs/Makefile
@@ -1,6 +1,7 @@
# UFSHCD makefile
obj-$(CONFIG_SCSI_UFS_DWC) += ufshcd-dwc.o
obj-$(CONFIG_SCSI_UFS_DWC_TC) += tc-dwc-g210.o
+obj-$(CONFIG_SCSI_UFS_DWC_TC_PLATFORM) += tc-dwc-g210-pltfrm.o
obj-$(CONFIG_SCSI_UFS_QCOM) += ufs-qcom.o
obj-$(CONFIG_SCSI_UFSHCD) += ufshcd.o
obj-$(CONFIG_SCSI_UFSHCD_PCI) += ufshcd-pci.o
diff --git a/drivers/scsi/ufs/tc-dwc-g210-pltfrm.c b/drivers/scsi/ufs/tc-dwc-g210-pltfrm.c
new file mode 100644
index 0000000..9bffb98
--- /dev/null
+++ b/drivers/scsi/ufs/tc-dwc-g210-pltfrm.c
@@ -0,0 +1,113 @@
+/*
+ * Synopsys G210 Test Chip driver
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (http://www.synopsys.com)
+ *
+ * Authors: Joao Pinto <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/of.h>
+#include <linux/delay.h>
+
+#include "ufshcd-pltfrm.h"
+#include "ufshcd-dwc.h"
+#include "tc-dwc-g210.h"
+
+/**
+ * UFS DWC specific variant operations
+ */
+static struct ufs_hba_variant_ops tc_dwc_g210_20bit_pltfm_hba_vops = {
+ .name = "tc-dwc-g210-pltfm",
+ .link_startup_notify = ufshcd_dwc_link_startup_notify,
+ .custom_phy_initialization = tc_dwc_g210_config_20_bit,
+};
+
+static struct ufs_hba_variant_ops tc_dwc_g210_40bit_pltfm_hba_vops = {
+ .name = "tc-dwc-g210-pltfm",
+ .link_startup_notify = ufshcd_dwc_link_startup_notify,
+ .custom_phy_initialization = tc_dwc_g210_config_40_bit,
+};
+
+static const struct of_device_id tc_dwc_g210_pltfm_match[] = {
+ {
+ .compatible = "snps, g210-tc-6.00-20bit",
+ .data = &tc_dwc_g210_20bit_pltfm_hba_vops,
+ },
+ {
+ .compatible = "snps, g210-tc-6.00-40bit",
+ .data = &tc_dwc_g210_40bit_pltfm_hba_vops,
+ },
+ { },
+};
+MODULE_DEVICE_TABLE(of, tc_dwc_g210_pltfm_match);
+
+/**
+ * tc_dwc_g210_pltfm_probe()
+ * @pdev: pointer to platform device structure
+ *
+ */
+static int tc_dwc_g210_pltfm_probe(struct platform_device *pdev)
+{
+ int err;
+ const struct of_device_id *of_id;
+ struct ufs_hba_variant_ops *vops;
+ struct device *dev = &pdev->dev;
+
+ of_id = of_match_node(tc_dwc_g210_pltfm_match, dev->of_node);
+ vops = (struct ufs_hba_variant_ops *)of_id->data;
+
+ /* Perform generic probe */
+ err = ufshcd_pltfrm_init(pdev, vops);
+ if (err)
+ dev_err(dev, "ufshcd_pltfrm_init() failed %d\n", err);
+
+ return err;
+}
+
+/**
+ * tc_dwc_g210_pltfm_remove()
+ * @pdev: pointer to platform device structure
+ *
+ */
+static int tc_dwc_g210_pltfm_remove(struct platform_device *pdev)
+{
+ struct ufs_hba *hba = platform_get_drvdata(pdev);
+
+ pm_runtime_get_sync(&(pdev)->dev);
+ ufshcd_remove(hba);
+
+ return 0;
+}
+
+static const struct dev_pm_ops tc_dwc_g210_pltfm_pm_ops = {
+ .suspend = ufshcd_pltfrm_suspend,
+ .resume = ufshcd_pltfrm_resume,
+ .runtime_suspend = ufshcd_pltfrm_runtime_suspend,
+ .runtime_resume = ufshcd_pltfrm_runtime_resume,
+ .runtime_idle = ufshcd_pltfrm_runtime_idle,
+};
+
+static struct platform_driver tc_dwc_g210_pltfm_driver = {
+ .probe = tc_dwc_g210_pltfm_probe,
+ .remove = tc_dwc_g210_pltfm_remove,
+ .shutdown = ufshcd_pltfrm_shutdown,
+ .driver = {
+ .name = "tc-dwc-g210-pltfm",
+ .pm = &tc_dwc_g210_pltfm_pm_ops,
+ .of_match_table = of_match_ptr(tc_dwc_g210_pltfm_match),
+ },
+};
+
+module_platform_driver(tc_dwc_g210_pltfm_driver);
+
+MODULE_ALIAS("platform:tc-dwc-g210-pltfm");
+MODULE_DESCRIPTION("Synopsys Test Chip G210 platform glue driver");
+MODULE_AUTHOR("Joao Pinto <[email protected]>");
+MODULE_LICENSE("Dual BSD/GPL");
--
1.8.1.5
On Fri, Mar 04, 2016 at 05:22:15PM +0000, Joao Pinto wrote:
> Adding UFS 2.0 support to the UFS core driver.
>
> Signed-off-by: Joao Pinto <[email protected]>
> ---
> Changes v8->v10:
> - Nothing changed (just to keep up with patch set version).
> Changes v7->v8:
> - Added "jedec, ufs-2.0" to the ufschd-platform compatibility strings
> Changes v0->v7:
> - Nothing changed (just to keep up with patch set version).
>
> .../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 4 +--
> drivers/scsi/ufs/ufshcd.c | 29 +++++++++++++++++++---
> drivers/scsi/ufs/ufshci.h | 1 +
> 3 files changed, 28 insertions(+), 6 deletions(-)
Acked-by: Rob Herring <[email protected]>
On Thu, Mar 17, 2016 at 7:39 AM, Joao Pinto <[email protected]> wrote:
> Adding UFS 2.0 support to the UFS core driver.
>
> Signed-off-by: Joao Pinto <[email protected]>
> Acked-by: Arnd Bergmann <[email protected]>
> Acked-by: Rob Herring <[email protected]>
You don't need to resend just to add acks. The maintainer will do that.
Rob
On Mon, Mar 07, 2016 at 12:09:20PM +0000, Joao Pinto wrote:
> This patch adds a glue platform driver for the Synopsys G210 Test Chip.
>
> Signed-off-by: Joao Pinto <[email protected]>
> ---
> Changes v10->v11 (Arnd Bergmann):
> - vops structs are now passed in .data
> Changes v0->v10:
> - This patch only appeared in v10
>
> .../devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt | 26 +++++
> drivers/scsi/ufs/Kconfig | 9 ++
> drivers/scsi/ufs/Makefile | 1 +
> drivers/scsi/ufs/tc-dwc-g210-pltfrm.c | 113 +++++++++++++++++++++
> 4 files changed, 149 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
> create mode 100644 drivers/scsi/ufs/tc-dwc-g210-pltfrm.c
>
> diff --git a/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt b/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
> new file mode 100644
> index 0000000..6ec9647
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/ufs/tc-dwc-g210-pltfrm.txt
> @@ -0,0 +1,26 @@
> +* Universal Flash Storage (UFS) DesignWare Host Controller
> +
> +DWC_UFS nodes are defined to describe on-chip UFS host controllers and MPHY.
> +Each UFS controller instance should have its own node.
> +
> +Required properties:
> +- compatible : compatible list must contain the PHY type & version:
> + "snps, g210-tc-6.00-20bit"
> + "snps, g210-tc-6.00-40bit"
drop the spaces ^
> + complemented with the Controller IP version:
> + "snps, dwc-ufshcd-1.40a"
ditto
> + complemented with the JEDEC version:
> + "jedec,ufs-1.1"
> + "jedec,ufs-2.0"
> +
> +- reg : <registers mapping>
> +- interrupts : <interrupt mapping for UFS host controller IRQ>
> +
> +Example for a setup using a 1.40a DWC Controller with a 6.00 G210 40-bit TC:
> + dwc_ufs@d0000000 {
> + compatible = "snps, g210-tc-6.00-40bit",
> + "snps, dwc-ufshcd-1.40a",
ditto
> + "jedec,ufs-2.0";
> + reg = < 0xd0000000 0x10000 >;
> + interrupts = < 24 >;
> + };
Adding UFS 2.0 support to the UFS core driver.
Signed-off-by: Joao Pinto <[email protected]>
Acked-by: Arnd Bergmann <[email protected]>
Acked-by: Rob Herring <[email protected]>
---
Changes v8->v11:
- Nothing changed (just to keep up with patch set version).
Changes v7->v8:
- Added "jedec, ufs-2.0" to the ufschd-platform compatibility strings Changes v0->v7:
- Nothing changed (just to keep up with patch set version).
.../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 4 +--
drivers/scsi/ufs/ufshcd.c | 29 +++++++++++++++++++---
drivers/scsi/ufs/ufshci.h | 1 +
3 files changed, 28 insertions(+), 6 deletions(-)
diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
index 03c0e98..8d9a9d2 100644
--- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
+++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
@@ -4,8 +4,8 @@ UFSHC nodes are defined to describe on-chip UFS host controllers.
Each UFS controller instance should have its own node.
Required properties:
-- compatible : must contain "jedec,ufs-1.1", may also list one or more
- of the following:
+- compatible : must contain "jedec,ufs-1.1" or "jedec,ufs-2.0", may
+ also list one or more of the following:
"qcom,msm8994-ufshc"
"qcom,msm8996-ufshc"
"qcom,ufshc"
diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index 85cd256..2b5f2bf 100644
I think this should go in separate patch
--- a/drivers/scsi/ufs/ufshcd.c
+++ b/drivers/scsi/ufs/ufshcd.c
@@ -1223,6 +1223,7 @@ static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
ret = -EINVAL;
}
break;
+ case UTP_CMD_TYPE_UFS_STORAGE:
case UTP_CMD_TYPE_DEV_MANAGE:
ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY) @@ -1287,6 +1288,7 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
struct ufshcd_lrb *lrbp;
struct ufs_hba *hba;
unsigned long flags;
+ u32 upiu_flags;
int tag;
int err = 0;
@@ -1343,10 +1345,23 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
lrbp->task_tag = tag;
lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
- lrbp->command_type = UTP_CMD_TYPE_SCSI;
+
+ if (hba->ufs_version == UFSHCI_VERSION_20)
+ lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
+ else
+ lrbp->command_type = UTP_CMD_TYPE_SCSI;
This translation can be pushed to prepare_req_desc_hdr and you end up with ~oneliner fix
/* form UPIU before issuing the command */
- ufshcd_compose_upiu(hba, lrbp);
+ if (hba->ufs_version == UFSHCI_VERSION_20) {
+ if (likely(lrbp->cmd)) {
How this can be possible NULL, the code above will crash or I'm missing something ?
+ ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
+ lrbp->cmd->sc_data_direction);
+ ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
What is different her from the code in ufshcd_compose_upiu ?
+ } else
+ err = -EINVAL;
+ } else
+ ufshcd_compose_upiu(hba, lrbp);
+
err = ufshcd_map_sg(lrbp);
if (err) {
lrbp->cmd = NULL;
@@ -1371,7 +1386,12 @@ static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
lrbp->sense_buffer = NULL;
lrbp->task_tag = tag;
lrbp->lun = 0; /* device management cmd is not specific to any LUN */
- lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
+
+ if (hba->ufs_version == UFSHCI_VERSION_20)
+ lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
+ else
+ lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
+
This translation can be pushed to prepare_req_desc_hdr and you end up with ~ oneliner fix
lrbp->intr_cmd = true; /* No interrupt aggregation */
hba->dev_cmd.type = cmd_type;
@@ -3187,7 +3207,8 @@ static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
/* Do not touch lrbp after scsi done */
cmd->scsi_done(cmd);
__ufshcd_release(hba);
- } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) {
+ } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
+ lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
if (hba->dev_cmd.complete)
complete(hba->dev_cmd.complete);
}
diff --git a/drivers/scsi/ufs/ufshci.h b/drivers/scsi/ufs/ufshci.h index 0ae0967..8dba0e7 100644
--- a/drivers/scsi/ufs/ufshci.h
+++ b/drivers/scsi/ufs/ufshci.h
@@ -273,6 +273,7 @@ enum {
UTP_CMD_TYPE_SCSI = 0x0,
UTP_CMD_TYPE_UFS = 0x1,
UTP_CMD_TYPE_DEV_MANAGE = 0x2,
+ UTP_CMD_TYPE_UFS_STORAGE = 0x11,
};
enum {
--
1.8.1.5
Hi Thomas,
On 3/29/2016 11:41 AM, Winkler, Tomas wrote:
>
> Adding UFS 2.0 support to the UFS core driver.
>
> Signed-off-by: Joao Pinto <[email protected]>
> Acked-by: Arnd Bergmann <[email protected]>
> Acked-by: Rob Herring <[email protected]>
> ---
> Changes v8->v11:
> - Nothing changed (just to keep up with patch set version).
> Changes v7->v8:
> - Added "jedec, ufs-2.0" to the ufschd-platform compatibility strings Changes v0->v7:
> - Nothing changed (just to keep up with patch set version).
>
> .../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 4 +--
> drivers/scsi/ufs/ufshcd.c | 29 +++++++++++++++++++---
> drivers/scsi/ufs/ufshci.h | 1 +
> 3 files changed, 28 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
> index 03c0e98..8d9a9d2 100644
> --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
> +++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
> @@ -4,8 +4,8 @@ UFSHC nodes are defined to describe on-chip UFS host controllers.
> Each UFS controller instance should have its own node.
>
> Required properties:
> -- compatible : must contain "jedec,ufs-1.1", may also list one or more
> - of the following:
> +- compatible : must contain "jedec,ufs-1.1" or "jedec,ufs-2.0", may
> + also list one or more of the following:
> "qcom,msm8994-ufshc"
> "qcom,msm8996-ufshc"
> "qcom,ufshc"
> diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c index 85cd256..2b5f2bf 100644
>
> I think this should go in separate patch
In my opinion it only makes sense to add 2.0 to the device-tree binding if the
driver actually supports it, that was why I added to the same patch, but of
course it can be separated if more people agree with the approach.
>
> --- a/drivers/scsi/ufs/ufshcd.c
> +++ b/drivers/scsi/ufs/ufshcd.c
> @@ -1223,6 +1223,7 @@ static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
> ret = -EINVAL;
> }
> break;
> + case UTP_CMD_TYPE_UFS_STORAGE:
> case UTP_CMD_TYPE_DEV_MANAGE:
> ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
> if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY) @@ -1287,6 +1288,7 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
> struct ufshcd_lrb *lrbp;
> struct ufs_hba *hba;
> unsigned long flags;
> + u32 upiu_flags;
> int tag;
> int err = 0;
>
> @@ -1343,10 +1345,23 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
> lrbp->task_tag = tag;
> lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
> lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
> - lrbp->command_type = UTP_CMD_TYPE_SCSI;
> +
> + if (hba->ufs_version == UFSHCI_VERSION_20)
> + lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
> + else
> + lrbp->command_type = UTP_CMD_TYPE_SCSI;
> This translation can be pushed to prepare_req_desc_hdr and you end up with ~oneliner fix
I think your suggestion is good! We have to check the 2.0 version in 2 places
and with your approach we would only check it in prepare_req_desc_hdr() once.
I will do that update!
>
>
> /* form UPIU before issuing the command */
> - ufshcd_compose_upiu(hba, lrbp);
> + if (hba->ufs_version == UFSHCI_VERSION_20) {
> + if (likely(lrbp->cmd)) {
> How this can be possible NULL, the code above will crash or I'm missing something ?
> + ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
> + lrbp->cmd->sc_data_direction);
> + ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
> What is different her from the code in ufshcd_compose_upiu ?
> + } else
> + err = -EINVAL;
> + } else
> + ufshcd_compose_upiu(hba, lrbp);
If you check ufshcd_compose_upiu() you will see that it contains 2 scopes:
cmd_upiu and query_req_upiu. Before 2.0 this single function approach that had
both scopes worked well, but now with 2.0 we must use the same command_type
(UTP_CMD_TYPE_UFS_STORAGE) which causes incompatibility. This was why I put the
same code from cmd_upiu in the outside.
Of course we can break ufshcd_compose_upiu() in 2: ufshcd_compose_cmd_upiu() and
ufshcd_compose_query_upiu(). What do you think?
> +
> err = ufshcd_map_sg(lrbp);
> if (err) {
> lrbp->cmd = NULL;
> @@ -1371,7 +1386,12 @@ static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
> lrbp->sense_buffer = NULL;
> lrbp->task_tag = tag;
> lrbp->lun = 0; /* device management cmd is not specific to any LUN */
> - lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
> +
> + if (hba->ufs_version == UFSHCI_VERSION_20)
> + lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
> + else
> + lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
> +
> This translation can be pushed to prepare_req_desc_hdr and you end up with ~ oneliner fix
>
> lrbp->intr_cmd = true; /* No interrupt aggregation */
> hba->dev_cmd.type = cmd_type;
>
> @@ -3187,7 +3207,8 @@ static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
> /* Do not touch lrbp after scsi done */
> cmd->scsi_done(cmd);
> __ufshcd_release(hba);
> - } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) {
> + } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
> + lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
> if (hba->dev_cmd.complete)
> complete(hba->dev_cmd.complete);
> }
> diff --git a/drivers/scsi/ufs/ufshci.h b/drivers/scsi/ufs/ufshci.h index 0ae0967..8dba0e7 100644
> --- a/drivers/scsi/ufs/ufshci.h
> +++ b/drivers/scsi/ufs/ufshci.h
> @@ -273,6 +273,7 @@ enum {
> UTP_CMD_TYPE_SCSI = 0x0,
> UTP_CMD_TYPE_UFS = 0x1,
> UTP_CMD_TYPE_DEV_MANAGE = 0x2,
> + UTP_CMD_TYPE_UFS_STORAGE = 0x11,
> };
>
> enum {
> --
> 1.8.1.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-scsi" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
>
Thanks,
Joao
Hi Thomas,
On 3/29/2016 11:41 AM, Winkler, Tomas wrote:
>
> Adding UFS 2.0 support to the UFS core driver.
>
> Signed-off-by: Joao Pinto <[email protected]>
> Acked-by: Arnd Bergmann <[email protected]>
> Acked-by: Rob Herring <[email protected]>
> ---
> Changes v8->v11:
> - Nothing changed (just to keep up with patch set version).
> Changes v7->v8:
> - Added "jedec, ufs-2.0" to the ufschd-platform compatibility strings Changes v0->v7:
> - Nothing changed (just to keep up with patch set version).
>
> .../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 4 +--
> drivers/scsi/ufs/ufshcd.c | 29 +++++++++++++++++++---
> drivers/scsi/ufs/ufshci.h | 1 +
> 3 files changed, 28 insertions(+), 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
> b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
> index 03c0e98..8d9a9d2 100644
> --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
> +++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
> @@ -4,8 +4,8 @@ UFSHC nodes are defined to describe on-chip UFS host controllers.
> Each UFS controller instance should have its own node.
>
> Required properties:
> -- compatible : must contain "jedec,ufs-1.1", may also list one or more
> - of the following:
> +- compatible : must contain "jedec,ufs-1.1" or "jedec,ufs-2.0", may
> + also list one or more of the following:
> "qcom,msm8994-ufshc"
> "qcom,msm8996-ufshc"
> "qcom,ufshc"
> diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
> index 85cd256..2b5f2bf 100644
>
> I think this should go in separate patch
In my opinion it only makes sense to add 2.0 to the device-tree binding if the driver actually supports it, that was why I added to the same patch, but of course it can be separated if more people agree with the approach.
Yes, we have ufshcd-pci device that needs that so I think this should go separately
>
> --- a/drivers/scsi/ufs/ufshcd.c
> +++ b/drivers/scsi/ufs/ufshcd.c
> @@ -1223,6 +1223,7 @@ static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
> ret = -EINVAL;
> }
> break;
> + case UTP_CMD_TYPE_UFS_STORAGE:
> case UTP_CMD_TYPE_DEV_MANAGE:
> ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
> if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY) @@ -1287,6 +1288,7 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
> struct ufshcd_lrb *lrbp;
> struct ufs_hba *hba;
> unsigned long flags;
> + u32 upiu_flags;
> int tag;
> int err = 0;
>
> @@ -1343,10 +1345,23 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
> lrbp->task_tag = tag;
> lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
> lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
> - lrbp->command_type = UTP_CMD_TYPE_SCSI;
> +
> + if (hba->ufs_version == UFSHCI_VERSION_20)
> + lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
> + else
> + lrbp->command_type = UTP_CMD_TYPE_SCSI;
> This translation can be pushed to prepare_req_desc_hdr and you end up
> with ~oneliner fix
I think your suggestion is good! We have to check the 2.0 version in 2 places and with your approach we would only check it in prepare_req_desc_hdr() once.
I will do that update!
Okay I think you can alter ufshcd_lrb structure and push the information there,
Add ufs version there as hba is not available in req_desc_hdr, I think both command_type and ufs_version can be u8 so the structure won't grow.
>
>
> /* form UPIU before issuing the command */
> - ufshcd_compose_upiu(hba, lrbp);
> + if (hba->ufs_version == UFSHCI_VERSION_20) {
> + if (likely(lrbp->cmd)) {
> How this can be possible NULL, the code above will crash or I'm missing something ?
> + ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
> + lrbp->cmd->sc_data_direction);
> + ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
> What is different her from the code in ufshcd_compose_upiu ?
> + } else
> + err = -EINVAL;
> + } else
> + ufshcd_compose_upiu(hba, lrbp);
If you check ufshcd_compose_upiu() you will see that it contains 2 scopes:
cmd_upiu and query_req_upiu. Before 2.0 this single function approach that had both scopes worked well, but now with 2.0 we must use the same command_type
(UTP_CMD_TYPE_UFS_STORAGE) which causes incompatibility. This was why I put the same code from cmd_upiu in the outside.
Of course we can break ufshcd_compose_upiu() in 2: ufshcd_compose_cmd_upiu() and ufshcd_compose_query_upiu(). What do you think?
If you use ufs_version only in req_desc_hdr then you don't need this
If (ufs_version == 2.0)
cmd_type = UFS_STORAGE
else
cmd_type = lrb->command_type
...
I think with this change
> +
> err = ufshcd_map_sg(lrbp);
> if (err) {
> lrbp->cmd = NULL;
> @@ -1371,7 +1386,12 @@ static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
> lrbp->sense_buffer = NULL;
> lrbp->task_tag = tag;
> lrbp->lun = 0; /* device management cmd is not specific to any LUN */
> - lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
> +
> + if (hba->ufs_version == UFSHCI_VERSION_20)
> + lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
> + else
> + lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
> +
> This translation can be pushed to prepare_req_desc_hdr and you end up
> with ~ oneliner fix
>
> lrbp->intr_cmd = true; /* No interrupt aggregation */
> hba->dev_cmd.type = cmd_type;
>
> @@ -3187,7 +3207,8 @@ static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
> /* Do not touch lrbp after scsi done */
> cmd->scsi_done(cmd);
> __ufshcd_release(hba);
> - } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE) {
> + } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
> + lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
> if (hba->dev_cmd.complete)
> complete(hba->dev_cmd.complete);
> }
> diff --git a/drivers/scsi/ufs/ufshci.h b/drivers/scsi/ufs/ufshci.h
> index 0ae0967..8dba0e7 100644
> --- a/drivers/scsi/ufs/ufshci.h
> +++ b/drivers/scsi/ufs/ufshci.h
> @@ -273,6 +273,7 @@ enum {
> UTP_CMD_TYPE_SCSI = 0x0,
> UTP_CMD_TYPE_UFS = 0x1,
> UTP_CMD_TYPE_DEV_MANAGE = 0x2,
> + UTP_CMD_TYPE_UFS_STORAGE = 0x11,
Why 0x11?
Thanks
Tomas
On 3/29/2016 12:33 PM, Winkler, Tomas wrote:
> Hi Thomas,
>
> On 3/29/2016 11:41 AM, Winkler, Tomas wrote:
>>
>> Adding UFS 2.0 support to the UFS core driver.
>>
>> Signed-off-by: Joao Pinto <[email protected]>
>> Acked-by: Arnd Bergmann <[email protected]>
>> Acked-by: Rob Herring <[email protected]>
>> ---
>> Changes v8->v11:
>> - Nothing changed (just to keep up with patch set version).
>> Changes v7->v8:
>> - Added "jedec, ufs-2.0" to the ufschd-platform compatibility strings Changes v0->v7:
>> - Nothing changed (just to keep up with patch set version).
>>
>> .../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 4 +--
>> drivers/scsi/ufs/ufshcd.c | 29 +++++++++++++++++++---
>> drivers/scsi/ufs/ufshci.h | 1 +
>> 3 files changed, 28 insertions(+), 6 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>> b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>> index 03c0e98..8d9a9d2 100644
>> --- a/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>> +++ b/Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
>> @@ -4,8 +4,8 @@ UFSHC nodes are defined to describe on-chip UFS host controllers.
>> Each UFS controller instance should have its own node.
>>
>> Required properties:
>> -- compatible : must contain "jedec,ufs-1.1", may also list one or more
>> - of the following:
>> +- compatible : must contain "jedec,ufs-1.1" or "jedec,ufs-2.0", may
>> + also list one or more of the following:
>> "qcom,msm8994-ufshc"
>> "qcom,msm8996-ufshc"
>> "qcom,ufshc"
>> diff --git a/drivers/scsi/ufs/ufshcd.c b/drivers/scsi/ufs/ufshcd.c
>> index 85cd256..2b5f2bf 100644
>>
>> I think this should go in separate patch
>
> In my opinion it only makes sense to add 2.0 to the device-tree binding if the driver actually supports it, that was why I added to the same patch, but of course it can be separated if more people agree with the approach.
>
> Yes, we have ufshcd-pci device that needs that so I think this should go separately
I will separate this, no problem.
>>
>> --- a/drivers/scsi/ufs/ufshcd.c
>> +++ b/drivers/scsi/ufs/ufshcd.c
>> @@ -1223,6 +1223,7 @@ static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
>> ret = -EINVAL;
>> }
>> break;
>> + case UTP_CMD_TYPE_UFS_STORAGE:
>> case UTP_CMD_TYPE_DEV_MANAGE:
>> ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
>> if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY) @@ -1287,6 +1288,7 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
>> struct ufshcd_lrb *lrbp;
>> struct ufs_hba *hba;
>> unsigned long flags;
>> + u32 upiu_flags;
>> int tag;
>> int err = 0;
>>
>> @@ -1343,10 +1345,23 @@ static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
>> lrbp->task_tag = tag;
>> lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
>> lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
>> - lrbp->command_type = UTP_CMD_TYPE_SCSI;
>> +
>> + if (hba->ufs_version == UFSHCI_VERSION_20)
>> + lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
>> + else
>> + lrbp->command_type = UTP_CMD_TYPE_SCSI;
>> This translation can be pushed to prepare_req_desc_hdr and you end up
>> with ~oneliner fix
>
> I think your suggestion is good! We have to check the 2.0 version in 2 places and with your approach we would only check it in prepare_req_desc_hdr() once.
> I will do that update!
>
> Okay I think you can alter ufshcd_lrb structure and push the information there,
> Add ufs version there as hba is not available in req_desc_hdr, I think both command_type and ufs_version can be u8 so the structure won't grow.
Going to check it out.
>
>
>>
>>
>> /* form UPIU before issuing the command */
>> - ufshcd_compose_upiu(hba, lrbp);
>> + if (hba->ufs_version == UFSHCI_VERSION_20) {
>> + if (likely(lrbp->cmd)) {
>> How this can be possible NULL, the code above will crash or I'm missing something ?
>> + ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
>> + lrbp->cmd->sc_data_direction);
>> + ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
>> What is different her from the code in ufshcd_compose_upiu ?
>> + } else
>> + err = -EINVAL;
>> + } else
>> + ufshcd_compose_upiu(hba, lrbp);
>
> If you check ufshcd_compose_upiu() you will see that it contains 2 scopes:
> cmd_upiu and query_req_upiu. Before 2.0 this single function approach that had both scopes worked well, but now with 2.0 we must use the same command_type
> (UTP_CMD_TYPE_UFS_STORAGE) which causes incompatibility. This was why I put the same code from cmd_upiu in the outside.
>
> Of course we can break ufshcd_compose_upiu() in 2: ufshcd_compose_cmd_upiu() and ufshcd_compose_query_upiu(). What do you think?
> If you use ufs_version only in req_desc_hdr then you don't need this
>
> If (ufs_version == 2.0)
> cmd_type = UFS_STORAGE
> else
> cmd_type = lrb->command_type
>
> ...
> I think with this change
Ok, I will test that.
>
>> +
>> err = ufshcd_map_sg(lrbp);
>> if (err) {
>> lrbp->cmd = NULL;
>> @@ -1371,7 +1386,12 @@ static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
>> lrbp->sense_buffer = NULL;
[snip]
>> complete(hba->dev_cmd.complete);
>> }
>> diff --git a/drivers/scsi/ufs/ufshci.h b/drivers/scsi/ufs/ufshci.h
>> index 0ae0967..8dba0e7 100644
>> --- a/drivers/scsi/ufs/ufshci.h
>> +++ b/drivers/scsi/ufs/ufshci.h
>> @@ -273,6 +273,7 @@ enum {
>> UTP_CMD_TYPE_SCSI = 0x0,
>> UTP_CMD_TYPE_UFS = 0x1,
>> UTP_CMD_TYPE_DEV_MANAGE = 0x2,
>> + UTP_CMD_TYPE_UFS_STORAGE = 0x11,
> Why 0x11?
I'll have to check with our R&D team.
>
> Thanks
> Tomas
>
Thanks
Joao
diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 2570d94..8b0cdf0 100644
--- a/drivers/scsi/ufs/ufshcd.h
+++ b/drivers/scsi/ufs/ufshcd.h
@@ -262,6 +262,7 @@ struct ufs_pwr_mode_info {
* @suspend: called during host controller PM callback
* @resume: called during host controller PM callback
* @dbg_register_dump: used to dump controller debug information
+ * @custom_phy_initialization: used to initialize phys in DWC Cores
*/
struct ufs_hba_variant_ops {
const char *name;
@@ -283,6 +284,7 @@ struct ufs_hba_variant_ops {
int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
int (*resume)(struct ufs_hba *, enum ufs_pm_op);
void (*dbg_register_dump)(struct ufs_hba *hba);
+ int (*custom_phy_initialization)(struct ufs_hba *);
};
I think just drop custom_ prefix these handlers are for customization so this doesn't add any information
Also here, I prefer that infrastructure changes will be in separate patches and not mangled with a specific device patch.
/* clock gating state */
diff --git a/drivers/scsi/ufs/ufshci-dwc.h b/drivers/scsi/ufs/ufshci-dwc.h new file mode 100644 index 0000000..947a75c
--- /dev/null
+++ b/drivers/scsi/ufs/ufshci-dwc.h
@@ -0,0 +1,42 @@
+/*
+ * UFS Host driver for Synopsys Designware Core
+ *
+ * Copyright (C) 2015-2016 Synopsys, Inc. (http://www.synopsys.com)
+ *
+ * Authors: Joao Pinto <[email protected]>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _UFSHCI_DWC_H
+#define _UFSHCI_DWC_H
+
+/* DWC HC UFSHCI specific Registers */
+enum dwc_specific_registers {
+ DWC_UFS_REG_HCLKDIV = 0xFC,
+};
+
+/* Link Status*/
+enum link_status {
+ UFSHCD_LINK_IS_DOWN = 1,
+ UFSHCD_LINK_IS_UP = 2,
+};
Is is designware specific ? Then should probably be DWC_ prefixed, if not then shouldn't be defined here.
+#endif /* End of Header */
diff --git a/drivers/scsi/ufs/unipro.h b/drivers/scsi/ufs/unipro.h index 816a8a4..da16254 100644
--- a/drivers/scsi/ufs/unipro.h
+++ b/drivers/scsi/ufs/unipro.h
Should also go to a separate patch ?
@@ -35,6 +35,10 @@
#define TX_LCC_SEQUENCER 0x0032
#define TX_MIN_ACTIVATETIME 0x0033
#define TX_PWM_G6_G7_SYNC_LENGTH 0x0034
+#define TX_REFCLKFREQ 0x00EB
+#define TX_CFGCLKFREQVAL 0x00EC
+#define CFGEXTRATTR 0x00F0
+#define DITHERCTRL2 0x00F1
/*
* M-RX Configuration Attributes
@@ -48,8 +52,38 @@
#define RX_ENTER_HIBERN8 0x00A7
#define RX_BYPASS_8B10B_ENABLE 0x00A8
#define RX_TERMINATION_FORCE_ENABLE 0x0089
+#define RX_REFCLKFREQ 0x00EB
+#define RX_CFGCLKFREQVAL 0x00EC
+#define CFGWIDEINLN 0x00F0
+#define CFGRXCDR8 0x00BA
+#define ENARXDIRECTCFG4 0x00F2
+#define CFGRXOVR8 0x00BD
+#define RXDIRECTCTRL2 0x00C7
+#define ENARXDIRECTCFG3 0x00F3
+#define RXCALCTRL 0x00B4
+#define ENARXDIRECTCFG2 0x00F4
+#define CFGRXOVR4 0x00E9
+#define RXSQCTRL 0x00B5
+#define CFGRXOVR6 0x00BF
#define is_mphy_tx_attr(attr) (attr < RX_MODE)
+
+/*
+ * Common Block Attributes
+ */
+#define TX_GLOBALHIBERNATE UNIPRO_CB_OFFSET(0x002B)
+#define REFCLKMODE UNIPRO_CB_OFFSET(0x00BF)
+#define DIRECTCTRL19 UNIPRO_CB_OFFSET(0x00CD)
+#define DIRECTCTRL10 UNIPRO_CB_OFFSET(0x00E6)
+#define CDIRECTCTRL6 UNIPRO_CB_OFFSET(0x00EA)
+#define RTOBSERVESELECT UNIPRO_CB_OFFSET(0x00F0)
+#define CBDIVFACTOR UNIPRO_CB_OFFSET(0x00F1)
+#define CBDCOCTRL5 UNIPRO_CB_OFFSET(0x00F3)
+#define CBPRGPLL2 UNIPRO_CB_OFFSET(0x00F8)
+#define CBPRGTUNING UNIPRO_CB_OFFSET(0x00FB)
+
+#define UNIPRO_CB_OFFSET(x) (0x8000 | x)
+
/*
* PHY Adpater attributes
*/
@@ -110,6 +144,11 @@
#define PA_STALLNOCONFIGTIME 0x15A3
#define PA_SAVECONFIGTIME 0x15A4
+/*Other attributes*/
+#define VS_MPHYCFGUPDT 0xD085
+#define VS_DEBUGOMC 0xD09E
+#define VS_POWERSTATE 0xD083
+
/* PA power modes */
enum {
FAST_MODE = 1,
--
1.8.1.5
Hi Thomas,
On 3/29/2016 1:15 PM, Winkler, Tomas wrote:
>
> diff --git a/drivers/scsi/ufs/ufshcd.h b/drivers/scsi/ufs/ufshcd.h index 2570d94..8b0cdf0 100644
> --- a/drivers/scsi/ufs/ufshcd.h
> +++ b/drivers/scsi/ufs/ufshcd.h
> @@ -262,6 +262,7 @@ struct ufs_pwr_mode_info {
> * @suspend: called during host controller PM callback
> * @resume: called during host controller PM callback
> * @dbg_register_dump: used to dump controller debug information
> + * @custom_phy_initialization: used to initialize phys in DWC Cores
> */
> struct ufs_hba_variant_ops {
> const char *name;
> @@ -283,6 +284,7 @@ struct ufs_hba_variant_ops {
> int (*suspend)(struct ufs_hba *, enum ufs_pm_op);
> int (*resume)(struct ufs_hba *, enum ufs_pm_op);
> void (*dbg_register_dump)(struct ufs_hba *hba);
[snip]...
> /*
> * PHY Adpater attributes
> */
> @@ -110,6 +144,11 @@
> #define PA_STALLNOCONFIGTIME 0x15A3
> #define PA_SAVECONFIGTIME 0x15A4
>
> +/*Other attributes*/
> +#define VS_MPHYCFGUPDT 0xD085
> +#define VS_DEBUGOMC 0xD09E
> +#define VS_POWERSTATE 0xD083
> +
> /* PA power modes */
> enum {
> FAST_MODE = 1,
> --
> 1.8.1.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-scsi" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
>
I am planning to start working today in the v12 of the patch-set. Did you have
opportunity to check the other patches (4, 5 and 6)?
Thanks,
Joao